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Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [Changelog.txt] - Blame information for rev 13

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Changelong
----------
 
06.07.14
--------
- decoders.v : fixed missing left/dest paths for sex
- alu16.v : fixed sex, mul, c flag for shifts, ror
- MC6809_cpu.v : fixed indirect indexed
 
05.07.14
--------
- decoders.v : fixed missing left/dest paths for daa
- alu16.v : fixed daa, h flag store and generation
 
04.07.14
--------
- decoders.v : fixed page 2&3 operands, jmp, cmp
- MC6809_cpu.v : fixed jmp
 
 
02.07.14
--------
- decoders.v : fixed dec, fixed inc (didn't read before write), fixed clr for ea direct, extended, indexed
               added a path with the decoded sources/destination for the decode stage
- MC6809_cpu.v : implemented two paths for source/dest from the decoder
- rumsim.bat : added batch file for simulation
 
22.06.14
--------
 
- decoders.v : fixed wrong left/right/dest paths for several extended, page 2, 3 opcodes.
- MC6809_cpu.v : fixed jsr extended, indexed
 
06.02.14
--------
 
- regblock.v : dropped double write of PC
- MC6809_cpu.v : fixed loading of new PC from reset vector, rel8 displacement calculation.
 
06.01.14
--------
 
- decoders.v : added registered outputs for the source/destination address registers
 
05.01.14
--------
 
- MC6809_cpu.v : fixed exg (wrong source), implemented SYNC
- decoders.v : fixed destination for BIT
- defs.v : reduced the number of ALU opcodes
- alu16.v : reduced the number of ALU opcodes, fused BIT with AND, CMP with SUB
 
01.01.14
--------
 
- alu16.v : the alu has been bronken in two units
- MC6809_cpu.v : added CWAI states and decoding
- decodres.v : added CWAI decoding
 
31.12.13
--------
 
- Implemented TFR/EXG
- MC6809_cpu.v: Added one more state to execute TFR or EXG
- decoders.v: added source/dest for TFR and EXG
- regblock.v : added second write path to the registers for TFR&EXG
- defs.v defined new SEQ_TFREXG for tfr&exg execution
 
30.12.13
--------
 
- Fixed increment/decrement of the stack pointer
 
- MC6809_cpu.v: Push/pull increment/decrement the stack pointr in their own states
                Added eamem source to the left alu data path to check for zero in the ea (leax/leay)
 
29.12.13
--------
 
- Fixed wrong byte in SEQ_MEM_WRITE_H
- Fixed unaffected Z flag for LEAX/LEAY
- Moved increment of pc from FETCH_2 to FETCH_1
- Fixed CMPA/CMPB/CMPX, they don't write a register back
- Fixed late write of pc
 
- decoders.v: Merged separated write_dest_x into one wire
              Added a source_size wire to indicate the width of the source argument
              Added the recognition of LEA as an alu mnemonic to modify the Z flag for LEAX/LEAY
 
- MC6809_cpu.v: Dropped checks for source size from the individual states and moved
                into SEQ_MEM_READ_H
                Merged write flags into k_dest_write
 
- alu.v: Added a LEA instruction for LEAX/LEAY where only the Z flag will be affected
 
- defs.v : added a LEA define to the ALU section

Line No.	Rev	Author	Line
1	4	ale500	`Changelong`
2			`----------`
3	11	ale500
4	12	ale500	`06.07.14`
5			`--------`
6			`- decoders.v : fixed missing left/dest paths for sex`
7			`- alu16.v : fixed sex, mul, c flag for shifts, ror`
8			`- MC6809_cpu.v : fixed indirect indexed`
9	13	ale500
10	12	ale500	`05.07.14`
11			`--------`
12			`- decoders.v : fixed missing left/dest paths for daa`
13			`- alu16.v : fixed daa, h flag store and generation`
14
15			`04.07.14`
16			`--------`
17			`- decoders.v : fixed page 2&3 operands, jmp, cmp`
18			`- MC6809_cpu.v : fixed jmp`
19
20
21	11	ale500	`02.07.14`
22			`--------`
23			`- decoders.v : fixed dec, fixed inc (didn't read before write), fixed clr for ea direct, extended, indexed`
24			`added a path with the decoded sources/destination for the decode stage`
25			`- MC6809_cpu.v : implemented two paths for source/dest from the decoder`
26			`- rumsim.bat : added batch file for simulation`
27
28	10	ale500	`22.06.14`
29			`--------`
30	4	ale500
31	10	ale500	`- decoders.v : fixed wrong left/right/dest paths for several extended, page 2, 3 opcodes.`
32			`- MC6809_cpu.v : fixed jsr extended, indexed`
33
34			`06.02.14`
35			`--------`
36
37			`- regblock.v : dropped double write of PC`
38			`- MC6809_cpu.v : fixed loading of new PC from reset vector, rel8 displacement calculation.`
39
40	9	ale500	`06.01.14`
41			`--------`
42
43			`- decoders.v : added registered outputs for the source/destination address registers`
44
45	7	ale500	`05.01.14`
46			`--------`
47
48			`- MC6809_cpu.v : fixed exg (wrong source), implemented SYNC`
49	9	ale500	`- decoders.v : fixed destination for BIT`
50			`- defs.v : reduced the number of ALU opcodes`
51			`- alu16.v : reduced the number of ALU opcodes, fused BIT with AND, CMP with SUB`
52	7	ale500
53	6	ale500	`01.01.14`
54			`--------`
55
56			`- alu16.v : the alu has been bronken in two units`
57			`- MC6809_cpu.v : added CWAI states and decoding`
58			`- decodres.v : added CWAI decoding`
59
60	5	ale500	`31.12.13`
61			`--------`
62
63			`- Implemented TFR/EXG`
64			`- MC6809_cpu.v: Added one more state to execute TFR or EXG`
65			`- decoders.v: added source/dest for TFR and EXG`
66			`- regblock.v : added second write path to the registers for TFR&EXG`
67			`- defs.v defined new SEQ_TFREXG for tfr&exg execution`
68
69	4	ale500	`30.12.13`
70			`--------`
71
72			`- Fixed increment/decrement of the stack pointer`
73
74			`- MC6809_cpu.v: Push/pull increment/decrement the stack pointr in their own states`
75			`Added eamem source to the left alu data path to check for zero in the ea (leax/leay)`
76
77			`29.12.13`
78			`--------`
79
80			`- Fixed wrong byte in SEQ_MEM_WRITE_H`
81			`- Fixed unaffected Z flag for LEAX/LEAY`
82			`- Moved increment of pc from FETCH_2 to FETCH_1`
83			`- Fixed CMPA/CMPB/CMPX, they don't write a register back`
84			`- Fixed late write of pc`
85
86			`- decoders.v: Merged separated write_dest_x into one wire`
87			`Added a source_size wire to indicate the width of the source argument`
88			`Added the recognition of LEA as an alu mnemonic to modify the Z flag for LEAX/LEAY`
89
90			`- MC6809_cpu.v: Dropped checks for source size from the individual states and moved`
91			`into SEQ_MEM_READ_H`
92			`Merged write flags into k_dest_write`
93
94			`- alu.v: Added a LEA instruction for LEAX/LEAY where only the Z flag will be affected`
95
96			`- defs.v : added a LEA define to the ALU section`

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[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [Changelog.txt] - Blame information for rev 13