URL https://opencores.org/ocsvn/6809_6309_compatible_core/6809_6309_compatible_core/trunk

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [Changelog.txt] - Blame information for rev 4

Go to most recent revision | Details | Compare with Previous | View Log


Changelong
----------
 
30.12.13
--------
 
- Fixed increment/decrement of the stack pointer
 
- MC6809_cpu.v: Push/pull increment/decrement the stack pointr in their own states
                Added eamem source to the left alu data path to check for zero in the ea (leax/leay)
 
29.12.13
--------
 
- Fixed wrong byte in SEQ_MEM_WRITE_H
- Fixed unaffected Z flag for LEAX/LEAY
- Moved increment of pc from FETCH_2 to FETCH_1
- Fixed CMPA/CMPB/CMPX, they don't write a register back
- Fixed late write of pc
 
- decoders.v: Merged separated write_dest_x into one wire
              Added a source_size wire to indicate the width of the source argument
              Added the recognition of LEA as an alu mnemonic to modify the Z flag for LEAX/LEAY
 
- MC6809_cpu.v: Dropped checks for source size from the individual states and moved
                into SEQ_MEM_READ_H
                Merged write flags into k_dest_write
 
- alu.v: Added a LEA instruction for LEAX/LEAY where only the Z flag will be affected
 
- defs.v : added a LEA define to the ALU section

Line No.	Rev	Author	Line
1	4	ale500	`Changelong`
2			`----------`
3
4			`30.12.13`
5			`--------`
6
7			`- Fixed increment/decrement of the stack pointer`
8
9			`- MC6809_cpu.v: Push/pull increment/decrement the stack pointr in their own states`
10			`Added eamem source to the left alu data path to check for zero in the ea (leax/leay)`
11
12			`29.12.13`
13			`--------`
14
15			`- Fixed wrong byte in SEQ_MEM_WRITE_H`
16			`- Fixed unaffected Z flag for LEAX/LEAY`
17			`- Moved increment of pc from FETCH_2 to FETCH_1`
18			`- Fixed CMPA/CMPB/CMPX, they don't write a register back`
19			`- Fixed late write of pc`
20
21			`- decoders.v: Merged separated write_dest_x into one wire`
22			`Added a source_size wire to indicate the width of the source argument`
23			`Added the recognition of LEA as an alu mnemonic to modify the Z flag for LEAX/LEAY`
24
25			`- MC6809_cpu.v: Dropped checks for source size from the individual states and moved`
26			`into SEQ_MEM_READ_H`
27			`Merged write flags into k_dest_write`
28
29			`- alu.v: Added a LEA instruction for LEAX/LEAY where only the Z flag will be affected`
30
31			`- defs.v : added a LEA define to the ALU section`

Browse

Tools

Subversion Repositories 6809_6309_compatible_core

[/] [6809_6309_compatible_core/] [trunk/] [rtl/] [verilog/] [Changelog.txt] - Blame information for rev 4