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https://opencores.org/ocsvn/802154phycore/802154phycore/trunk
[/] [802154phycore/] [trunk/] [rtl/] [downsampler.vhd] - Blame information for rev 2
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entactogen |
-- Copyright (c) 2010 Antonio de la Piedra
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-- This program is free software: you can redistribute it and/or modify
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-- it under the terms of the GNU General Public License as published by
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-- the Free Software Foundation, either version 3 of the License, or
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-- (at your option) any later version.
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-- This program is distributed in the hope that it will be useful,
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-- GNU General Public License for more details.
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-- You should have received a copy of the GNU General Public License
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-- along with this program. If not, see <http://www.gnu.org/licenses/>.
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-- A VHDL model of the IEEE 802.15.4 physical layer.
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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entity downsampler is
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port (downsampler_clk: in std_logic;
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downsampler_start: in std_logic;
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downsampler_input: in std_logic_vector(9 downto 0);
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downsampler_output: out std_logic_vector(9 downto 0));
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end downsampler;
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architecture Behavioral of downsampler is
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begin
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process(downsampler_clk, downsampler_start, downsampler_input)
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begin
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if rising_edge(downsampler_clk) and downsampler_start = '1' then
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downsampler_output <= downsampler_input;
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end if;
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end process;
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end Behavioral;
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