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[/] [adv_debug_sys/] [trunk/] [Software/] [adv_jtag_bridge/] [dbg_api.c] - Blame information for rev 14

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/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.
   Copyright(C) Nathan Yawn, nyawn@opencores.net
   based on code from jp2 by Marko Mlinar, markom@opencores.org
 
   This file contains API functions which may be called from the GDB
   interface server.  These functions call the appropriate hardware-
   specific functions for the advanced debug interface or the legacy
   debug interface, depending on which is selected.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
 
 
 
#include <stdio.h>
#include <pthread.h>  // for mutexes
#include <arpa/inet.h>  // for ntohl()
 
#include "adv_dbg_commands.h"
#include "legacy_dbg_commands.h"
#include "errcodes.h"
 
#define debug(...) //fprintf(stderr, __VA_ARGS__ )
 
#define DBG_HW_ADVANCED 1
#define DBG_HW_LEGACY   2
#ifdef __LEGACY__
#warning Compiling for LEGACY debug hardware!
#define DEBUG_HARDWARE DBG_HW_LEGACY
#else
#warning Compiling for ADVANCED debug unit!
#define DEBUG_HARDWARE  DBG_HW_ADVANCED
#endif
 
pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;
 
/* read a word from wishbone */
int dbg_wb_read32(unsigned long adr, unsigned long *data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
          err = legacy_dbg_go((unsigned char*)data, 4, 1);
      *data = ntohl(*data);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
/* write a word to wishbone */
int dbg_wb_write32(unsigned long adr, unsigned long data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      data = ntohl(data);
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
// write a word to wishbone
// Never actually called from the GDB interface
int dbg_wb_write16(unsigned long adr, uint16_t data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
        data = ntohs(data);
        if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
          if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
            err = legacy_dbg_go((unsigned char*)&data, 2, 0);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
// write a word to wishbone
// Never actually called from the GDB interface
int dbg_wb_write8(unsigned long adr, uint8_t data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
        if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
          if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
            err = legacy_dbg_go((unsigned char*)&data, 1, 0);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(4, len, adr, (void *)data);  // 'len' is words.
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      int bytelen = len<<2;
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
            for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
// Never actually called from the GDB interface
int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(2, len, adr, (void *)data);  // 'len' is 16-bit halfwords
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      int bytelen = len<<1;
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1)))  // 'len' is halfwords, call wants bytes
            for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
// Never actually called from the GDB interface
int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(1, len, adr, (void *)data);  // *** is 'len' bits or words?? Call wants words...
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
          err = legacy_dbg_go((unsigned char*)data, len, 1);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
 
// write a block to wishbone 
int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)data, 4, len, adr);  // 'len' is words.
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      int bytelen = len << 2;
      for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
          err = legacy_dbg_go((unsigned char*)data, bytelen, 0);  // 'len' is words, call wants bytes 
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
// write a block to wishbone
// Never actually called from the GDB interface
int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)data, 2, len, adr);  // 'len' is (half)words
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      int bytelen = len<<1;
      for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
          err = legacy_dbg_go((unsigned char*)data, bytelen, 0);  // 'len' is 16-bit halfwords, call wants bytes  
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
// write a block to wishbone
int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(!len)
    return APP_ERR_NONE;  // GDB may issue a 0-length transaction to test if a feature is supported
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_WISHBONE)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)data, 1, len, adr);  // 'len' is in words...
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
          err = legacy_dbg_go((unsigned char*)data, len, 0);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
/* read a register from cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
int dbg_cpu0_read(unsigned long adr, unsigned long *data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
          if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
            *data = ntohl(*data);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
  return err;
}
 
/* read multiple registers from cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      unsigned long readaddr = adr;
      err = APP_ERR_NONE;
      for(i = 0; i < count; i++) {
        err |= dbg_cpu0_read(readaddr++, &data[i]);
      }
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
  return err;
}
 
/* write a cpu register to cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
int dbg_cpu0_write(unsigned long adr, unsigned long data) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      data = ntohl(data);
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
    }
  debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
/* write multiple cpu registers to cpu0.  This is assumed to be an OR32 CPU, with 32-bit regs. */
int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_write((void *)data, 4, count, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int i;
      unsigned long writeaddr = adr;
      err = APP_ERR_NONE;
      for(i = 0; i < count; i++) {
        err |= dbg_cpu0_write(writeaddr++, data[i]);
      }
    }
  debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
/* write a debug unit cpu module register
 * Since OR32 debug module has only 1 register,
 * adr is ignored (for now) */
int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {
  int err = APP_ERR_NONE;
  uint32_t dataword = data;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0))) {
        printf("Failed to set chain to 0x%X\n", DC_CPU0);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
      if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
        printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS );  // Only 2 bits: Reset, Stall
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
        err = legacy_dbg_ctrl(data & 2, data &1);
    }
  debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
/* read a register from cpu module of the debug unit.
 * Currently, there is only 1 register, so we do not need to select it, adr is ignored
 */
int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {
  int err = APP_ERR_NONE;
  uint32_t dataword;
  pthread_mutex_lock(&dbg_access_mutex);
 
  // reset is bit 1, stall is bit 0 in *data
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU0))) {
        printf("Failed to set chain to 0x%X\n", DC_CPU0);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
      if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
        printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
      *data = dataword;
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int r, s;
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
        err = legacy_dbg_ctrl_read(&r, &s);
      *data = (r << 1) | s;
      debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
// CPU1 Functions.  Note that 2 CPUs are not currently supported by GDB, so these are never actually
// called from the GDB interface.  They are included for completeness and future use.
// read a register from cpu1
int dbg_cpu1_read(unsigned long adr, unsigned long *data)
 {
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU1)))
        {
          pthread_mutex_unlock(&dbg_access_mutex);
          return err;
        }
      err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
          err = legacy_dbg_go((unsigned char*)data, 4, 1);
      *data = ntohl(*data);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
// write a cpu register
int dbg_cpu1_write(unsigned long adr, unsigned long data)
{
  int err;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
  if ((err = adbg_select_module(DC_CPU0)))
    {
      pthread_mutex_unlock(&dbg_access_mutex);
      return err;
    }
  err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      data = ntohl(data);
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
        if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
          err = legacy_dbg_go((unsigned char*)&data, 4, 0);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
// write a debug unit cpu module register
int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {
   int err;
  uint32_t dataword = data;
  pthread_mutex_lock(&dbg_access_mutex);
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU1))) {
        printf("Failed to set chain to 0x%X\n", DC_CPU1);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
      if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
        printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS );  // Only 2 bits: Reset, Stall
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
        err = legacy_dbg_ctrl(data & 2, data & 1);
    }
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
// read a debug unit cpu module register
int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {
  int err;
  uint32_t dataword;
  pthread_mutex_lock(&dbg_access_mutex);
 
  // reset is bit 1, stall is bit 0 in *data
 
  if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
    {
      if ((err = adbg_select_module(DC_CPU1))) {
        printf("Failed to set chain to 0x%X\n", DC_CPU1);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
      if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
        printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
        pthread_mutex_unlock(&dbg_access_mutex);
        return err;
      }
     *data = dataword;
    }
  else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
    {
      int r, s;
      if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
        err = legacy_dbg_ctrl_read(&r, &s);
      *data = (r << 1) | s;
    }
 
  pthread_mutex_unlock(&dbg_access_mutex);
  return err;
}
 
 
 

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[/] [adv_debug_sys/] [trunk/] [Software/] [adv_jtag_bridge/] [dbg_api.c] - Blame information for rev 14

Line No.	Rev	Author	Line
1	14	nyawn	`/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.`
2			`Copyright(C) Nathan Yawn, nyawn@opencores.net`
3			`based on code from jp2 by Marko Mlinar, markom@opencores.org`
4
5			`This file contains API functions which may be called from the GDB`
6			`interface server. These functions call the appropriate hardware-`
7			`specific functions for the advanced debug interface or the legacy`
8			`debug interface, depending on which is selected.`
9
10			`This program is free software; you can redistribute it and/or modify`
11			`it under the terms of the GNU General Public License as published by`
12			`the Free Software Foundation; either version 2 of the License, or`
13			`(at your option) any later version.`
14
15			`This program is distributed in the hope that it will be useful,`
16			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
17			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
18			`GNU General Public License for more details.`
19
20			`You should have received a copy of the GNU General Public License`
21			`along with this program; if not, write to the Free Software`
22			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.`
23			`*/`
24
25
26
27			`#include <stdio.h>`
28			`#include <pthread.h> // for mutexes`
29			`#include <arpa/inet.h> // for ntohl()`
30
31			`#include "adv_dbg_commands.h"`
32			`#include "legacy_dbg_commands.h"`
33			`#include "errcodes.h"`
34
35			`#define debug(...) //fprintf(stderr, __VA_ARGS__ )`
36
37			`#define DBG_HW_ADVANCED 1`
38			`#define DBG_HW_LEGACY 2`
39			`#ifdef __LEGACY__`
40			`#warning Compiling for LEGACY debug hardware!`
41			`#define DEBUG_HARDWARE DBG_HW_LEGACY`
42			`#else`
43			`#warning Compiling for ADVANCED debug unit!`
44			`#define DEBUG_HARDWARE DBG_HW_ADVANCED`
45			`#endif`
46
47			`pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;`
48
49			`/* read a word from wishbone */`
50			`int dbg_wb_read32(unsigned long adr, unsigned long *data) {`
51			`int err;`
52			`pthread_mutex_lock(&dbg_access_mutex);`
53
54			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
55			`{`
56			`if ((err = adbg_select_module(DC_WISHBONE)))`
57			`{`
58			`pthread_mutex_unlock(&dbg_access_mutex);`
59			`return err;`
60			`}`
61			`err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts`
62			`}`
63			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
64			`{`
65			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
66			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))`
67			`err = legacy_dbg_go((unsigned char*)data, 4, 1);`
68			`data = ntohl(data);`
69			`}`
70
71			`pthread_mutex_unlock(&dbg_access_mutex);`
72			`return err;`
73			`}`
74
75			`/* write a word to wishbone */`
76			`int dbg_wb_write32(unsigned long adr, unsigned long data) {`
77			`int err;`
78			`pthread_mutex_lock(&dbg_access_mutex);`
79
80			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
81			`{`
82			`if ((err = adbg_select_module(DC_WISHBONE)))`
83			`{`
84			`pthread_mutex_unlock(&dbg_access_mutex);`
85			`return err;`
86			`}`
87			`err = adbg_wb_burst_write((void *)&data, 4, 1, adr);`
88			`}`
89			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
90			`{`
91			`data = ntohl(data);`
92			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
93			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))`
94			`err = legacy_dbg_go((unsigned char*)&data, 4, 0);`
95			`}`
96			`pthread_mutex_unlock(&dbg_access_mutex);`
97			`return err;`
98			`}`
99
100			`// write a word to wishbone`
101			`// Never actually called from the GDB interface`
102			`int dbg_wb_write16(unsigned long adr, uint16_t data) {`
103			`int err;`
104			`pthread_mutex_lock(&dbg_access_mutex);`
105
106			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
107			`{`
108			`if ((err = adbg_select_module(DC_WISHBONE)))`
109			`{`
110			`pthread_mutex_unlock(&dbg_access_mutex);`
111			`return err;`
112			`}`
113			`err = adbg_wb_burst_write((void *)&data, 2, 1, adr);`
114			`}`
115			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
116			`{`
117			`data = ntohs(data);`
118			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
119			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))`
120			`err = legacy_dbg_go((unsigned char*)&data, 2, 0);`
121			`}`
122
123			`pthread_mutex_unlock(&dbg_access_mutex);`
124			`return err;`
125			`}`
126
127			`// write a word to wishbone`
128			`// Never actually called from the GDB interface`
129			`int dbg_wb_write8(unsigned long adr, uint8_t data) {`
130			`int err;`
131			`pthread_mutex_lock(&dbg_access_mutex);`
132
133			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
134			`{`
135			`if ((err = adbg_select_module(DC_WISHBONE)))`
136			`{`
137			`pthread_mutex_unlock(&dbg_access_mutex);`
138			`return err;`
139			`}`
140			`err = adbg_wb_burst_write((void *)&data, 1, 1, adr);`
141			`}`
142			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
143			`{`
144			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
145			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))`
146			`err = legacy_dbg_go((unsigned char*)&data, 1, 0);`
147			`}`
148
149			`pthread_mutex_unlock(&dbg_access_mutex);`
150			`return err;`
151			`}`
152
153
154			`int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {`
155			`int err;`
156			`pthread_mutex_lock(&dbg_access_mutex);`
157
158			`if(!len)`
159			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
160
161			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
162			`{`
163			`if ((err = adbg_select_module(DC_WISHBONE)))`
164			`{`
165			`pthread_mutex_unlock(&dbg_access_mutex);`
166			`return err;`
167			`}`
168			`err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.`
169			`}`
170			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
171			`{`
172			`int i;`
173			`int bytelen = len<<2;`
174			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
175			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))`
176			`if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes`
177			`for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);`
178			`}`
179
180			`pthread_mutex_unlock(&dbg_access_mutex);`
181			`return err;`
182			`}`
183
184
185			`// Never actually called from the GDB interface`
186			`int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {`
187			`int err;`
188			`pthread_mutex_lock(&dbg_access_mutex);`
189
190			`if(!len)`
191			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
192
193			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
194			`{`
195			`if ((err = adbg_select_module(DC_WISHBONE)))`
196			`{`
197			`pthread_mutex_unlock(&dbg_access_mutex);`
198			`return err;`
199			`}`
200			`err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords`
201			`}`
202			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
203			`{`
204			`int i;`
205			`int bytelen = len<<1;`
206			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
207			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))`
208			`if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes`
209			`for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);`
210			`}`
211
212			`pthread_mutex_unlock(&dbg_access_mutex);`
213			`return err;`
214			`}`
215
216			`// Never actually called from the GDB interface`
217			`int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {`
218			`int err;`
219			`pthread_mutex_lock(&dbg_access_mutex);`
220
221			`if(!len)`
222			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
223
224			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
225			`{`
226			`if ((err = adbg_select_module(DC_WISHBONE)))`
227			`{`
228			`pthread_mutex_unlock(&dbg_access_mutex);`
229			`return err;`
230			`}`
231			`err = adbg_wb_burst_read(1, len, adr, (void )data); // ** is 'len' bits or words?? Call wants words...`
232			`}`
233			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
234			`{`
235			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
236			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))`
237			`err = legacy_dbg_go((unsigned char*)data, len, 1);`
238			`}`
239			`pthread_mutex_unlock(&dbg_access_mutex);`
240			`return err;`
241			`}`
242
243
244
245			`// write a block to wishbone`
246			`int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {`
247			`int err;`
248			`pthread_mutex_lock(&dbg_access_mutex);`
249
250			`if(!len)`
251			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
252
253			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
254			`{`
255			`if ((err = adbg_select_module(DC_WISHBONE)))`
256			`{`
257			`pthread_mutex_unlock(&dbg_access_mutex);`
258			`return err;`
259			`}`
260			`err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.`
261			`}`
262			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
263			`{`
264			`int i;`
265			`int bytelen = len << 2;`
266			`for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);`
267			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
268			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))`
269			`err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes`
270			`}`
271			`pthread_mutex_unlock(&dbg_access_mutex);`
272			`return err;`
273			`}`
274
275
276			`// write a block to wishbone`
277			`// Never actually called from the GDB interface`
278			`int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {`
279			`int err;`
280			`pthread_mutex_lock(&dbg_access_mutex);`
281
282			`if(!len)`
283			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
284
285			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
286			`{`
287			`if ((err = adbg_select_module(DC_WISHBONE)))`
288			`{`
289			`pthread_mutex_unlock(&dbg_access_mutex);`
290			`return err;`
291			`}`
292			`err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words`
293			`}`
294			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
295			`{`
296			`int i;`
297			`int bytelen = len<<1;`
298			`for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);`
299			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
300			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))`
301			`err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes`
302			`}`
303			`pthread_mutex_unlock(&dbg_access_mutex);`
304			`return err;`
305			`}`
306
307			`// write a block to wishbone`
308			`int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {`
309			`int err;`
310			`pthread_mutex_lock(&dbg_access_mutex);`
311
312			`if(!len)`
313			`return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported`
314
315			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
316			`{`
317			`if ((err = adbg_select_module(DC_WISHBONE)))`
318			`{`
319			`pthread_mutex_unlock(&dbg_access_mutex);`
320			`return err;`
321			`}`
322			`err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...`
323			`}`
324			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
325			`{`
326			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))`
327			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))`
328			`err = legacy_dbg_go((unsigned char*)data, len, 0);`
329			`}`
330			`pthread_mutex_unlock(&dbg_access_mutex);`
331			`return err;`
332			`}`
333
334
335			`/* read a register from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */`
336			`int dbg_cpu0_read(unsigned long adr, unsigned long *data) {`
337			`int err;`
338			`pthread_mutex_lock(&dbg_access_mutex);`
339
340			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
341			`{`
342			`if ((err = adbg_select_module(DC_CPU0)))`
343			`{`
344			`pthread_mutex_unlock(&dbg_access_mutex);`
345			`return err;`
346			`}`
347			`err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts`
348			`}`
349			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
350			`{`
351			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))`
352			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))`
353			`if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))`
354			`data = ntohl(data);`
355			`}`
356			`pthread_mutex_unlock(&dbg_access_mutex);`
357			`debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);`
358			`return err;`
359			`}`
360
361			`/* read multiple registers from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */`
362			`int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {`
363			`int err;`
364			`pthread_mutex_lock(&dbg_access_mutex);`
365
366			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
367			`{`
368			`if ((err = adbg_select_module(DC_CPU0)))`
369			`{`
370			`pthread_mutex_unlock(&dbg_access_mutex);`
371			`return err;`
372			`}`
373			`err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts`
374			`}`
375			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
376			`{`
377			`int i;`
378			`unsigned long readaddr = adr;`
379			`err = APP_ERR_NONE;`
380			`for(i = 0; i < count; i++) {`
381			`err \|= dbg_cpu0_read(readaddr++, &data[i]);`
382			`}`
383			`}`
384			`pthread_mutex_unlock(&dbg_access_mutex);`
385			`debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);`
386			`return err;`
387			`}`
388
389			`/* write a cpu register to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */`
390			`int dbg_cpu0_write(unsigned long adr, unsigned long data) {`
391			`int err;`
392			`pthread_mutex_lock(&dbg_access_mutex);`
393
394			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
395			`{`
396			`if ((err = adbg_select_module(DC_CPU0)))`
397			`{`
398			`pthread_mutex_unlock(&dbg_access_mutex);`
399			`return err;`
400			`}`
401			`err = adbg_wb_burst_write((void *)&data, 4, 1, adr);`
402			`}`
403			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
404			`{`
405			`data = ntohl(data);`
406			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))`
407			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))`
408			`err = legacy_dbg_go((unsigned char*)&data, 4, 0);`
409			`}`
410			`debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);`
411			`pthread_mutex_unlock(&dbg_access_mutex);`
412			`return err;`
413			`}`
414
415			`/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */`
416			`int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {`
417			`int err;`
418			`pthread_mutex_lock(&dbg_access_mutex);`
419
420			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
421			`{`
422			`if ((err = adbg_select_module(DC_CPU0)))`
423			`{`
424			`pthread_mutex_unlock(&dbg_access_mutex);`
425			`return err;`
426			`}`
427			`err = adbg_wb_burst_write((void *)data, 4, count, adr);`
428			`}`
429			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
430			`{`
431			`int i;`
432			`unsigned long writeaddr = adr;`
433			`err = APP_ERR_NONE;`
434			`for(i = 0; i < count; i++) {`
435			`err \|= dbg_cpu0_write(writeaddr++, data[i]);`
436			`}`
437			`}`
438			`debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);`
439			`pthread_mutex_unlock(&dbg_access_mutex);`
440			`return err;`
441			`}`
442
443			`/* write a debug unit cpu module register`
444			`* Since OR32 debug module has only 1 register,`
445			`* adr is ignored (for now) */`
446			`int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {`
447			`int err = APP_ERR_NONE;`
448			`uint32_t dataword = data;`
449			`pthread_mutex_lock(&dbg_access_mutex);`
450
451			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
452			`{`
453			`if ((err = adbg_select_module(DC_CPU0))) {`
454			`printf("Failed to set chain to 0x%X\n", DC_CPU0);`
455			`pthread_mutex_unlock(&dbg_access_mutex);`
456			`return err;`
457			`}`
458			`if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {`
459			`printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall`
460			`pthread_mutex_unlock(&dbg_access_mutex);`
461			`return err;`
462			`}`
463			`}`
464			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
465			`{`
466			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))`
467			`err = legacy_dbg_ctrl(data & 2, data &1);`
468			`}`
469			`debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);`
470			`pthread_mutex_unlock(&dbg_access_mutex);`
471			`return err;`
472			`}`
473
474
475			`/* read a register from cpu module of the debug unit.`
476			`* Currently, there is only 1 register, so we do not need to select it, adr is ignored`
477			`*/`
478			`int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {`
479			`int err = APP_ERR_NONE;`
480			`uint32_t dataword;`
481			`pthread_mutex_lock(&dbg_access_mutex);`
482
483			`// reset is bit 1, stall is bit 0 in *data`
484			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
485			`{`
486			`if ((err = adbg_select_module(DC_CPU0))) {`
487			`printf("Failed to set chain to 0x%X\n", DC_CPU0);`
488			`pthread_mutex_unlock(&dbg_access_mutex);`
489			`return err;`
490			`}`
491			`if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {`
492			`printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);`
493			`pthread_mutex_unlock(&dbg_access_mutex);`
494			`return err;`
495			`}`
496			`*data = dataword;`
497			`}`
498			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
499			`{`
500			`int r, s;`
501			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))`
502			`err = legacy_dbg_ctrl_read(&r, &s);`
503			`*data = (r << 1) \| s;`
504			`debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);`
505			`}`
506
507			`pthread_mutex_unlock(&dbg_access_mutex);`
508			`return err;`
509			`}`
510
511			`// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually`
512			`// called from the GDB interface. They are included for completeness and future use.`
513			`// read a register from cpu1`
514			`int dbg_cpu1_read(unsigned long adr, unsigned long *data)`
515			`{`
516			`int err;`
517			`pthread_mutex_lock(&dbg_access_mutex);`
518
519			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
520			`{`
521			`if ((err = adbg_select_module(DC_CPU1)))`
522			`{`
523			`pthread_mutex_unlock(&dbg_access_mutex);`
524			`return err;`
525			`}`
526			`err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts`
527			`}`
528			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
529			`{`
530			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))`
531			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))`
532			`err = legacy_dbg_go((unsigned char*)data, 4, 1);`
533			`data = ntohl(data);`
534			`}`
535			`pthread_mutex_unlock(&dbg_access_mutex);`
536			`return err;`
537			`}`
538
539
540			`// write a cpu register`
541			`int dbg_cpu1_write(unsigned long adr, unsigned long data)`
542			`{`
543			`int err;`
544			`pthread_mutex_lock(&dbg_access_mutex);`
545
546			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
547			`{`
548			`if ((err = adbg_select_module(DC_CPU0)))`
549			`{`
550			`pthread_mutex_unlock(&dbg_access_mutex);`
551			`return err;`
552			`}`
553			`err = adbg_wb_burst_write((void *)&data, 4, 1, adr);`
554			`}`
555			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
556			`{`
557			`data = ntohl(data);`
558			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))`
559			`if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))`
560			`err = legacy_dbg_go((unsigned char*)&data, 4, 0);`
561			`}`
562			`pthread_mutex_unlock(&dbg_access_mutex);`
563			`return err;`
564			`}`
565
566
567			`// write a debug unit cpu module register`
568			`int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {`
569			`int err;`
570			`uint32_t dataword = data;`
571			`pthread_mutex_lock(&dbg_access_mutex);`
572
573			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
574			`{`
575			`if ((err = adbg_select_module(DC_CPU1))) {`
576			`printf("Failed to set chain to 0x%X\n", DC_CPU1);`
577			`pthread_mutex_unlock(&dbg_access_mutex);`
578			`return err;`
579			`}`
580			`if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {`
581			`printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall`
582			`pthread_mutex_unlock(&dbg_access_mutex);`
583			`return err;`
584			`}`
585			`}`
586			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
587			`{`
588			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))`
589			`err = legacy_dbg_ctrl(data & 2, data & 1);`
590			`}`
591			`pthread_mutex_unlock(&dbg_access_mutex);`
592			`return err;`
593			`}`
594
595
596			`// read a debug unit cpu module register`
597			`int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {`
598			`int err;`
599			`uint32_t dataword;`
600			`pthread_mutex_lock(&dbg_access_mutex);`
601
602			`// reset is bit 1, stall is bit 0 in *data`
603
604			`if(DEBUG_HARDWARE == DBG_HW_ADVANCED)`
605			`{`
606			`if ((err = adbg_select_module(DC_CPU1))) {`
607			`printf("Failed to set chain to 0x%X\n", DC_CPU1);`
608			`pthread_mutex_unlock(&dbg_access_mutex);`
609			`return err;`
610			`}`
611			`if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {`
612			`printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);`
613			`pthread_mutex_unlock(&dbg_access_mutex);`
614			`return err;`
615			`}`
616			`*data = dataword;`
617			`}`
618			`else if(DEBUG_HARDWARE == DBG_HW_LEGACY)`
619			`{`
620			`int r, s;`
621			`if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))`
622			`err = legacy_dbg_ctrl_read(&r, &s);`
623			`*data = (r << 1) \| s;`
624			`}`
625
626			`pthread_mutex_unlock(&dbg_access_mutex);`
627			`return err;`
628			`}`
629
630
631