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nyawn |
/* dbg_api.c -- JTAG protocol bridge between GDB and Advanced debug module.
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nyawn |
Copyright(C) 2009 - 2010 Nathan Yawn, nyawn@opencores.net
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21 |
nyawn |
based on code from jp2 by Marko Mlinar, markom@opencores.org
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This file contains API functions which may be called from the GDB
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interface server. These functions call the appropriate hardware-
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specific functions for the advanced debug interface or the legacy
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debug interface, depending on which is selected.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <stdio.h>
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#include <pthread.h> // for mutexes
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#include <arpa/inet.h> // for ntohl()
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#include "adv_dbg_commands.h"
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#include "legacy_dbg_commands.h"
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#include "cable_common.h"
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#include "errcodes.h"
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#define debug(...) //fprintf(stderr, __VA_ARGS__ )
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#define DBG_HW_ADVANCED 1
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#define DBG_HW_LEGACY 2
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#ifdef __LEGACY__
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#warning Compiling for LEGACY debug hardware!
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#define DEBUG_HARDWARE DBG_HW_LEGACY
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#else
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#warning Compiling for ADVANCED debug unit!
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#define DEBUG_HARDWARE DBG_HW_ADVANCED
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#endif
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pthread_mutex_t dbg_access_mutex = PTHREAD_MUTEX_INITIALIZER;
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/* read a word from wishbone */
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int dbg_wb_read32(unsigned long adr, unsigned long *data) {
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_read(4, 1, adr, (void *)data); // All WB reads / writes are bursts
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
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err = legacy_dbg_go((unsigned char*)data, 4, 1);
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*data = ntohl(*data);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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/* write a word to wishbone */
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int dbg_wb_write32(unsigned long adr, unsigned long data) {
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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data = ntohl(data);
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
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err = legacy_dbg_go((unsigned char*)&data, 4, 0);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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// write a word to wishbone
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// Never actually called from the GDB interface
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int dbg_wb_write16(unsigned long adr, uint16_t data) {
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_write((void *)&data, 2, 1, adr);
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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data = ntohs(data);
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, 2)))
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err = legacy_dbg_go((unsigned char*)&data, 2, 0);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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// write a word to wishbone
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// Never actually called from the GDB interface
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int dbg_wb_write8(unsigned long adr, uint8_t data) {
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int err;
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_write((void *)&data, 1, 1, adr);
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, 1)))
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err = legacy_dbg_go((unsigned char*)&data, 1, 0);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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int dbg_wb_read_block32(unsigned long adr, unsigned long *data, int len) {
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int err;
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_read(4, len, adr, (void *)data); // 'len' is words.
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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int i;
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int bytelen = len<<2;
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is words, call wants bytes
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for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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// Never actually called from the GDB interface
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int dbg_wb_read_block16(unsigned long adr, uint16_t *data, int len) {
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int err;
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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nyawn |
pthread_mutex_lock(&dbg_access_mutex);
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if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_read(2, len, adr, (void *)data); // 'len' is 16-bit halfwords
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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int i;
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int bytelen = len<<1;
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x5, adr, bytelen)))
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if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, bytelen, 1))) // 'len' is halfwords, call wants bytes
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for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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// Never actually called from the GDB interface
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int dbg_wb_read_block8(unsigned long adr, uint8_t *data, int len) {
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int err;
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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nyawn |
pthread_mutex_lock(&dbg_access_mutex);
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nyawn |
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_read(1, len, adr, (void *)data); // *** is 'len' bits or words?? Call wants words...
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x4, adr, len)))
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err = legacy_dbg_go((unsigned char*)data, len, 1);
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}
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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// write a block to wishbone
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int dbg_wb_write_block32(unsigned long adr, unsigned long *data, int len) {
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int err;
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if(!len)
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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29 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
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21 |
nyawn |
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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{
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if ((err = adbg_select_module(DC_WISHBONE)))
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{
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cable_flush();
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pthread_mutex_unlock(&dbg_access_mutex);
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return err;
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}
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err = adbg_wb_burst_write((void *)data, 4, len, adr); // 'len' is words.
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}
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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{
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| 274 |
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int i;
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| 275 |
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int bytelen = len << 2;
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| 276 |
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for (i = 0; i < len; i ++) data[i] = ntohl(data[i]);
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| 277 |
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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| 278 |
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, bytelen)))
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| 279 |
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err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is words, call wants bytes
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| 280 |
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}
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| 281 |
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cable_flush();
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| 282 |
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pthread_mutex_unlock(&dbg_access_mutex);
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| 283 |
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return err;
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| 284 |
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}
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| 285 |
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| 286 |
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| 287 |
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// write a block to wishbone
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| 288 |
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// Never actually called from the GDB interface
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| 289 |
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int dbg_wb_write_block16(unsigned long adr, uint16_t *data, int len) {
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| 290 |
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int err;
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| 291 |
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| 292 |
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if(!len)
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| 293 |
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return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
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| 294 |
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| 295 |
29 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
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| 296 |
21 |
nyawn |
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
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| 297 |
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{
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| 298 |
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if ((err = adbg_select_module(DC_WISHBONE)))
|
| 299 |
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{
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| 300 |
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cable_flush();
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| 301 |
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pthread_mutex_unlock(&dbg_access_mutex);
|
| 302 |
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return err;
|
| 303 |
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}
|
| 304 |
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err = adbg_wb_burst_write((void *)data, 2, len, adr); // 'len' is (half)words
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| 305 |
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}
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| 306 |
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else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
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| 307 |
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{
|
| 308 |
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int i;
|
| 309 |
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int bytelen = len<<1;
|
| 310 |
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for (i = 0; i < len; i ++) data[i] = ntohs(data[i]);
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| 311 |
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if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
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| 312 |
|
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if (APP_ERR_NONE == (err = legacy_dbg_command(0x1, adr, bytelen)))
|
| 313 |
|
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err = legacy_dbg_go((unsigned char*)data, bytelen, 0); // 'len' is 16-bit halfwords, call wants bytes
|
| 314 |
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}
|
| 315 |
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|
cable_flush();
|
| 316 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 317 |
|
|
return err;
|
| 318 |
|
|
}
|
| 319 |
|
|
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| 320 |
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|
// write a block to wishbone
|
| 321 |
|
|
int dbg_wb_write_block8(unsigned long adr, uint8_t *data, int len) {
|
| 322 |
|
|
int err;
|
| 323 |
|
|
|
| 324 |
|
|
if(!len)
|
| 325 |
|
|
return APP_ERR_NONE; // GDB may issue a 0-length transaction to test if a feature is supported
|
| 326 |
|
|
|
| 327 |
29 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
|
| 328 |
21 |
nyawn |
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 329 |
|
|
{
|
| 330 |
|
|
if ((err = adbg_select_module(DC_WISHBONE)))
|
| 331 |
|
|
{
|
| 332 |
|
|
cable_flush();
|
| 333 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 334 |
|
|
return err;
|
| 335 |
|
|
}
|
| 336 |
|
|
err = adbg_wb_burst_write((void *)data, 1, len, adr); // 'len' is in words...
|
| 337 |
|
|
}
|
| 338 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 339 |
|
|
{
|
| 340 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_WISHBONE)))
|
| 341 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x0, adr, len)))
|
| 342 |
|
|
err = legacy_dbg_go((unsigned char*)data, len, 0);
|
| 343 |
|
|
}
|
| 344 |
|
|
cable_flush();
|
| 345 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 346 |
|
|
return err;
|
| 347 |
|
|
}
|
| 348 |
|
|
|
| 349 |
|
|
|
| 350 |
|
|
/* read a register from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
| 351 |
|
|
int dbg_cpu0_read(unsigned long adr, unsigned long *data) {
|
| 352 |
|
|
int err;
|
| 353 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 354 |
|
|
|
| 355 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 356 |
|
|
{
|
| 357 |
|
|
if ((err = adbg_select_module(DC_CPU0)))
|
| 358 |
|
|
{
|
| 359 |
|
|
cable_flush();
|
| 360 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 361 |
|
|
return err;
|
| 362 |
|
|
}
|
| 363 |
|
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
| 364 |
|
|
}
|
| 365 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 366 |
|
|
{
|
| 367 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
| 368 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
| 369 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_go((unsigned char*)data, 4, 1)))
|
| 370 |
|
|
*data = ntohl(*data);
|
| 371 |
|
|
}
|
| 372 |
|
|
cable_flush();
|
| 373 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 374 |
|
|
debug("dbg_cpu_read(), addr 0x%X, data[0] = 0x%X\n", adr, data[0]);
|
| 375 |
|
|
return err;
|
| 376 |
|
|
}
|
| 377 |
|
|
|
| 378 |
|
|
/* read multiple registers from cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
| 379 |
|
|
int dbg_cpu0_read_block(unsigned long adr, unsigned long *data, int count) {
|
| 380 |
|
|
int err;
|
| 381 |
|
|
|
| 382 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 383 |
|
|
{
|
| 384 |
29 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
|
| 385 |
21 |
nyawn |
if ((err = adbg_select_module(DC_CPU0)))
|
| 386 |
|
|
{
|
| 387 |
|
|
cable_flush();
|
| 388 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 389 |
|
|
return err;
|
| 390 |
|
|
}
|
| 391 |
|
|
err = adbg_wb_burst_read(4, count, adr, (void *) data); // All CPU register reads / writes are bursts
|
| 392 |
29 |
nyawn |
cable_flush();
|
| 393 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 394 |
21 |
nyawn |
}
|
| 395 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 396 |
|
|
{
|
| 397 |
|
|
int i;
|
| 398 |
|
|
unsigned long readaddr = adr;
|
| 399 |
|
|
err = APP_ERR_NONE;
|
| 400 |
|
|
for(i = 0; i < count; i++) {
|
| 401 |
|
|
err |= dbg_cpu0_read(readaddr++, &data[i]);
|
| 402 |
14 |
nyawn |
}
|
| 403 |
21 |
nyawn |
}
|
| 404 |
29 |
nyawn |
|
| 405 |
21 |
nyawn |
debug("dbg_cpu_read_block(), addr 0x%X, count %i, data[0] = 0x%X\n", adr, count, data[0]);
|
| 406 |
|
|
return err;
|
| 407 |
|
|
}
|
| 408 |
|
|
|
| 409 |
|
|
/* write a cpu register to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
| 410 |
|
|
int dbg_cpu0_write(unsigned long adr, unsigned long data) {
|
| 411 |
|
|
int err;
|
| 412 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 413 |
|
|
|
| 414 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 415 |
|
|
{
|
| 416 |
|
|
if ((err = adbg_select_module(DC_CPU0)))
|
| 417 |
|
|
{
|
| 418 |
|
|
cable_flush();
|
| 419 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 420 |
|
|
return err;
|
| 421 |
|
|
}
|
| 422 |
|
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
| 423 |
|
|
}
|
| 424 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 425 |
|
|
{
|
| 426 |
|
|
data = ntohl(data);
|
| 427 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
| 428 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
| 429 |
|
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
| 430 |
|
|
}
|
| 431 |
|
|
debug("cpu0_write, adr 0x%X, data 0x%X, ret %i\n", adr, data, err);
|
| 432 |
|
|
cable_flush();
|
| 433 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 434 |
|
|
return err;
|
| 435 |
|
|
}
|
| 436 |
|
|
|
| 437 |
|
|
/* write multiple cpu registers to cpu0. This is assumed to be an OR32 CPU, with 32-bit regs. */
|
| 438 |
|
|
int dbg_cpu0_write_block(unsigned long adr, unsigned long *data, int count) {
|
| 439 |
|
|
int err;
|
| 440 |
29 |
nyawn |
|
| 441 |
21 |
nyawn |
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 442 |
|
|
{
|
| 443 |
29 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
|
| 444 |
21 |
nyawn |
if ((err = adbg_select_module(DC_CPU0)))
|
| 445 |
|
|
{
|
| 446 |
|
|
cable_flush();
|
| 447 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 448 |
|
|
return err;
|
| 449 |
|
|
}
|
| 450 |
|
|
err = adbg_wb_burst_write((void *)data, 4, count, adr);
|
| 451 |
29 |
nyawn |
cable_flush();
|
| 452 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 453 |
21 |
nyawn |
}
|
| 454 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 455 |
|
|
{
|
| 456 |
|
|
int i;
|
| 457 |
|
|
unsigned long writeaddr = adr;
|
| 458 |
|
|
err = APP_ERR_NONE;
|
| 459 |
|
|
for(i = 0; i < count; i++) {
|
| 460 |
|
|
err |= dbg_cpu0_write(writeaddr++, data[i]);
|
| 461 |
|
|
}
|
| 462 |
|
|
}
|
| 463 |
|
|
debug("cpu0_write_block, adr 0x%X, data[0] 0x%X, count %i, ret %i\n", adr, data[0], count, err);
|
| 464 |
29 |
nyawn |
|
| 465 |
21 |
nyawn |
return err;
|
| 466 |
|
|
}
|
| 467 |
|
|
|
| 468 |
|
|
/* write a debug unit cpu module register
|
| 469 |
|
|
* Since OR32 debug module has only 1 register,
|
| 470 |
|
|
* adr is ignored (for now) */
|
| 471 |
|
|
int dbg_cpu0_write_ctrl(unsigned long adr, unsigned char data) {
|
| 472 |
|
|
int err = APP_ERR_NONE;
|
| 473 |
|
|
uint32_t dataword = data;
|
| 474 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 475 |
|
|
|
| 476 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 477 |
|
|
{
|
| 478 |
|
|
if ((err = adbg_select_module(DC_CPU0))) {
|
| 479 |
|
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
| 480 |
|
|
cable_flush();
|
| 481 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 482 |
|
|
return err;
|
| 483 |
|
|
}
|
| 484 |
|
|
if((err = adbg_ctrl_write(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
| 485 |
|
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU0,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
| 486 |
|
|
cable_flush();
|
| 487 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 488 |
|
|
return err;
|
| 489 |
|
|
}
|
| 490 |
|
|
}
|
| 491 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 492 |
|
|
{
|
| 493 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
| 494 |
|
|
err = legacy_dbg_ctrl(data & 2, data &1);
|
| 495 |
|
|
}
|
| 496 |
|
|
debug("cpu0_write_ctrl(): set reg to 0x%X\n", data);
|
| 497 |
|
|
cable_flush();
|
| 498 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 499 |
|
|
return err;
|
| 500 |
|
|
}
|
| 501 |
|
|
|
| 502 |
|
|
|
| 503 |
|
|
/* read a register from cpu module of the debug unit.
|
| 504 |
|
|
* Currently, there is only 1 register, so we do not need to select it, adr is ignored
|
| 505 |
|
|
*/
|
| 506 |
|
|
int dbg_cpu0_read_ctrl(unsigned long adr, unsigned char *data) {
|
| 507 |
|
|
int err = APP_ERR_NONE;
|
| 508 |
|
|
uint32_t dataword;
|
| 509 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 510 |
|
|
|
| 511 |
|
|
// reset is bit 1, stall is bit 0 in *data
|
| 512 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 513 |
|
|
{
|
| 514 |
|
|
if ((err = adbg_select_module(DC_CPU0))) {
|
| 515 |
|
|
printf("Failed to set chain to 0x%X\n", DC_CPU0);
|
| 516 |
|
|
cable_flush();
|
| 517 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 518 |
|
|
return err;
|
| 519 |
|
|
}
|
| 520 |
|
|
if ((err = adbg_ctrl_read(DBG_CPU0_REG_STATUS, &dataword, 2))) {
|
| 521 |
|
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU0_REG_STATUS);
|
| 522 |
|
|
cable_flush();
|
| 523 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 524 |
|
|
return err;
|
| 525 |
|
|
}
|
| 526 |
|
|
*data = dataword;
|
| 527 |
|
|
}
|
| 528 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 529 |
|
|
{
|
| 530 |
|
|
int r, s;
|
| 531 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU0)))
|
| 532 |
|
|
err = legacy_dbg_ctrl_read(&r, &s);
|
| 533 |
|
|
*data = (r << 1) | s;
|
| 534 |
|
|
debug("api cpu0 read ctrl: r = %i, s = %i, data = %i\n", r, s, *data);
|
| 535 |
|
|
}
|
| 536 |
|
|
cable_flush();
|
| 537 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 538 |
|
|
return err;
|
| 539 |
|
|
}
|
| 540 |
|
|
|
| 541 |
|
|
// CPU1 Functions. Note that 2 CPUs are not currently supported by GDB, so these are never actually
|
| 542 |
|
|
// called from the GDB interface. They are included for completeness and future use.
|
| 543 |
|
|
// read a register from cpu1
|
| 544 |
|
|
int dbg_cpu1_read(unsigned long adr, unsigned long *data)
|
| 545 |
|
|
{
|
| 546 |
|
|
int err;
|
| 547 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 548 |
|
|
|
| 549 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 550 |
|
|
{
|
| 551 |
|
|
if ((err = adbg_select_module(DC_CPU1)))
|
| 552 |
|
|
{
|
| 553 |
|
|
cable_flush();
|
| 554 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 555 |
|
|
return err;
|
| 556 |
|
|
}
|
| 557 |
|
|
err = adbg_wb_burst_read(4, 1, adr, (void *) data); // All CPU register reads / writes are bursts
|
| 558 |
|
|
}
|
| 559 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 560 |
|
|
{
|
| 561 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
| 562 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x6, adr, 4)))
|
| 563 |
|
|
err = legacy_dbg_go((unsigned char*)data, 4, 1);
|
| 564 |
|
|
*data = ntohl(*data);
|
| 565 |
|
|
}
|
| 566 |
|
|
cable_flush();
|
| 567 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 568 |
|
|
return err;
|
| 569 |
|
|
}
|
| 570 |
|
|
|
| 571 |
|
|
|
| 572 |
|
|
// write a cpu register
|
| 573 |
|
|
int dbg_cpu1_write(unsigned long adr, unsigned long data)
|
| 574 |
|
|
{
|
| 575 |
|
|
int err;
|
| 576 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 577 |
|
|
|
| 578 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 579 |
|
|
{
|
| 580 |
|
|
if ((err = adbg_select_module(DC_CPU0)))
|
| 581 |
|
|
{
|
| 582 |
|
|
cable_flush();
|
| 583 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 584 |
|
|
return err;
|
| 585 |
|
|
}
|
| 586 |
|
|
err = adbg_wb_burst_write((void *)&data, 4, 1, adr);
|
| 587 |
|
|
}
|
| 588 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 589 |
|
|
{
|
| 590 |
|
|
data = ntohl(data);
|
| 591 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
| 592 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_command(0x2, adr, 4)))
|
| 593 |
|
|
err = legacy_dbg_go((unsigned char*)&data, 4, 0);
|
| 594 |
|
|
}
|
| 595 |
|
|
cable_flush();
|
| 596 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 597 |
|
|
return err;
|
| 598 |
|
|
}
|
| 599 |
|
|
|
| 600 |
|
|
|
| 601 |
|
|
// write a debug unit cpu module register
|
| 602 |
|
|
int dbg_cpu1_write_ctrl(unsigned long adr, unsigned char data) {
|
| 603 |
|
|
int err;
|
| 604 |
|
|
uint32_t dataword = data;
|
| 605 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 606 |
|
|
|
| 607 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 608 |
|
|
{
|
| 609 |
|
|
if ((err = adbg_select_module(DC_CPU1))) {
|
| 610 |
|
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
| 611 |
|
|
cable_flush();
|
| 612 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 613 |
|
|
return err;
|
| 614 |
|
|
}
|
| 615 |
|
|
if((err = adbg_ctrl_write(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
| 616 |
|
|
printf("Failed to write chain to 0x%X control reg 0x%X\n", DC_CPU1,DBG_CPU0_REG_STATUS ); // Only 2 bits: Reset, Stall
|
| 617 |
|
|
cable_flush();
|
| 618 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 619 |
|
|
return err;
|
| 620 |
|
|
}
|
| 621 |
|
|
}
|
| 622 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 623 |
|
|
{
|
| 624 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
| 625 |
|
|
err = legacy_dbg_ctrl(data & 2, data & 1);
|
| 626 |
|
|
}
|
| 627 |
|
|
cable_flush();
|
| 628 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 629 |
|
|
return err;
|
| 630 |
|
|
}
|
| 631 |
|
|
|
| 632 |
|
|
|
| 633 |
|
|
// read a debug unit cpu module register
|
| 634 |
|
|
int dbg_cpu1_read_ctrl(unsigned long adr, unsigned char *data) {
|
| 635 |
|
|
int err;
|
| 636 |
|
|
uint32_t dataword;
|
| 637 |
|
|
pthread_mutex_lock(&dbg_access_mutex);
|
| 638 |
|
|
|
| 639 |
|
|
// reset is bit 1, stall is bit 0 in *data
|
| 640 |
|
|
|
| 641 |
|
|
if(DEBUG_HARDWARE == DBG_HW_ADVANCED)
|
| 642 |
|
|
{
|
| 643 |
|
|
if ((err = adbg_select_module(DC_CPU1))) {
|
| 644 |
|
|
printf("Failed to set chain to 0x%X\n", DC_CPU1);
|
| 645 |
|
|
cable_flush();
|
| 646 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 647 |
|
|
return err;
|
| 648 |
|
|
}
|
| 649 |
|
|
if ((err = adbg_ctrl_read(DBG_CPU1_REG_STATUS, &dataword, 2))) {
|
| 650 |
|
|
printf("Failed to read chain 0x%X control reg 0x%X\n", DC_CPU0, DBG_CPU1_REG_STATUS);
|
| 651 |
|
|
cable_flush();
|
| 652 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 653 |
|
|
return err;
|
| 654 |
|
|
}
|
| 655 |
|
|
*data = dataword;
|
| 656 |
|
|
}
|
| 657 |
|
|
else if(DEBUG_HARDWARE == DBG_HW_LEGACY)
|
| 658 |
|
|
{
|
| 659 |
|
|
int r, s;
|
| 660 |
|
|
if (APP_ERR_NONE == (err = legacy_dbg_set_chain(DC_CPU1)))
|
| 661 |
|
|
err = legacy_dbg_ctrl_read(&r, &s);
|
| 662 |
|
|
*data = (r << 1) | s;
|
| 663 |
|
|
}
|
| 664 |
|
|
cable_flush();
|
| 665 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 666 |
|
|
return err;
|
| 667 |
|
|
}
|
| 668 |
|
|
|
| 669 |
42 |
nyawn |
int dbg_serial_sndrcv(unsigned int *bytes_to_send, const char *data_to_send, unsigned int *bytes_received, char *data_received) {
|
| 670 |
|
|
int err;
|
| 671 |
21 |
nyawn |
|
| 672 |
42 |
nyawn |
pthread_mutex_lock(&dbg_access_mutex);
|
| 673 |
21 |
nyawn |
|
| 674 |
42 |
nyawn |
if ((err = adbg_select_module(DC_JSP))) {
|
| 675 |
|
|
printf("Failed to set chain to 0x%X\n", DC_JSP);
|
| 676 |
|
|
cable_flush();
|
| 677 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 678 |
|
|
return err;
|
| 679 |
|
|
}
|
| 680 |
|
|
|
| 681 |
|
|
err = adbg_jsp_transact(bytes_to_send, data_to_send, bytes_received, data_received);
|
| 682 |
|
|
|
| 683 |
|
|
cable_flush();
|
| 684 |
|
|
pthread_mutex_unlock(&dbg_access_mutex);
|
| 685 |
|
|
|
| 686 |
|
|
return err;
|
| 687 |
|
|
}
|
| 688 |
|
|
|
| 689 |
|
|
|
