OpenCores
URL https://opencores.org/ocsvn/aes_decry_ip_128bit/aes_decry_ip_128bit/trunk

Subversion Repositories aes_decry_ip_128bit

[/] [aes_decry_ip_128bit/] [trunk/] [testbench/] [simulate.do] - Blame information for rev 6

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 5 ghegde 
vlib work
2 6 ghegde 
vcom ../rtl/key_schd/*.vhd
3 
vcom ../rtl/*.vhd
4 5 ghegde 
vcom ./*.vhd
5 
vsim -novopt tb_AES_decrypt
6 
 
7 
add wave -noupdate -format Logic -radix unsigned /tb_AES_decrypt/clk
8 
add wave -noupdate -format Logic -radix unsigned /tb_AES_decrypt/reset
9 
 
10 
add wave -noupdate -divider input
11 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/cipher
12 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/key
13 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/k_valid
14 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/c_valid
15 
 
16 
add wave -noupdate -divider output
17 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/text_out
18 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/ready
19 
add wave -noupdate -format Logic -radix hex /tb_AES_decrypt/out_valid
20 
 
21 6 ghegde 
run -all

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.