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[/] [amber/] [trunk/] [hw/] [tests/] [sub.S] - Blame information for rev 2

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/*****************************************************************
//                                                              //
//  Amber 2 Core Instruction Test                               //
//                                                              //
//  This file is part of the Amber project                      //
//  http://www.opencores.org/project,amber                      //
//                                                              //
//  Description                                                 //
//  Tests sub and subs                                          //
//                                                              //
//  Author(s):                                                  //
//      - Conor Santifort, csantifort.amber@gmail.com           //
//                                                              //
//////////////////////////////////////////////////////////////////
//                                                              //
// Copyright (C) 2010 Authors and OPENCORES.ORG                 //
//                                                              //
// This source file may be used and distributed without         //
// restriction provided that this copyright statement is not    //
// removed from the file and that any derivative work contains  //
// the original copyright notice and the associated disclaimer. //
//                                                              //
// This source file is free software; you can redistribute it   //
// and/or modify it under the terms of the GNU Lesser General   //
// Public License as published by the Free Software Foundation; //
// either version 2.1 of the License, or (at your option) any   //
// later version.                                               //
//                                                              //
// This source is distributed in the hope that it will be       //
// useful, but WITHOUT ANY WARRANTY; without even the implied   //
// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      //
// PURPOSE.  See the GNU Lesser General Public License for more //
// details.                                                     //
//                                                              //
// You should have received a copy of the GNU Lesser General    //
// Public License along with this source; if not, download it   //
// from http://www.opencores.org/lgpl.shtml                     //
//                                                              //
*****************************************************************/
 
#include "amber_registers.h"
 
        .section .text
        .globl  main
main:
        @ enable the cache
        mov     r0,  #0x4
        mcr     p15, 0, r0, c1, c0, 0
 
        @ Load some bytes into the testbench uart
        @ so it can transmit them to the Amber UART
        ldr     r4, AdrTEST_UART_TXD
        ldr     r5, =Message
        ldr     r7, =EndMessage
        ldr     r8, AdrTEST_UART_STATUS
 
        @ transmit a byte from test uart
1:      ldrb    r6, [r5], #1
        str     r6, [r4]
 
        @ full message transmitted?
        cmp     r5, r7
        bne     1b
 
        @ test_uart transmit enable
        ldr     r0, AdrTEST_UART_CONTROL
        mov     r1, #1
        str     r1, [r0]
 
        /* Enable the UART FIFO */
        ldr     r4, AdrUARTLCR
        mov     r5, #0x10
        str     r5, [r4]
 
        mov     r8, #10
        mov     lr, #0x800
        mov     sp, #0
        mov     r6, #0
 
3:      mov     r0, #1
        bl      _inbyte
        add     r5, sp, #24
        subs    r7, r0, #0
        sub     r5, r5, #6
        add     r3, r6, #4
        bge     2f
 
        mov     r10, #10
        b       testfail
 
2:      subs    r8, r8, #1
        beq     testpass
        b       3b
 
 
        @ r0 is the timeout in mS
        .globl _inbyte
_inbyte:
        ldr     r1, AdrUARTDR
        ldr     r3, AdrUARTFR
 
        @ Multiple delay value by 2560
        @ as the delay loop takes about 12 clock cycles running cached
        @ so that factor gives 1:1mS @33MHz
        mov     r2, r0, lsl #11
        add     r2, r2, r0, lsl #9
 
        @ Check the rx empty flag
2:      ldr     r0, [r3]
        ands    r0, r0, #0x10
        ldreqb  r0, [r1]
        moveq   pc, lr
 
        @ decrement timeout
        subs    r2, r2, #1
        bne     2b
 
        mov     r0, #-1
        mov     pc, lr
 
 
testfail:
        ldr     r11, AdrTestStatus
        str     r10, [r11]
        b       testfail
 
testpass:
        ldr     r11, AdrTestStatus
        mov     r10, #17
        str     r10, [r11]
        b       testpass
 
 
/* Write 17 to this address to generate a Test Passed message */
AdrTestStatus:  .word  ADR_AMBER_TEST_STATUS
MaxPos:         .word  0x7fffffff
AdrUARTDR:      .word  ADR_AMBER_UART0_DR
AdrUARTFR:      .word  ADR_AMBER_UART0_FR
AdrUARTLCR:     .word  ADR_AMBER_UART0_LCRH
 
AdrTEST_UART_CONTROL:   .word  ADR_AMBER_TEST_UART_CONTROL
AdrTEST_UART_STATUS:    .word  ADR_AMBER_TEST_UART_STATUS
AdrTEST_UART_TXD:       .word  ADR_AMBER_TEST_UART_TXD
 
Message:                .ascii "abcdefghijkl"
EndMessage:             .word  0
 
/* ========================================================================= */
/* ========================================================================= */
 
 

Line No.	Rev	Author	Line
1	2	csantifort	`/*****************************************************************`
2			`// //`
3			`// Amber 2 Core Instruction Test //`
4			`// //`
5			`// This file is part of the Amber project //`
6			`// http://www.opencores.org/project,amber //`
7			`// //`
8			`// Description //`
9			`// Tests sub and subs //`
10			`// //`
11			`// Author(s): //`
12			`// - Conor Santifort, csantifort.amber@gmail.com //`
13			`// //`
14			`//////////////////////////////////////////////////////////////////`
15			`// //`
16			`// Copyright (C) 2010 Authors and OPENCORES.ORG //`
17			`// //`
18			`// This source file may be used and distributed without //`
19			`// restriction provided that this copyright statement is not //`
20			`// removed from the file and that any derivative work contains //`
21			`// the original copyright notice and the associated disclaimer. //`
22			`// //`
23			`// This source file is free software; you can redistribute it //`
24			`// and/or modify it under the terms of the GNU Lesser General //`
25			`// Public License as published by the Free Software Foundation; //`
26			`// either version 2.1 of the License, or (at your option) any //`
27			`// later version. //`
28			`// //`
29			`// This source is distributed in the hope that it will be //`
30			`// useful, but WITHOUT ANY WARRANTY; without even the implied //`
31			`// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //`
32			`// PURPOSE. See the GNU Lesser General Public License for more //`
33			`// details. //`
34			`// //`
35			`// You should have received a copy of the GNU Lesser General //`
36			`// Public License along with this source; if not, download it //`
37			`// from http://www.opencores.org/lgpl.shtml //`
38			`// //`
39			`*****************************************************************/`
40
41			`#include "amber_registers.h"`
42
43			`.section .text`
44			`.globl main`
45			`main:`
46			`@ enable the cache`
47			`mov r0, #0x4`
48			`mcr p15, 0, r0, c1, c0, 0`
49
50			`@ Load some bytes into the testbench uart`
51			`@ so it can transmit them to the Amber UART`
52			`ldr r4, AdrTEST_UART_TXD`
53			`ldr r5, =Message`
54			`ldr r7, =EndMessage`
55			`ldr r8, AdrTEST_UART_STATUS`
56
57			`@ transmit a byte from test uart`
58			`1: ldrb r6, [r5], #1`
59			`str r6, [r4]`
60
61			`@ full message transmitted?`
62			`cmp r5, r7`
63			`bne 1b`
64
65			`@ test_uart transmit enable`
66			`ldr r0, AdrTEST_UART_CONTROL`
67			`mov r1, #1`
68			`str r1, [r0]`
69
70			`/* Enable the UART FIFO */`
71			`ldr r4, AdrUARTLCR`
72			`mov r5, #0x10`
73			`str r5, [r4]`
74
75			`mov r8, #10`
76			`mov lr, #0x800`
77			`mov sp, #0`
78			`mov r6, #0`
79
80			`3: mov r0, #1`
81			`bl _inbyte`
82			`add r5, sp, #24`
83			`subs r7, r0, #0`
84			`sub r5, r5, #6`
85			`add r3, r6, #4`
86			`bge 2f`
87
88			`mov r10, #10`
89			`b testfail`
90
91			`2: subs r8, r8, #1`
92			`beq testpass`
93			`b 3b`
94
95
96			`@ r0 is the timeout in mS`
97			`.globl _inbyte`
98			`_inbyte:`
99			`ldr r1, AdrUARTDR`
100			`ldr r3, AdrUARTFR`
101
102			`@ Multiple delay value by 2560`
103			`@ as the delay loop takes about 12 clock cycles running cached`
104			`@ so that factor gives 1:1mS @33MHz`
105			`mov r2, r0, lsl #11`
106			`add r2, r2, r0, lsl #9`
107
108			`@ Check the rx empty flag`
109			`2: ldr r0, [r3]`
110			`ands r0, r0, #0x10`
111			`ldreqb r0, [r1]`
112			`moveq pc, lr`
113
114			`@ decrement timeout`
115			`subs r2, r2, #1`
116			`bne 2b`
117
118			`mov r0, #-1`
119			`mov pc, lr`
120
121
122			`testfail:`
123			`ldr r11, AdrTestStatus`
124			`str r10, [r11]`
125			`b testfail`
126
127			`testpass:`
128			`ldr r11, AdrTestStatus`
129			`mov r10, #17`
130			`str r10, [r11]`
131			`b testpass`
132
133
134			`/* Write 17 to this address to generate a Test Passed message */`
135			`AdrTestStatus: .word ADR_AMBER_TEST_STATUS`
136			`MaxPos: .word 0x7fffffff`
137			`AdrUARTDR: .word ADR_AMBER_UART0_DR`
138			`AdrUARTFR: .word ADR_AMBER_UART0_FR`
139			`AdrUARTLCR: .word ADR_AMBER_UART0_LCRH`
140
141			`AdrTEST_UART_CONTROL: .word ADR_AMBER_TEST_UART_CONTROL`
142			`AdrTEST_UART_STATUS: .word ADR_AMBER_TEST_UART_STATUS`
143			`AdrTEST_UART_TXD: .word ADR_AMBER_TEST_UART_TXD`
144
145			`Message: .ascii "abcdefghijkl"`
146			`EndMessage: .word 0`
147
148			`/* ========================================================================= */`
149			`/* ========================================================================= */`
150
151

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[/] [amber/] [trunk/] [hw/] [tests/] [sub.S] - Blame information for rev 2