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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [ip/] [Processor/] [aeMB.IP] - Blame information for rev 48

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#######################################################################
##      File: aeMB.IP
##
##      Copyright (C) 2014-2019  Alireza Monemi
##
##      This file is part of ProNoC 1.9.1
##
##      WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
##      MAY CAUSE UNEXPECTED BEHAVIOR.
################################################################################
 
$ipgen = bless( {
                  'plugs' => {
                               'enable' => {
                                             'value' => 1,
                                             '0' => {
                                                      'name' => 'enable'
                                                    },
                                             'enable' => {},
                                             'type' => 'num'
                                           },
                               'wb_master' => {
                                                'wb_master' => {},
                                                'value' => 2,
                                                'type' => 'num',
                                                '0' => {
                                                         'name' => 'iwb'
                                                       },
                                                '1' => {
                                                         'name' => 'dwb'
                                                       }
                                              },
                               'clk' => {
                                          'clk' => {},
                                          '0' => {
                                                   'name' => 'clk'
                                                 },
                                          'type' => 'num',
                                          'value' => 1
                                        },
                               'reset' => {
                                            'reset' => {},
                                            'value' => 1,
                                            'type' => 'num',
                                            '0' => {
                                                     'name' => 'reset'
                                                   }
                                          }
                             },
                  'sockets' => {
                                 'interrupt_cpu' => {
                                                      'type' => 'num',
                                                      '0' => {
                                                               'name' => 'interrupt_cpu'
                                                             },
                                                      'connection_num' => 'single connection',
                                                      'value' => 1
                                                    }
                               },
                  'gen_sw_files_ticked' => [],
                  'system_h' => '
#include "aemb/core.hh"
 
static inline void nop (void) {
                asm volatile ("nop");
}
 
void general_int_main( void ) __attribute__ ((interrupt_handler)); // general_int_main() is defined by interrupt controller
void aemb_enable_interrupt (void);
void exit (int);
 
#define general_cpu_int_en   aemb_enable_interrupt
 
',
                  'parameters' => {
                                    'AEMB_BSF' => {
                                                    'content' => '',
                                                    'global_param' => 'Localparam',
                                                    'type' => 'Fixed',
                                                    'info' => undef,
                                                    'redefine_param' => 1,
                                                    'default' => ' 1'
                                                  },
                                    'AEMB_ICH' => {
                                                    'global_param' => 'Localparam',
                                                    'content' => '',
                                                    'default' => ' 11',
                                                    'redefine_param' => 1,
                                                    'info' => undef,
                                                    'type' => 'Fixed'
                                                  },
                                    'AEMB_IDX' => {
                                                    'type' => 'Fixed',
                                                    'info' => undef,
                                                    'redefine_param' => 1,
                                                    'default' => ' 6',
                                                    'content' => '',
                                                    'global_param' => 'Localparam'
                                                  },
                                    'AEMB_IWB' => {
                                                    'info' => undef,
                                                    'type' => 'Fixed',
                                                    'redefine_param' => 1,
                                                    'default' => ' 32',
                                                    'content' => '',
                                                    'global_param' => 'Localparam'
                                                  },
                                    'AEMB_DWB' => {
                                                    'global_param' => 'Localparam',
                                                    'content' => '',
                                                    'default' => ' 32',
                                                    'redefine_param' => 1,
                                                    'type' => 'Fixed',
                                                    'info' => undef
                                                  },
                                    'AEMB_MUL' => {
                                                    'content' => '',
                                                    'global_param' => 'Localparam',
                                                    'type' => 'Fixed',
                                                    'info' => undef,
                                                    'default' => ' 1',
                                                    'redefine_param' => 1
                                                  },
                                    'STACK_SIZE' => {
                                                      'content' => '',
                                                      'global_param' => 'Don\'t include',
                                                      'type' => 'Entry',
                                                      'info' => 'The stack size in hex',
                                                      'redefine_param' => 0,
                                                      'default' => '0x400'
                                                    },
                                    'AEMB_XWB' => {
                                                    'global_param' => 'Localparam',
                                                    'content' => '',
                                                    'default' => ' 7',
                                                    'redefine_param' => 1,
                                                    'type' => 'Fixed',
                                                    'info' => undef
                                                  },
                                    'HEAP_SIZE' => {
                                                     'global_param' => 'Don\'t include',
                                                     'content' => '',
                                                     'default' => '0x400',
                                                     'redefine_param' => 0,
                                                     'type' => 'Entry',
                                                     'info' => undef
                                                   }
                                  },
                  'description' => 'AEMB 32-bit Microprocessor Core
For more information check      http://opencores.org/project,aemb',
                  'ip_name' => 'aeMB',
                  'module_name' => 'aeMB_top',
                  'ports_order' => [
                                     'dwb_adr_o',
                                     'dwb_cyc_o',
                                     'dwb_dat_o',
                                     'dwb_sel_o',
                                     'dwb_stb_o',
                                     'dwb_tag_o',
                                     'dwb_wre_o',
                                     'dwb_cti_o',
                                     'dwb_bte_o',
                                     'dwb_ack_i',
                                     'dwb_dat_i',
                                     'dwb_err_i',
                                     'dwb_rty_i',
                                     'iwb_adr_o',
                                     'iwb_cyc_o',
                                     'iwb_sel_o',
                                     'iwb_stb_o',
                                     'iwb_tag_o',
                                     'iwb_wre_o',
                                     'iwb_dat_o',
                                     'iwb_cti_o',
                                     'iwb_bte_o',
                                     'iwb_ack_i',
                                     'iwb_dat_i',
                                     'iwb_err_i',
                                     'iwb_rty_i',
                                     'clk',
                                     'reset',
                                     'sys_int_i',
                                     'sys_ena_i'
                                   ],
                  'parameters_order' => [
                                          'AEMB_IWB',
                                          'AEMB_DWB',
                                          'AEMB_XWB',
                                          'AEMB_ICH',
                                          'AEMB_IDX',
                                          'AEMB_BSF',
                                          'AEMB_MUL',
                                          'STACK_SIZE',
                                          'HEAP_SIZE'
                                        ],
                  'file_name' => 'mpsoc/src_processor/aeMB/verilog/aemb.v',
                  'gui_status' => {
                                    'status' => 'ideal',
                                    'timeout' => 0
                                  },
                  'modules' => {
                                 'aeMB_top' => {}
                               },
                  'hdl_files' => [
                                   '/mpsoc/src_processor/aeMB/verilog/aemb.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_core.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_xecu.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_sim.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_bpcu.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_edk32.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_xslif.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_ctrl.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_ibuf.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_tpsram.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB_regf.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_exec.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sparam.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_intu.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_regs.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_spsram.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_memif.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_mult.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_gprf.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_pipe.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_brcc.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dparam.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk63.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_bsft.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_ctrl.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dwbif.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk62.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sim.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iche.v',
                                   '/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iwbif.v'
                                 ],
                  'gen_sw_files' => [
                                      '/mpsoc/src_processor/aeMB/sw/link.ldfrename_sep_tlink.ld'
                                    ],
                  'sw_files' => [
                                  '/mpsoc/src_processor/aeMB/sw/aemb',
                                  '/mpsoc/src_processor/aeMB/sw/aemb.specs',
                                  '/mpsoc/src_processor/aeMB/sw/Makefile'
                                ],
                  'unused' => undef,
                  'category' => 'Processor',
                  'version' => 10,
                  'ports' => {
                               'dwb_wre_o' => {
                                                'type' => 'output',
                                                'intfc_port' => 'we_o',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => ''
                                              },
                               'dwb_ack_i' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'type' => 'input',
                                                'intfc_port' => 'ack_i'
                                              },
                               'iwb_bte_o' => {
                                                'range' => '1:0',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'type' => 'output',
                                                'intfc_port' => 'bte_o'
                                              },
                               'iwb_wre_o' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'type' => 'output',
                                                'intfc_port' => 'we_o'
                                              },
                               'iwb_ack_i' => {
                                                'type' => 'input',
                                                'intfc_port' => 'ack_i',
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[0]'
                                              },
                               'dwb_adr_o' => {
                                                'range' => '31:0',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'intfc_port' => 'adr_o',
                                                'type' => 'output'
                                              },
                               'clk' => {
                                          'intfc_port' => 'clk_i',
                                          'type' => 'input',
                                          'intfc_name' => 'plug:clk[0]',
                                          'range' => ''
                                        },
                               'iwb_tag_o' => {
                                                'intfc_port' => 'tag_o',
                                                'type' => 'output',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'range' => '2:0'
                                              },
                               'iwb_err_i' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'type' => 'input',
                                                'intfc_port' => 'err_i'
                                              },
                               'dwb_cti_o' => {
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => '2:0',
                                                'intfc_port' => 'cti_o',
                                                'type' => 'output'
                                              },
                               'dwb_cyc_o' => {
                                                'type' => 'output',
                                                'intfc_port' => 'cyc_o',
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[1]'
                                              },
                               'dwb_err_i' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'type' => 'input',
                                                'intfc_port' => 'err_i'
                                              },
                               'dwb_bte_o' => {
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => '1:0',
                                                'type' => 'output',
                                                'intfc_port' => 'bte_o'
                                              },
                               'iwb_cti_o' => {
                                                'intfc_port' => 'cti_o',
                                                'type' => 'output',
                                                'range' => '2:0',
                                                'intfc_name' => 'plug:wb_master[0]'
                                              },
                               'iwb_adr_o' => {
                                                'type' => 'output',
                                                'intfc_port' => 'adr_o',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'range' => '31:0'
                                              },
                               'sys_ena_i' => {
                                                'intfc_name' => 'plug:enable[0]',
                                                'range' => '',
                                                'intfc_port' => 'enable_i',
                                                'type' => 'input'
                                              },
                               'iwb_cyc_o' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'intfc_port' => 'cyc_o',
                                                'type' => 'output'
                                              },
                               'dwb_dat_o' => {
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => '31:0',
                                                'type' => 'output',
                                                'intfc_port' => 'dat_o'
                                              },
                               'dwb_stb_o' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'intfc_port' => 'stb_o',
                                                'type' => 'output'
                                              },
                               'iwb_rty_i' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'intfc_port' => 'rty_i',
                                                'type' => 'input'
                                              },
                               'iwb_stb_o' => {
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'range' => '',
                                                'type' => 'output',
                                                'intfc_port' => 'stb_o'
                                              },
                               'dwb_dat_i' => {
                                                'range' => '31:0',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'type' => 'input',
                                                'intfc_port' => 'dat_i'
                                              },
                               'iwb_sel_o' => {
                                                'intfc_port' => 'sel_o',
                                                'type' => 'output',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'range' => '3:0'
                                              },
                               'dwb_sel_o' => {
                                                'intfc_port' => 'sel_o',
                                                'type' => 'output',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => '3:0'
                                              },
                               'iwb_dat_o' => {
                                                'range' => '31:0',
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'type' => 'output',
                                                'intfc_port' => 'dat_o'
                                              },
                               'sys_int_i' => {
                                                'type' => 'input',
                                                'intfc_port' => 'int_i',
                                                'range' => '',
                                                'intfc_name' => 'socket:interrupt_cpu[0]'
                                              },
                               'iwb_dat_i' => {
                                                'intfc_name' => 'plug:wb_master[0]',
                                                'range' => '31:0',
                                                'type' => 'input',
                                                'intfc_port' => 'dat_i'
                                              },
                               'dwb_rty_i' => {
                                                'range' => '',
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'type' => 'input',
                                                'intfc_port' => 'rty_i'
                                              },
                               'reset' => {
                                            'intfc_name' => 'plug:reset[0]',
                                            'range' => '',
                                            'type' => 'input',
                                            'intfc_port' => 'reset_i'
                                          },
                               'dwb_tag_o' => {
                                                'intfc_name' => 'plug:wb_master[1]',
                                                'range' => '2:0',
                                                'type' => 'output',
                                                'intfc_port' => 'tag_o'
                                              }
                             },
                  'system_c' => '
 #include "aemb/core.cc"
 
/*!
* Assembly macro to enable MSR_IE
*/
void aemb_enable_interrupt ()
{
  int msr, tmp;
  asm volatile ("mfs %0, rmsr;"
                "ori %1, %0, 0x02;"
                "mts rmsr, %1;"
                : "=r"(msr)
                : "r" (tmp)
                );
}
 
void aemb_disable_interrupt ()
{
  int msr, tmp;
  asm volatile ("mfs %0, rmsr;"
               "andi %1, %0, 0xFD;"
               "mts rmsr, %1;"
               : "=r"(msr)
               : "r" (tmp)
               );
}
 
 
/* Loops/exits simulation */
void exit (int i)
{
  aemb_disable_interrupt ();
  while (1);
}
 
 
 
 
'
                }, 'ip_gen' );

Line No.	Rev	Author	Line
1	25	alirezamon	`#######################################################################`
2			`## File: aeMB.IP`
3			`##`
4	48	alirezamon	`## Copyright (C) 2014-2019 Alireza Monemi`
5	25	alirezamon	`##`
6	48	alirezamon	`## This file is part of ProNoC 1.9.1`
7	25	alirezamon	`##`
8			`## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT`
9	48	alirezamon	`## MAY CAUSE UNEXPECTED BEHAVIOR.`
10	25	alirezamon	`################################################################################`
11
12	38	alirezamon	`$ipgen = bless( {`
13	48	alirezamon	`'plugs' => {`
14			`'enable' => {`
15			`'value' => 1,`
16			`'0' => {`
17			`'name' => 'enable'`
18			`},`
19			`'enable' => {},`
20			`'type' => 'num'`
21			`},`
22			`'wb_master' => {`
23			`'wb_master' => {},`
24			`'value' => 2,`
25			`'type' => 'num',`
26			`'0' => {`
27			`'name' => 'iwb'`
28			`},`
29			`'1' => {`
30			`'name' => 'dwb'`
31			`}`
32			`},`
33			`'clk' => {`
34			`'clk' => {},`
35			`'0' => {`
36			`'name' => 'clk'`
37			`},`
38			`'type' => 'num',`
39			`'value' => 1`
40			`},`
41			`'reset' => {`
42			`'reset' => {},`
43			`'value' => 1,`
44			`'type' => 'num',`
45			`'0' => {`
46			`'name' => 'reset'`
47			`}`
48			`}`
49			`},`
50			`'sockets' => {`
51			`'interrupt_cpu' => {`
52			`'type' => 'num',`
53			`'0' => {`
54			`'name' => 'interrupt_cpu'`
55			`},`
56			`'connection_num' => 'single connection',`
57			`'value' => 1`
58			`}`
59			`},`
60			`'gen_sw_files_ticked' => [],`
61			`'system_h' => '`
62			`#include "aemb/core.hh"`
63
64			`static inline void nop (void) {`
65			`asm volatile ("nop");`
66			`}`
67
68			`void general_int_main( void ) __attribute__ ((interrupt_handler)); // general_int_main() is defined by interrupt controller`
69			`void aemb_enable_interrupt (void);`
70			`void exit (int);`
71
72			`#define general_cpu_int_en aemb_enable_interrupt`
73
74			`',`
75	38	alirezamon	`'parameters' => {`
76			`'AEMB_BSF' => {`
77			`'content' => '',`
78			`'global_param' => 'Localparam',`
79			`'type' => 'Fixed',`
80	48	alirezamon	`'info' => undef,`
81	38	alirezamon	`'redefine_param' => 1,`
82	48	alirezamon	`'default' => ' 1'`
83	38	alirezamon	`},`
84	48	alirezamon	`'AEMB_ICH' => {`
85	38	alirezamon	`'global_param' => 'Localparam',`
86			`'content' => '',`
87	48	alirezamon	`'default' => ' 11',`
88			`'redefine_param' => 1,`
89	38	alirezamon	`'info' => undef,`
90	48	alirezamon	`'type' => 'Fixed'`
91	38	alirezamon	`},`
92	48	alirezamon	`'AEMB_IDX' => {`
93			`'type' => 'Fixed',`
94	38	alirezamon	`'info' => undef,`
95			`'redefine_param' => 1,`
96	48	alirezamon	`'default' => ' 6',`
97			`'content' => '',`
98	38	alirezamon	`'global_param' => 'Localparam'`
99			`},`
100	48	alirezamon	`'AEMB_IWB' => {`
101	38	alirezamon	`'info' => undef,`
102	48	alirezamon	`'type' => 'Fixed',`
103	38	alirezamon	`'redefine_param' => 1,`
104	48	alirezamon	`'default' => ' 32',`
105	38	alirezamon	`'content' => '',`
106			`'global_param' => 'Localparam'`
107			`},`
108	48	alirezamon	`'AEMB_DWB' => {`
109	38	alirezamon	`'global_param' => 'Localparam',`
110			`'content' => '',`
111	48	alirezamon	`'default' => ' 32',`
112	38	alirezamon	`'redefine_param' => 1,`
113	48	alirezamon	`'type' => 'Fixed',`
114	38	alirezamon	`'info' => undef`
115			`},`
116	48	alirezamon	`'AEMB_MUL' => {`
117			`'content' => '',`
118			`'global_param' => 'Localparam',`
119			`'type' => 'Fixed',`
120			`'info' => undef,`
121			`'default' => ' 1',`
122			`'redefine_param' => 1`
123			`},`
124	38	alirezamon	`'STACK_SIZE' => {`
125	48	alirezamon	`'content' => '',`
126			`'global_param' => 'Don\'t include',`
127	38	alirezamon	`'type' => 'Entry',`
128			`'info' => 'The stack size in hex',`
129	48	alirezamon	`'redefine_param' => 0,`
130			`'default' => '0x400'`
131			`},`
132			`'AEMB_XWB' => {`
133			`'global_param' => 'Localparam',`
134			`'content' => '',`
135			`'default' => ' 7',`
136			`'redefine_param' => 1,`
137			`'type' => 'Fixed',`
138			`'info' => undef`
139			`},`
140			`'HEAP_SIZE' => {`
141			`'global_param' => 'Don\'t include',`
142			`'content' => '',`
143			`'default' => '0x400',`
144			`'redefine_param' => 0,`
145			`'type' => 'Entry',`
146			`'info' => undef`
147			`}`
148	38	alirezamon	`},`
149	48	alirezamon	`'description' => 'AEMB 32-bit Microprocessor Core`
150			`For more information check http://opencores.org/project,aemb',`
151			`'ip_name' => 'aeMB',`
152			`'module_name' => 'aeMB_top',`
153			`'ports_order' => [`
154			`'dwb_adr_o',`
155			`'dwb_cyc_o',`
156			`'dwb_dat_o',`
157			`'dwb_sel_o',`
158			`'dwb_stb_o',`
159			`'dwb_tag_o',`
160			`'dwb_wre_o',`
161			`'dwb_cti_o',`
162			`'dwb_bte_o',`
163			`'dwb_ack_i',`
164			`'dwb_dat_i',`
165			`'dwb_err_i',`
166			`'dwb_rty_i',`
167			`'iwb_adr_o',`
168			`'iwb_cyc_o',`
169			`'iwb_sel_o',`
170			`'iwb_stb_o',`
171			`'iwb_tag_o',`
172			`'iwb_wre_o',`
173			`'iwb_dat_o',`
174			`'iwb_cti_o',`
175			`'iwb_bte_o',`
176			`'iwb_ack_i',`
177			`'iwb_dat_i',`
178			`'iwb_err_i',`
179			`'iwb_rty_i',`
180			`'clk',`
181			`'reset',`
182			`'sys_int_i',`
183			`'sys_ena_i'`
184			`],`
185			`'parameters_order' => [`
186			`'AEMB_IWB',`
187			`'AEMB_DWB',`
188			`'AEMB_XWB',`
189			`'AEMB_ICH',`
190			`'AEMB_IDX',`
191			`'AEMB_BSF',`
192			`'AEMB_MUL',`
193			`'STACK_SIZE',`
194			`'HEAP_SIZE'`
195			`],`
196			`'file_name' => 'mpsoc/src_processor/aeMB/verilog/aemb.v',`
197			`'gui_status' => {`
198			`'status' => 'ideal',`
199			`'timeout' => 0`
200			`},`
201			`'modules' => {`
202			`'aeMB_top' => {}`
203			`},`
204	38	alirezamon	`'hdl_files' => [`
205			`'/mpsoc/src_processor/aeMB/verilog/aemb.v',`
206			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_core.v',`
207			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_xecu.v',`
208			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_sim.v',`
209			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_bpcu.v',`
210			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_edk32.v',`
211			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_xslif.v',`
212			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_ctrl.v',`
213			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_ibuf.v',`
214			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_tpsram.v',`
215			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB_regf.v',`
216			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_exec.v',`
217			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sparam.v',`
218			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_intu.v',`
219			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_regs.v',`
220			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_spsram.v',`
221			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_memif.v',`
222			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_mult.v',`
223			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_gprf.v',`
224			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_pipe.v',`
225			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_brcc.v',`
226			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dparam.v',`
227			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk63.v',`
228			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_bsft.v',`
229			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_ctrl.v',`
230			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_dwbif.v',`
231			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_edk62.v',`
232			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_sim.v',`
233			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iche.v',`
234			`'/mpsoc/src_processor/aeMB/verilog/src/aeMB2_iwbif.v'`
235			`],`
236			`'gen_sw_files' => [`
237	48	alirezamon	`'/mpsoc/src_processor/aeMB/sw/link.ldfrename_sep_tlink.ld'`
238	25	alirezamon	`],`
239	48	alirezamon	`'sw_files' => [`
240			`'/mpsoc/src_processor/aeMB/sw/aemb',`
241			`'/mpsoc/src_processor/aeMB/sw/aemb.specs',`
242			`'/mpsoc/src_processor/aeMB/sw/Makefile'`
243			`],`
244			`'unused' => undef,`
245			`'category' => 'Processor',`
246			`'version' => 10,`
247	38	alirezamon	`'ports' => {`
248	48	alirezamon	`'dwb_wre_o' => {`
249	38	alirezamon	`'type' => 'output',`
250	48	alirezamon	`'intfc_port' => 'we_o',`
251			`'intfc_name' => 'plug:wb_master[1]',`
252			`'range' => ''`
253			`},`
254			`'dwb_ack_i' => {`
255			`'range' => '',`
256			`'intfc_name' => 'plug:wb_master[1]',`
257			`'type' => 'input',`
258			`'intfc_port' => 'ack_i'`
259			`},`
260			`'iwb_bte_o' => {`
261			`'range' => '1:0',`
262	38	alirezamon	`'intfc_name' => 'plug:wb_master[0]',`
263	48	alirezamon	`'type' => 'output',`
264			`'intfc_port' => 'bte_o'`
265	38	alirezamon	`},`
266	48	alirezamon	`'iwb_wre_o' => {`
267			`'range' => '',`
268			`'intfc_name' => 'plug:wb_master[0]',`
269	38	alirezamon	`'type' => 'output',`
270	48	alirezamon	`'intfc_port' => 'we_o'`
271			`},`
272			`'iwb_ack_i' => {`
273			`'type' => 'input',`
274			`'intfc_port' => 'ack_i',`
275			`'range' => '',`
276			`'intfc_name' => 'plug:wb_master[0]'`
277			`},`
278			`'dwb_adr_o' => {`
279			`'range' => '31:0',`
280			`'intfc_name' => 'plug:wb_master[1]',`
281	38	alirezamon	`'intfc_port' => 'adr_o',`
282	48	alirezamon	`'type' => 'output'`
283	38	alirezamon	`},`
284			`'clk' => {`
285			`'intfc_port' => 'clk_i',`
286			`'type' => 'input',`
287	48	alirezamon	`'intfc_name' => 'plug:clk[0]',`
288			`'range' => ''`
289	38	alirezamon	`},`
290	48	alirezamon	`'iwb_tag_o' => {`
291			`'intfc_port' => 'tag_o',`
292			`'type' => 'output',`
293			`'intfc_name' => 'plug:wb_master[0]',`
294			`'range' => '2:0'`
295			`},`
296			`'iwb_err_i' => {`
297			`'range' => '',`
298			`'intfc_name' => 'plug:wb_master[0]',`
299	38	alirezamon	`'type' => 'input',`
300	48	alirezamon	`'intfc_port' => 'err_i'`
301			`},`
302			`'dwb_cti_o' => {`
303	38	alirezamon	`'intfc_name' => 'plug:wb_master[1]',`
304	48	alirezamon	`'range' => '2:0',`
305			`'intfc_port' => 'cti_o',`
306			`'type' => 'output'`
307	38	alirezamon	`},`
308	48	alirezamon	`'dwb_cyc_o' => {`
309			`'type' => 'output',`
310			`'intfc_port' => 'cyc_o',`
311	38	alirezamon	`'range' => '',`
312			`'intfc_name' => 'plug:wb_master[1]'`
313			`},`
314	48	alirezamon	`'dwb_err_i' => {`
315	38	alirezamon	`'range' => '',`
316			`'intfc_name' => 'plug:wb_master[1]',`
317	48	alirezamon	`'type' => 'input',`
318			`'intfc_port' => 'err_i'`
319	38	alirezamon	`},`
320	48	alirezamon	`'dwb_bte_o' => {`
321			`'intfc_name' => 'plug:wb_master[1]',`
322			`'range' => '1:0',`
323	38	alirezamon	`'type' => 'output',`
324	48	alirezamon	`'intfc_port' => 'bte_o'`
325	38	alirezamon	`},`
326	48	alirezamon	`'iwb_cti_o' => {`
327			`'intfc_port' => 'cti_o',`
328	38	alirezamon	`'type' => 'output',`
329	48	alirezamon	`'range' => '2:0',`
330			`'intfc_name' => 'plug:wb_master[0]'`
331	38	alirezamon	`},`
332	48	alirezamon	`'iwb_adr_o' => {`
333	38	alirezamon	`'type' => 'output',`
334	48	alirezamon	`'intfc_port' => 'adr_o',`
335			`'intfc_name' => 'plug:wb_master[0]',`
336			`'range' => '31:0'`
337	38	alirezamon	`},`
338	48	alirezamon	`'sys_ena_i' => {`
339			`'intfc_name' => 'plug:enable[0]',`
340	38	alirezamon	`'range' => '',`
341	48	alirezamon	`'intfc_port' => 'enable_i',`
342			`'type' => 'input'`
343	38	alirezamon	`},`
344			`'iwb_cyc_o' => {`
345			`'range' => '',`
346			`'intfc_name' => 'plug:wb_master[0]',`
347	48	alirezamon	`'intfc_port' => 'cyc_o',`
348	38	alirezamon	`'type' => 'output'`
349			`},`
350	48	alirezamon	`'dwb_dat_o' => {`
351	38	alirezamon	`'intfc_name' => 'plug:wb_master[1]',`
352	48	alirezamon	`'range' => '31:0',`
353	38	alirezamon	`'type' => 'output',`
354	48	alirezamon	`'intfc_port' => 'dat_o'`
355			`},`
356			`'dwb_stb_o' => {`
357	38	alirezamon	`'range' => '',`
358	48	alirezamon	`'intfc_name' => 'plug:wb_master[1]',`
359			`'intfc_port' => 'stb_o',`
360			`'type' => 'output'`
361	38	alirezamon	`},`
362	48	alirezamon	`'iwb_rty_i' => {`
363	38	alirezamon	`'range' => '',`
364			`'intfc_name' => 'plug:wb_master[0]',`
365	48	alirezamon	`'intfc_port' => 'rty_i',`
366	38	alirezamon	`'type' => 'input'`
367			`},`
368	48	alirezamon	`'iwb_stb_o' => {`
369			`'intfc_name' => 'plug:wb_master[0]',`
370	38	alirezamon	`'range' => '',`
371	48	alirezamon	`'type' => 'output',`
372			`'intfc_port' => 'stb_o'`
373			`},`
374			`'dwb_dat_i' => {`
375			`'range' => '31:0',`
376			`'intfc_name' => 'plug:wb_master[1]',`
377	38	alirezamon	`'type' => 'input',`
378	48	alirezamon	`'intfc_port' => 'dat_i'`
379	38	alirezamon	`},`
380			`'iwb_sel_o' => {`
381	48	alirezamon	`'intfc_port' => 'sel_o',`
382	38	alirezamon	`'type' => 'output',`
383			`'intfc_name' => 'plug:wb_master[0]',`
384			`'range' => '3:0'`
385			`},`
386	48	alirezamon	`'dwb_sel_o' => {`
387			`'intfc_port' => 'sel_o',`
388	38	alirezamon	`'type' => 'output',`
389			`'intfc_name' => 'plug:wb_master[1]',`
390	48	alirezamon	`'range' => '3:0'`
391	38	alirezamon	`},`
392	48	alirezamon	`'iwb_dat_o' => {`
393			`'range' => '31:0',`
394			`'intfc_name' => 'plug:wb_master[0]',`
395	38	alirezamon	`'type' => 'output',`
396	48	alirezamon	`'intfc_port' => 'dat_o'`
397	38	alirezamon	`},`
398	48	alirezamon	`'sys_int_i' => {`
399			`'type' => 'input',`
400			`'intfc_port' => 'int_i',`
401	38	alirezamon	`'range' => '',`
402	48	alirezamon	`'intfc_name' => 'socket:interrupt_cpu[0]'`
403			`},`
404			`'iwb_dat_i' => {`
405	38	alirezamon	`'intfc_name' => 'plug:wb_master[0]',`
406	48	alirezamon	`'range' => '31:0',`
407	38	alirezamon	`'type' => 'input',`
408	48	alirezamon	`'intfc_port' => 'dat_i'`
409	38	alirezamon	`},`
410	48	alirezamon	`'dwb_rty_i' => {`
411	38	alirezamon	`'range' => '',`
412			`'intfc_name' => 'plug:wb_master[1]',`
413	48	alirezamon	`'type' => 'input',`
414			`'intfc_port' => 'rty_i'`
415	38	alirezamon	`},`
416	48	alirezamon	`'reset' => {`
417			`'intfc_name' => 'plug:reset[0]',`
418			`'range' => '',`
419			`'type' => 'input',`
420			`'intfc_port' => 'reset_i'`
421			`},`
422			`'dwb_tag_o' => {`
423	38	alirezamon	`'intfc_name' => 'plug:wb_master[1]',`
424			`'range' => '2:0',`
425	48	alirezamon	`'type' => 'output',`
426			`'intfc_port' => 'tag_o'`
427	38	alirezamon	`}`
428			`},`
429	48	alirezamon	`'system_c' => '`
430			`#include "aemb/core.cc"`
431
432			`/*!`
433			`* Assembly macro to enable MSR_IE`
434			`*/`
435			`void aemb_enable_interrupt ()`
436			`{`
437			`int msr, tmp;`
438			`asm volatile ("mfs %0, rmsr;"`
439			`"ori %1, %0, 0x02;"`
440			`"mts rmsr, %1;"`
441			`: "=r"(msr)`
442			`: "r" (tmp)`
443			`);`
444			`}`
445
446			`void aemb_disable_interrupt ()`
447			`{`
448			`int msr, tmp;`
449			`asm volatile ("mfs %0, rmsr;"`
450			`"andi %1, %0, 0xFD;"`
451			`"mts rmsr, %1;"`
452			`: "=r"(msr)`
453			`: "r" (tmp)`
454			`);`
455			`}`
456
457
458			`/* Loops/exits simulation */`
459			`void exit (int i)`
460			`{`
461			`aemb_disable_interrupt ();`
462			`while (1);`
463			`}`
464
465
466
467
468			`'`
469	38	alirezamon	`}, 'ip_gen' );`

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [ip/] [Processor/] [aeMB.IP] - Blame information for rev 48