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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [ip/] [Processor/] [lm32.IP] - Blame information for rev 48

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#######################################################################
##      File: lm32.IP
##
##      Copyright (C) 2014-2019  Alireza Monemi
##
##      This file is part of ProNoC 1.9.1
##
##      WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT
##      MAY CAUSE UNEXPECTED BEHAIVOR.
################################################################################
 
$ipgen = bless( {
                  'version' => 5,
                  'gui_status' => {
                                    'timeout' => 0,
                                    'status' => 'ideal'
                                  },
                  'ports_order' => [
                                     'clk_i',
                                     'rst_i',
                                     'en_i',
                                     'interrupt',
                                     'I_DAT_I',
                                     'I_ACK_I',
                                     'I_ERR_I',
                                     'I_RTY_I',
                                     'I_DAT_O',
                                     'I_ADR_O',
                                     'I_CYC_O',
                                     'I_SEL_O',
                                     'I_STB_O',
                                     'I_WE_O',
                                     'I_CTI_O',
                                     'I_BTE_O',
                                     'D_DAT_I',
                                     'D_ACK_I',
                                     'D_ERR_I',
                                     'D_RTY_I',
                                     'D_DAT_O',
                                     'D_ADR_O',
                                     'D_CYC_O',
                                     'D_SEL_O',
                                     'D_STB_O',
                                     'D_WE_O',
                                     'D_CTI_O',
                                     'D_BTE_O'
                                   ],
                  'ip_name' => 'lm32',
                  'description' => 'The LatticeMico32 is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement.
 
for more information vist: http://www.latticesemi.com/en/Products/DesignSoftwareAndIP/IntellectualProperty/IPCore/IPCores02/LatticeMico32.aspx',
                  'plugs' => {
                               'enable' => {
                                             'type' => 'num',
                                             'enable' => {},
                                             'value' => 1,
                                             '0' => {
                                                      'name' => 'enable'
                                                    }
                                           },
                               'clk' => {
                                          'clk' => {},
                                          'value' => 1,
                                          '0' => {
                                                   'name' => 'clk'
                                                 },
                                          'type' => 'num'
                                        },
                               'wb_master' => {
                                                '1' => {
                                                         'name' => 'dwb'
                                                       },
                                                '0' => {
                                                         'name' => 'iwb'
                                                       },
                                                'value' => 2,
                                                'type' => 'num',
                                                'wb_master' => {}
                                              },
                               'reset' => {
                                            'value' => 1,
                                            '1' => {
                                                     'name' => 'reset_1'
                                                   },
                                            '0' => {
                                                     'name' => 'reset'
                                                   },
                                            'reset' => {},
                                            'type' => 'num'
                                          }
                             },
                  'ports' => {
                               'D_CYC_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'cyc_o',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[1]'
                                            },
                               'I_WE_O' => {
                                             'type' => 'output',
                                             'intfc_name' => 'plug:wb_master[0]',
                                             'range' => '',
                                             'intfc_port' => 'we_o'
                                           },
                               'I_DAT_O' => {
                                              'intfc_port' => 'dat_o',
                                              'range' => '(32-1):0',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'type' => 'output'
                                            },
                               'rst_i' => {
                                            'type' => 'input',
                                            'intfc_port' => 'reset_i',
                                            'range' => '',
                                            'intfc_name' => 'plug:reset[0]'
                                          },
                               'D_ERR_I' => {
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'intfc_port' => 'err_i',
                                              'type' => 'input'
                                            },
                               'D_CTI_O' => {
                                              'intfc_port' => 'cti_o',
                                              'range' => '(3-1):0',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'type' => 'output'
                                            },
                               'en_i' => {
                                           'range' => '',
                                           'intfc_name' => 'plug:enable[0]',
                                           'intfc_port' => 'enable_i',
                                           'type' => 'input'
                                         },
                               'I_ERR_I' => {
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'intfc_port' => 'err_i',
                                              'type' => 'input'
                                            },
                               'clk_i' => {
                                            'type' => 'input',
                                            'intfc_port' => 'clk_i',
                                            'range' => '',
                                            'intfc_name' => 'plug:clk[0]'
                                          },
                               'I_ACK_I' => {
                                              'intfc_port' => 'ack_i',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'type' => 'input'
                                            },
                               'I_ADR_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'adr_o',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'range' => '(32-1):0'
                                            },
                               'D_ADR_O' => {
                                              'intfc_port' => 'adr_o',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'range' => '(32-1):0',
                                              'type' => 'output'
                                            },
                               'D_STB_O' => {
                                              'intfc_port' => 'stb_o',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'type' => 'output'
                                            },
                               'I_RTY_I' => {
                                              'intfc_port' => 'rty_i',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'type' => 'input'
                                            },
                               'interrupt' => {
                                                'type' => 'input',
                                                'intfc_port' => 'int_i',
                                                'intfc_name' => 'socket:interrupt_peripheral[array]',
                                                'range' => '(32-1):0'
                                              },
                               'D_BTE_O' => {
                                              'range' => '(2-1):0',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'intfc_port' => 'bte_o',
                                              'type' => 'output'
                                            },
                               'D_RTY_I' => {
                                              'intfc_port' => 'rty_i',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'type' => 'input'
                                            },
                               'I_CTI_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'cti_o',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'range' => '(3-1):0'
                                            },
                               'D_WE_O' => {
                                             'type' => 'output',
                                             'intfc_port' => 'we_o',
                                             'intfc_name' => 'plug:wb_master[1]',
                                             'range' => ''
                                           },
                               'I_CYC_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'cyc_o',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[0]'
                                            },
                               'D_DAT_I' => {
                                              'type' => 'input',
                                              'intfc_port' => 'dat_i',
                                              'range' => '(32-1):0',
                                              'intfc_name' => 'plug:wb_master[1]'
                                            },
                               'I_SEL_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'sel_o',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'range' => '(4-1):0'
                                            },
                               'I_BTE_O' => {
                                              'type' => 'output',
                                              'range' => '(2-1):0',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'intfc_port' => 'bte_o'
                                            },
                               'I_STB_O' => {
                                              'intfc_port' => 'stb_o',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'type' => 'output'
                                            },
                               'D_ACK_I' => {
                                              'intfc_port' => 'ack_i',
                                              'range' => '',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'type' => 'input'
                                            },
                               'D_SEL_O' => {
                                              'type' => 'output',
                                              'intfc_port' => 'sel_o',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'range' => '(4-1):0'
                                            },
                               'D_DAT_O' => {
                                              'type' => 'output',
                                              'intfc_name' => 'plug:wb_master[1]',
                                              'range' => '(32-1):0',
                                              'intfc_port' => 'dat_o'
                                            },
                               'I_DAT_I' => {
                                              'intfc_name' => 'plug:wb_master[0]',
                                              'range' => '(32-1):0',
                                              'intfc_port' => 'dat_i',
                                              'type' => 'input'
                                            }
                             },
                  'hdl_files' => [
                                   '/mpsoc/src_processor/lm32/verilog/src/er1.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/JTAGB.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/jtag_lm32.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_adder.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_addsub.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_cpu.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_dcache.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_debug.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_decoder.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_functions.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_icache.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_include.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_instruction_unit.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_interrupt.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_jtag.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_load_store_unit.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_logic_op.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_mc_arithmetic.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_monitor.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_multiplier.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_ram.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_shifter.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_simtrace.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/lm32_top.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/spiprog.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/system_conf.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/typea.v',
                                   '/mpsoc/src_processor/lm32/verilog/src/typeb.v'
                                 ],
                  'unused' => {
                                'plug:wb_master[0]' => [
                                                         'tag_o'
                                                       ],
                                'plug:wb_master[1]' => [
                                                         'tag_o'
                                                       ]
                              },
                  'module_name' => 'lm32',
                   'parameters_order' => [
                                          'INTR_NUM',
                                          'BARREL_SHIFT',
                                          'SIGN_EXTEND',
                                          'BARREL_SHIFT',
                                          'MULTIPLIER_TYPE',
                                          'DIVIDOR_TYPE',
                                          'INSTRUCTION_CACHE',
                                          'ICACHE_ASSOCIATIVITY',
                                          'ICACHE_SETS',
                                          'DATA_CACHE',
                                          'DCACHE_ASSOCIATIVITY',
                                          'DCACHE_SETS'
                                        ],
                  'system_c' => '#include "lm32/lm32_system.c"',
                  'category' => 'Processor',
                  'modules' => {
                                 'lm32' => {}
                               },
                    'gen_sw_files' => [
                                      '/mpsoc/src_processor/new_lm32/sw/cpu_flags_genfrename_sep_tcpu_flags'
                                    ],
                   'gen_hw_files' => [
                                      '/mpsoc/src_processor/new_lm32/config/lm32_config_gen.vfrename_sep_tlib/lm32_config.v'
                                    ],
                  'sw_files' => [
                                  '/mpsoc/src_processor/lm32/sw/lm32',
                                  '/mpsoc/src_processor/lm32/sw/linker.ld',
                                  '/mpsoc/src_processor/lm32/sw/Makefile'
                                ],
                 'parameters' => {
                                    'INTR_NUM' => {
                                                    'redefine_param' => 1,
                                                    'type' => 'Fixed',
                                                    'global_param' => 'Localparam',
                                                    'content' => '',
                                                    'default' => '32',
                                                    'info' => undef
                                                  },
                                    'SIGN_EXTEND' => {
                                                       'content' => 'ENABLED,DISABLED',
                                                       'global_param' => 'Don\'t include',
                                                       'type' => 'Combo-box',
                                                       'redefine_param' => 1,
                                                       'info' => 'Enable sign-extension instructions',
                                                       'default' => 'ENABLED'
                                                     },
                                    'INSTRUCTION_CACHE' => {
                                                             'default' => 'ENABLED',
                                                             'info' => 'Enable/Disable Instruction cache',
                                                             'redefine_param' => 1,
                                                             'type' => 'Combo-box',
                                                             'content' => 'ENABLED,DISABLED',
                                                             'global_param' => 'Don\'t include'
                                                           },
                                    'BARREL_SHIFT' => {
                                                        'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',
                                                        'global_param' => 'Don\'t include',
                                                        'type' => 'Combo-box',
                                                        'redefine_param' => 1,
                                                        'info' => 'Shifter
You may either enable the piplined or the multi-cycle barrel
shifter. The multi-cycle shifter will stall the pipeline until
the result is available after 32 cycles.
If both options are disabled, only "right shift by one bit" is
available.',
                                                        'default' => 'PIPE_LINE'
                                                      },
                                    'DCACHE_ASSOCIATIVITY' => {
                                                                'redefine_param' => 1,
                                                                'type' => 'Combo-box',
                                                                'content' => '1,2,4,8',
                                                                'global_param' => 'Don\'t include',
                                                                'default' => '1',
                                                                'info' => 'Data cache assocativity number '
                                                              },
                                    'DIVIDOR_TYPE' => {
                                                        'info' => ' Enable the multi-cycle divider. Stalls the pipe until the result
 is ready after 32 cycles. If disabled, the divide operation is not  supported.',
                                                        'default' => 'MULTI_CYCLE',
                                                        'global_param' => 'Don\'t include',
                                                        'content' => 'MULTI_CYCLE,NONE',
                                                        'type' => 'Combo-box',
                                                        'redefine_param' => 1
                                                      },
                                    'MULTIPLIER_TYPE' => {
                                                           'info' => '// Multiplier
 The multiplier is available either in a multi-cycle version or
 in a pipelined one. The multi-cycle multiplier stalls the pipe
 for 32 cycles. If both options are disabled, multiply operations
 are not supported.',
                                                           'default' => 'PIPE_LINE',
                                                           'global_param' => 'Don\'t include',
                                                           'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',
                                                           'type' => 'Combo-box',
                                                           'redefine_param' => 1
                                                         },
                                    'DATA_CACHE' => {
                                                      'redefine_param' => 1,
                                                      'type' => 'Combo-box',
                                                      'global_param' => 'Don\'t include',
                                                      'content' => 'ENABLED,DISABLED',
                                                      'default' => 'ENABLED',
                                                      'info' => 'Enable/Disable the data cache'
                                                    },
                                    'DCACHE_SETS' => {
                                                       'info' => ' Number of sets',
                                                       'default' => '256',
                                                       'global_param' => 'Don\'t include',
                                                       'content' => '128,256,512,1024,2048,4096,8119,16384',
                                                       'redefine_param' => 1,
                                                       'type' => 'Combo-box'
                                                     },
                                    'ICACHE_ASSOCIATIVITY' => {
                                                                'info' => 'Istruction cache assocativity number ',
                                                                'default' => '1',
                                                                'global_param' => 'Don\'t include',
                                                                'content' => '1,2,4,8',
                                                                'redefine_param' => 1,
                                                                'type' => 'Combo-box'
                                                              },
                                    'ICACHE_SETS' => {
                                                       'type' => 'Combo-box',
                                                       'redefine_param' => 1,
                                                       'global_param' => 'Don\'t include',
                                                       'content' => '128,256,512,1024,2048,4096,8119,16384',
                                                       'default' => '256',
                                                       'info' => ' Number of sets'
                                                     }
                                  },
                  'system_h' => '#include "lm32/lm32_system.h"
static inline void nop (void) {
        asm volatile ("nop");
}',
                  'sockets' => {
                                 'interrupt_peripheral' => {
                                                             'connection_num' => 'single connection',
                                                             'type' => 'param',
                                                             'interrupt_peripheral' => {},
                                                             '0' => {
                                                                      'name' => 'interrupt_peripheral'
                                                                    },
                                                             'value' => 'INTR_NUM'
                                                           }
                               },
                  'file_name' => 'mpsoc/src_processor/lm32/verilog/src/lm32.v'
                }, 'ip_gen' );

Line No.	Rev	Author	Line
1	25	alirezamon	`#######################################################################`
2			`## File: lm32.IP`
3			`##`
4	48	alirezamon	`## Copyright (C) 2014-2019 Alireza Monemi`
5	25	alirezamon	`##`
6	48	alirezamon	`## This file is part of ProNoC 1.9.1`
7	25	alirezamon	`##`
8			`## WARNING: THIS IS AN AUTO-GENERATED FILE. CHANGES TO IT`
9			`## MAY CAUSE UNEXPECTED BEHAIVOR.`
10			`################################################################################`
11
12	48	alirezamon	`$ipgen = bless( {`
13			`'version' => 5,`
14			`'gui_status' => {`
15			`'timeout' => 0,`
16			`'status' => 'ideal'`
17			`},`
18			`'ports_order' => [`
19			`'clk_i',`
20			`'rst_i',`
21			`'en_i',`
22			`'interrupt',`
23			`'I_DAT_I',`
24			`'I_ACK_I',`
25			`'I_ERR_I',`
26			`'I_RTY_I',`
27			`'I_DAT_O',`
28			`'I_ADR_O',`
29			`'I_CYC_O',`
30			`'I_SEL_O',`
31			`'I_STB_O',`
32			`'I_WE_O',`
33			`'I_CTI_O',`
34			`'I_BTE_O',`
35			`'D_DAT_I',`
36			`'D_ACK_I',`
37			`'D_ERR_I',`
38			`'D_RTY_I',`
39			`'D_DAT_O',`
40			`'D_ADR_O',`
41			`'D_CYC_O',`
42			`'D_SEL_O',`
43			`'D_STB_O',`
44			`'D_WE_O',`
45			`'D_CTI_O',`
46			`'D_BTE_O'`
47			`],`
48			`'ip_name' => 'lm32',`
49			`'description' => 'The LatticeMico32 is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement.`
50
51			`for more information vist: http://www.latticesemi.com/en/Products/DesignSoftwareAndIP/IntellectualProperty/IPCore/IPCores02/LatticeMico32.aspx',`
52			`'plugs' => {`
53			`'enable' => {`
54			`'type' => 'num',`
55			`'enable' => {},`
56			`'value' => 1,`
57			`'0' => {`
58			`'name' => 'enable'`
59			`}`
60			`},`
61			`'clk' => {`
62			`'clk' => {},`
63			`'value' => 1,`
64			`'0' => {`
65			`'name' => 'clk'`
66			`},`
67			`'type' => 'num'`
68			`},`
69			`'wb_master' => {`
70			`'1' => {`
71			`'name' => 'dwb'`
72			`},`
73			`'0' => {`
74			`'name' => 'iwb'`
75			`},`
76			`'value' => 2,`
77			`'type' => 'num',`
78			`'wb_master' => {}`
79			`},`
80			`'reset' => {`
81			`'value' => 1,`
82			`'1' => {`
83			`'name' => 'reset_1'`
84			`},`
85	38	alirezamon	`'0' => {`
86	48	alirezamon	`'name' => 'reset'`
87	38	alirezamon	`},`
88	48	alirezamon	`'reset' => {},`
89			`'type' => 'num'`
90			`}`
91			`},`
92			`'ports' => {`
93			`'D_CYC_O' => {`
94			`'type' => 'output',`
95			`'intfc_port' => 'cyc_o',`
96			`'range' => '',`
97			`'intfc_name' => 'plug:wb_master[1]'`
98			`},`
99			`'I_WE_O' => {`
100	38	alirezamon	`'type' => 'output',`
101	25	alirezamon	`'intfc_name' => 'plug:wb_master[0]',`
102			`'range' => '',`
103	48	alirezamon	`'intfc_port' => 'we_o'`
104	25	alirezamon	`},`
105	48	alirezamon	`'I_DAT_O' => {`
106			`'intfc_port' => 'dat_o',`
107			`'range' => '(32-1):0',`
108			`'intfc_name' => 'plug:wb_master[0]',`
109			`'type' => 'output'`
110			`},`
111			`'rst_i' => {`
112			`'type' => 'input',`
113			`'intfc_port' => 'reset_i',`
114	25	alirezamon	`'range' => '',`
115	48	alirezamon	`'intfc_name' => 'plug:reset[0]'`
116	25	alirezamon	`},`
117	48	alirezamon	`'D_ERR_I' => {`
118			`'range' => '',`
119			`'intfc_name' => 'plug:wb_master[1]',`
120			`'intfc_port' => 'err_i',`
121			`'type' => 'input'`
122			`},`
123			`'D_CTI_O' => {`
124			`'intfc_port' => 'cti_o',`
125			`'range' => '(3-1):0',`
126			`'intfc_name' => 'plug:wb_master[1]',`
127			`'type' => 'output'`
128			`},`
129			`'en_i' => {`
130	25	alirezamon	`'range' => '',`
131	48	alirezamon	`'intfc_name' => 'plug:enable[0]',`
132			`'intfc_port' => 'enable_i',`
133			`'type' => 'input'`
134	25	alirezamon	`},`
135	48	alirezamon	`'I_ERR_I' => {`
136			`'range' => '',`
137			`'intfc_name' => 'plug:wb_master[0]',`
138			`'intfc_port' => 'err_i',`
139			`'type' => 'input'`
140			`},`
141			`'clk_i' => {`
142			`'type' => 'input',`
143			`'intfc_port' => 'clk_i',`
144	38	alirezamon	`'range' => '',`
145	48	alirezamon	`'intfc_name' => 'plug:clk[0]'`
146	38	alirezamon	`},`
147	48	alirezamon	`'I_ACK_I' => {`
148			`'intfc_port' => 'ack_i',`
149			`'range' => '',`
150			`'intfc_name' => 'plug:wb_master[0]',`
151			`'type' => 'input'`
152			`},`
153			`'I_ADR_O' => {`
154			`'type' => 'output',`
155			`'intfc_port' => 'adr_o',`
156			`'intfc_name' => 'plug:wb_master[0]',`
157			`'range' => '(32-1):0'`
158			`},`
159			`'D_ADR_O' => {`
160			`'intfc_port' => 'adr_o',`
161			`'intfc_name' => 'plug:wb_master[1]',`
162			`'range' => '(32-1):0',`
163			`'type' => 'output'`
164			`},`
165			`'D_STB_O' => {`
166			`'intfc_port' => 'stb_o',`
167			`'range' => '',`
168			`'intfc_name' => 'plug:wb_master[1]',`
169			`'type' => 'output'`
170			`},`
171			`'I_RTY_I' => {`
172			`'intfc_port' => 'rty_i',`
173			`'range' => '',`
174			`'intfc_name' => 'plug:wb_master[0]',`
175			`'type' => 'input'`
176			`},`
177			`'interrupt' => {`
178			`'type' => 'input',`
179			`'intfc_port' => 'int_i',`
180			`'intfc_name' => 'socket:interrupt_peripheral[array]',`
181			`'range' => '(32-1):0'`
182			`},`
183			`'D_BTE_O' => {`
184			`'range' => '(2-1):0',`
185			`'intfc_name' => 'plug:wb_master[1]',`
186			`'intfc_port' => 'bte_o',`
187			`'type' => 'output'`
188			`},`
189			`'D_RTY_I' => {`
190			`'intfc_port' => 'rty_i',`
191			`'range' => '',`
192			`'intfc_name' => 'plug:wb_master[1]',`
193			`'type' => 'input'`
194			`},`
195			`'I_CTI_O' => {`
196			`'type' => 'output',`
197			`'intfc_port' => 'cti_o',`
198			`'intfc_name' => 'plug:wb_master[0]',`
199			`'range' => '(3-1):0'`
200			`},`
201			`'D_WE_O' => {`
202	38	alirezamon	`'type' => 'output',`
203	48	alirezamon	`'intfc_port' => 'we_o',`
204	25	alirezamon	`'intfc_name' => 'plug:wb_master[1]',`
205	48	alirezamon	`'range' => ''`
206	25	alirezamon	`},`
207	48	alirezamon	`'I_CYC_O' => {`
208			`'type' => 'output',`
209			`'intfc_port' => 'cyc_o',`
210			`'range' => '',`
211			`'intfc_name' => 'plug:wb_master[0]'`
212			`},`
213			`'D_DAT_I' => {`
214			`'type' => 'input',`
215			`'intfc_port' => 'dat_i',`
216			`'range' => '(32-1):0',`
217			`'intfc_name' => 'plug:wb_master[1]'`
218			`},`
219			`'I_SEL_O' => {`
220			`'type' => 'output',`
221			`'intfc_port' => 'sel_o',`
222			`'intfc_name' => 'plug:wb_master[0]',`
223			`'range' => '(4-1):0'`
224			`},`
225			`'I_BTE_O' => {`
226			`'type' => 'output',`
227			`'range' => '(2-1):0',`
228			`'intfc_name' => 'plug:wb_master[0]',`
229			`'intfc_port' => 'bte_o'`
230			`},`
231			`'I_STB_O' => {`
232			`'intfc_port' => 'stb_o',`
233			`'range' => '',`
234			`'intfc_name' => 'plug:wb_master[0]',`
235			`'type' => 'output'`
236			`},`
237			`'D_ACK_I' => {`
238			`'intfc_port' => 'ack_i',`
239			`'range' => '',`
240			`'intfc_name' => 'plug:wb_master[1]',`
241			`'type' => 'input'`
242			`},`
243			`'D_SEL_O' => {`
244			`'type' => 'output',`
245			`'intfc_port' => 'sel_o',`
246			`'intfc_name' => 'plug:wb_master[1]',`
247			`'range' => '(4-1):0'`
248			`},`
249			`'D_DAT_O' => {`
250			`'type' => 'output',`
251			`'intfc_name' => 'plug:wb_master[1]',`
252			`'range' => '(32-1):0',`
253			`'intfc_port' => 'dat_o'`
254			`},`
255			`'I_DAT_I' => {`
256			`'intfc_name' => 'plug:wb_master[0]',`
257			`'range' => '(32-1):0',`
258			`'intfc_port' => 'dat_i',`
259			`'type' => 'input'`
260			`}`
261			`},`
262			`'hdl_files' => [`
263			`'/mpsoc/src_processor/lm32/verilog/src/er1.v',`
264			`'/mpsoc/src_processor/lm32/verilog/src/JTAGB.v',`
265			`'/mpsoc/src_processor/lm32/verilog/src/jtag_lm32.v',`
266			`'/mpsoc/src_processor/lm32/verilog/src/lm32.v',`
267			`'/mpsoc/src_processor/lm32/verilog/src/lm32_adder.v',`
268			`'/mpsoc/src_processor/lm32/verilog/src/lm32_addsub.v',`
269			`'/mpsoc/src_processor/lm32/verilog/src/lm32_cpu.v',`
270			`'/mpsoc/src_processor/lm32/verilog/src/lm32_dcache.v',`
271			`'/mpsoc/src_processor/lm32/verilog/src/lm32_debug.v',`
272			`'/mpsoc/src_processor/lm32/verilog/src/lm32_decoder.v',`
273			`'/mpsoc/src_processor/lm32/verilog/src/lm32_functions.v',`
274			`'/mpsoc/src_processor/lm32/verilog/src/lm32_icache.v',`
275			`'/mpsoc/src_processor/lm32/verilog/src/lm32_include.v',`
276			`'/mpsoc/src_processor/lm32/verilog/src/lm32_instruction_unit.v',`
277			`'/mpsoc/src_processor/lm32/verilog/src/lm32_interrupt.v',`
278			`'/mpsoc/src_processor/lm32/verilog/src/lm32_jtag.v',`
279			`'/mpsoc/src_processor/lm32/verilog/src/lm32_load_store_unit.v',`
280			`'/mpsoc/src_processor/lm32/verilog/src/lm32_logic_op.v',`
281			`'/mpsoc/src_processor/lm32/verilog/src/lm32_mc_arithmetic.v',`
282			`'/mpsoc/src_processor/lm32/verilog/src/lm32_monitor.v',`
283			`'/mpsoc/src_processor/lm32/verilog/src/lm32_multiplier.v',`
284			`'/mpsoc/src_processor/lm32/verilog/src/lm32_ram.v',`
285			`'/mpsoc/src_processor/lm32/verilog/src/lm32_shifter.v',`
286			`'/mpsoc/src_processor/lm32/verilog/src/lm32_simtrace.v',`
287			`'/mpsoc/src_processor/lm32/verilog/src/lm32_top.v',`
288			`'/mpsoc/src_processor/lm32/verilog/src/spiprog.v',`
289			`'/mpsoc/src_processor/lm32/verilog/src/system_conf.v',`
290			`'/mpsoc/src_processor/lm32/verilog/src/typea.v',`
291			`'/mpsoc/src_processor/lm32/verilog/src/typeb.v'`
292			`],`
293			`'unused' => {`
294			`'plug:wb_master[0]' => [`
295			`'tag_o'`
296			`],`
297			`'plug:wb_master[1]' => [`
298			`'tag_o'`
299			`]`
300			`},`
301			`'module_name' => 'lm32',`
302			`'parameters_order' => [`
303			`'INTR_NUM',`
304			`'BARREL_SHIFT',`
305			`'SIGN_EXTEND',`
306			`'BARREL_SHIFT',`
307			`'MULTIPLIER_TYPE',`
308			`'DIVIDOR_TYPE',`
309			`'INSTRUCTION_CACHE',`
310			`'ICACHE_ASSOCIATIVITY',`
311			`'ICACHE_SETS',`
312			`'DATA_CACHE',`
313			`'DCACHE_ASSOCIATIVITY',`
314			`'DCACHE_SETS'`
315			`],`
316			`'system_c' => '#include "lm32/lm32_system.c"',`
317			`'category' => 'Processor',`
318			`'modules' => {`
319			`'lm32' => {}`
320			`},`
321			`'gen_sw_files' => [`
322			`'/mpsoc/src_processor/new_lm32/sw/cpu_flags_genfrename_sep_tcpu_flags'`
323			`],`
324			`'gen_hw_files' => [`
325			`'/mpsoc/src_processor/new_lm32/config/lm32_config_gen.vfrename_sep_tlib/lm32_config.v'`
326			`],`
327			`'sw_files' => [`
328			`'/mpsoc/src_processor/lm32/sw/lm32',`
329			`'/mpsoc/src_processor/lm32/sw/linker.ld',`
330			`'/mpsoc/src_processor/lm32/sw/Makefile'`
331			`],`
332	38	alirezamon	`'parameters' => {`
333	48	alirezamon	`'INTR_NUM' => {`
334			`'redefine_param' => 1,`
335			`'type' => 'Fixed',`
336			`'global_param' => 'Localparam',`
337			`'content' => '',`
338			`'default' => '32',`
339			`'info' => undef`
340			`},`
341			`'SIGN_EXTEND' => {`
342			`'content' => 'ENABLED,DISABLED',`
343			`'global_param' => 'Don\'t include',`
344			`'type' => 'Combo-box',`
345			`'redefine_param' => 1,`
346			`'info' => 'Enable sign-extension instructions',`
347			`'default' => 'ENABLED'`
348			`},`
349			`'INSTRUCTION_CACHE' => {`
350			`'default' => 'ENABLED',`
351			`'info' => 'Enable/Disable Instruction cache',`
352			`'redefine_param' => 1,`
353			`'type' => 'Combo-box',`
354			`'content' => 'ENABLED,DISABLED',`
355			`'global_param' => 'Don\'t include'`
356			`},`
357			`'BARREL_SHIFT' => {`
358			`'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',`
359			`'global_param' => 'Don\'t include',`
360			`'type' => 'Combo-box',`
361	38	alirezamon	`'redefine_param' => 1,`
362	48	alirezamon	`'info' => 'Shifter`
363			`You may either enable the piplined or the multi-cycle barrel`
364			`shifter. The multi-cycle shifter will stall the pipeline until`
365			`the result is available after 32 cycles.`
366			`If both options are disabled, only "right shift by one bit" is`
367			`available.',`
368			`'default' => 'PIPE_LINE'`
369	38	alirezamon	`},`
370	48	alirezamon	`'DCACHE_ASSOCIATIVITY' => {`
371			`'redefine_param' => 1,`
372			`'type' => 'Combo-box',`
373			`'content' => '1,2,4,8',`
374			`'global_param' => 'Don\'t include',`
375			`'default' => '1',`
376			`'info' => 'Data cache assocativity number '`
377			`},`
378			`'DIVIDOR_TYPE' => {`
379			`'info' => ' Enable the multi-cycle divider. Stalls the pipe until the result`
380			`is ready after 32 cycles. If disabled, the divide operation is not supported.',`
381			`'default' => 'MULTI_CYCLE',`
382			`'global_param' => 'Don\'t include',`
383			`'content' => 'MULTI_CYCLE,NONE',`
384			`'type' => 'Combo-box',`
385			`'redefine_param' => 1`
386			`},`
387			`'MULTIPLIER_TYPE' => {`
388			`'info' => '// Multiplier`
389			`The multiplier is available either in a multi-cycle version or`
390			`in a pipelined one. The multi-cycle multiplier stalls the pipe`
391			`for 32 cycles. If both options are disabled, multiply operations`
392			`are not supported.',`
393			`'default' => 'PIPE_LINE',`
394			`'global_param' => 'Don\'t include',`
395			`'content' => 'MULTI_CYCLE,PIPE_LINE,NONE',`
396			`'type' => 'Combo-box',`
397			`'redefine_param' => 1`
398			`},`
399			`'DATA_CACHE' => {`
400			`'redefine_param' => 1,`
401			`'type' => 'Combo-box',`
402			`'global_param' => 'Don\'t include',`
403			`'content' => 'ENABLED,DISABLED',`
404			`'default' => 'ENABLED',`
405			`'info' => 'Enable/Disable the data cache'`
406			`},`
407			`'DCACHE_SETS' => {`
408			`'info' => ' Number of sets',`
409			`'default' => '256',`
410			`'global_param' => 'Don\'t include',`
411			`'content' => '128,256,512,1024,2048,4096,8119,16384',`
412			`'redefine_param' => 1,`
413			`'type' => 'Combo-box'`
414			`},`
415			`'ICACHE_ASSOCIATIVITY' => {`
416			`'info' => 'Istruction cache assocativity number ',`
417			`'default' => '1',`
418			`'global_param' => 'Don\'t include',`
419			`'content' => '1,2,4,8',`
420			`'redefine_param' => 1,`
421			`'type' => 'Combo-box'`
422			`},`
423			`'ICACHE_SETS' => {`
424			`'type' => 'Combo-box',`
425			`'redefine_param' => 1,`
426			`'global_param' => 'Don\'t include',`
427			`'content' => '128,256,512,1024,2048,4096,8119,16384',`
428			`'default' => '256',`
429			`'info' => ' Number of sets'`
430			`}`
431			`},`
432			`'system_h' => '#include "lm32/lm32_system.h"`
433			`static inline void nop (void) {`
434			`asm volatile ("nop");`
435			`}',`
436			`'sockets' => {`
437			`'interrupt_peripheral' => {`
438			`'connection_num' => 'single connection',`
439			`'type' => 'param',`
440			`'interrupt_peripheral' => {},`
441			`'0' => {`
442			`'name' => 'interrupt_peripheral'`
443			`},`
444			`'value' => 'INTR_NUM'`
445			`}`
446			`},`
447			`'file_name' => 'mpsoc/src_processor/lm32/verilog/src/lm32.v'`
448			`}, 'ip_gen' );`

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [perl_gui/] [lib/] [ip/] [Processor/] [lm32.IP] - Blame information for rev 48