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alirezamon |
// megafunction wizard: %In-System Sources and Probes%
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// GENERATION: STANDARD
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// VERSION: WM1.0
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// MODULE: altsource_probe
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// ============================================================
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// File Name: reset_jtag.v
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// Megafunction Name(s):
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// altsource_probe
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//
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// Simulation Library Files(s):
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// altera_mf
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// ============================================================
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// ************************************************************
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// THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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//
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// 13.0.0 Build 156 04/24/2013 SJ Full Version
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// ************************************************************
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//Copyright (C) 1991-2013 Altera Corporation
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//Your use of Altera Corporation's design tools, logic functions
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//and other software and tools, and its AMPP partner logic
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//functions, and any output files from any of the foregoing
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//(including device programming or simulation files), and any
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//associated documentation or information are expressly subject
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//to the terms and conditions of the Altera Program License
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//Subscription Agreement, Altera MegaCore Function License
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//Agreement, or other applicable license agreement, including,
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//without limitation, that your use is for the sole purpose of
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//programming logic devices manufactured by Altera and sold by
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//Altera or its authorized distributors. Please refer to the
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//applicable agreement for further details.
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// synopsys translate_off
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`timescale 1 ps / 1 ps
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// synopsys translate_on
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module reset_jtag (
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probe,
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source);
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input [0:0] probe;
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output [0:0] source;
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wire [0:0] sub_wire0;
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wire [0:0] source = sub_wire0[0:0];
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altsource_probe altsource_probe_component (
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.probe (probe),
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.source (sub_wire0)
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// synopsys translate_off
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,
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.clrn (),
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.ena (),
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.ir_in (),
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.ir_out (),
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.jtag_state_cdr (),
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.jtag_state_cir (),
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.jtag_state_e1dr (),
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.jtag_state_sdr (),
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.jtag_state_tlr (),
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.jtag_state_udr (),
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.jtag_state_uir (),
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.raw_tck (),
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.source_clk (),
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.source_ena (),
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.tdi (),
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.tdo (),
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.usr1 ()
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// synopsys translate_on
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);
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defparam
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altsource_probe_component.enable_metastability = "NO",
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altsource_probe_component.instance_id = "RST",
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altsource_probe_component.probe_width = 1,
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altsource_probe_component.sld_auto_instance_index = "NO",
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altsource_probe_component.sld_instance_index = 127,
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altsource_probe_component.source_initial_value = " 0",
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altsource_probe_component.source_width = 1;
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endmodule
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// ============================================================
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// CNX file retrieval info
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// ============================================================
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// Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone IV E"
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// Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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// Retrieval info: CONSTANT: ENABLE_METASTABILITY STRING "NO"
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// Retrieval info: CONSTANT: INSTANCE_ID STRING "RST"
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// Retrieval info: CONSTANT: PROBE_WIDTH NUMERIC "1"
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// Retrieval info: CONSTANT: SLD_AUTO_INSTANCE_INDEX STRING "NO"
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// Retrieval info: CONSTANT: SLD_INSTANCE_INDEX NUMERIC "127"
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// Retrieval info: CONSTANT: SOURCE_INITIAL_VALUE STRING " 0"
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// Retrieval info: CONSTANT: SOURCE_WIDTH NUMERIC "1"
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// Retrieval info: USED_PORT: probe 0 0 1 0 INPUT NODEFVAL "probe[0..0]"
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// Retrieval info: USED_PORT: source 0 0 1 0 OUTPUT NODEFVAL "source[0..0]"
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// Retrieval info: CONNECT: @probe 0 0 1 0 probe 0 0 1 0
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// Retrieval info: CONNECT: source 0 0 1 0 @source 0 0 1 0
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag.v TRUE
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag.inc FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag.cmp FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag.bsf FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag_inst.v FALSE
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// Retrieval info: GEN_FILE: TYPE_NORMAL reset_jtag_bb.v TRUE
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// Retrieval info: LIB_FILE: altera_mf
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