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alirezamon |
`timescale 1ns/1ps
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/**********************************************************************
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** File: comb_spec1.v
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**
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** Copyright (C) 2014-2017 Alireza Monemi
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**
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** This file is part of ProNoC
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**
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** ProNoC ( stands for Prototype Network-on-chip) is free software:
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** you can redistribute it and/or modify it under the terms of the GNU
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** Lesser General Public License as published by the Free Software Foundation,
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** either version 2 of the License, or (at your option) any later version.
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**
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** ProNoC is distributed in the hope that it will be useful, but WITHOUT
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** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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** or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General
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** Public License for more details.
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**
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** You should have received a copy of the GNU Lesser General Public
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** License along with ProNoC. If not, see <http:**www.gnu.org/licenses/>.
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**
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**
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** Description:
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** VC allocator combined with speculative switch allo-
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** cator where free VC availability is checked at the end
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** of switch allocation (comb-spec1).
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**
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***********************************************************************/
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module comb_spec1_allocator #(
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parameter V = 4,// Virtual chanel num per port
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parameter P = 5,
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parameter DEBUG_EN = 1,
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parameter SWA_ARBITER_TYPE = "WRRA",
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parameter MIN_PCK_SIZE=2, //minimum packet size in flits. The minimum value is 1.
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parameter SELF_LOOP_EN = "NO"
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)(
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dest_port_all,
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masked_ovc_request_all,
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ovc_is_assigned_all,
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ivc_request_all,
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assigned_ovc_not_full_all,
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ovc_allocated_all,
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granted_ovc_num_all,
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ivc_num_getting_ovc_grant,
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ivc_num_getting_sw_grant,
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spec_first_arbiter_granted_ivc_all,
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nonspec_first_arbiter_granted_ivc_all,
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granted_dest_port_all,
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nonspec_granted_dest_port_all,
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any_ivc_sw_request_granted_all,
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vc_weight_is_consumed_all,
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iport_weight_is_consumed_all,
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pck_is_single_flit_all,
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granted_dst_is_from_a_single_flit_pck,
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clk,reset
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);
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localparam
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PV = V * P,
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VV = V * V,
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PVV = PV * V,
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P_1 = (SELF_LOOP_EN=="NO")? P-1 : P,
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VP_1 = V * P_1,
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PP_1 = P_1 * P,
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PVP_1 = PV * P_1;
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input [PVP_1-1 : 0] dest_port_all;
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input [PVV-1 : 0] masked_ovc_request_all;
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input [PV-1 : 0] ovc_is_assigned_all;
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input [PV-1 : 0] ivc_request_all;
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input [PV-1 : 0] assigned_ovc_not_full_all;
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input [PV-1 : 0] vc_weight_is_consumed_all;
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input [P-1 : 0] iport_weight_is_consumed_all;
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output [PV-1 : 0] ovc_allocated_all;
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output [PVV-1 : 0] granted_ovc_num_all;
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output [PV-1 : 0] ivc_num_getting_ovc_grant;
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output [PV-1 : 0] ivc_num_getting_sw_grant;
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output [PV-1 : 0] nonspec_first_arbiter_granted_ivc_all;
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output [PV-1 : 0] spec_first_arbiter_granted_ivc_all;
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output [PP_1-1 : 0] granted_dest_port_all;
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output [PP_1-1 : 0] nonspec_granted_dest_port_all;
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output [P-1 : 0] any_ivc_sw_request_granted_all;
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input [PV-1 : 0] pck_is_single_flit_all;
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output [P-1 : 0] granted_dst_is_from_a_single_flit_pck;
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input clk,reset;
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//internal wires switch allocator
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wire [PV-1 : 0] spec_first_arbiter_granted_ivc_all;
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wire [PP_1-1 : 0] spec_granted_dest_port_all;
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wire [P-1 : 0] spec_any_ivc_grant_valid;
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wire [P-1 : 0] valid_speculation;
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//speculative switch allocator
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spec_sw_alloc #(
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.V(V),
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.P(P),
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.DEBUG_EN(DEBUG_EN),
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.SWA_ARBITER_TYPE(SWA_ARBITER_TYPE),
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.MIN_PCK_SIZE(MIN_PCK_SIZE)
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)
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speculative_sw_allocator
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(
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.ivc_granted_all(ivc_num_getting_sw_grant),
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.ivc_request_all(ivc_request_all),
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.ovc_is_assigned_all(ovc_is_assigned_all),
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.assigned_ovc_not_full_all(assigned_ovc_not_full_all),
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.dest_port_all(dest_port_all),
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.granted_dest_port_all(granted_dest_port_all),
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.nonspec_granted_dest_port_all(nonspec_granted_dest_port_all),
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.valid_speculation(valid_speculation),
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.spec_first_arbiter_granted_ivc_all(spec_first_arbiter_granted_ivc_all),
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.nonspec_first_arbiter_granted_ivc_all(nonspec_first_arbiter_granted_ivc_all),
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.spec_granted_dest_port_all(spec_granted_dest_port_all),
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.spec_any_ivc_grant_valid(spec_any_ivc_grant_valid),
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.any_ivc_sw_request_granted_all(any_ivc_sw_request_granted_all),
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.vc_weight_is_consumed_all(vc_weight_is_consumed_all),
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.iport_weight_is_consumed_all(iport_weight_is_consumed_all),
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.pck_is_single_flit_all(pck_is_single_flit_all),
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.granted_dst_is_from_a_single_flit_pck(granted_dst_is_from_a_single_flit_pck),
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.clk(clk),
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.reset(reset)
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);
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wire [V-1 : 0] masked_non_assigned_request [PV-1 : 0] ;
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wire [VV-1 : 0] masked_candidate_ovc_per_port [P-1 : 0] ;
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wire [V-1 : 0] spec_first_arbiter_granted_ivc_per_port[P-1 : 0] ;
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wire [V-1 : 0] spec_first_arbiter_ovc_request [P-1 : 0] ;
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wire [V-1 : 0] spec_first_arbiter_ovc_granted [P-1 : 0] ;
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wire [P_1-1 : 0] spec_granted_dest_port_per_port [P-1 : 0];
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wire [VP_1-1 : 0] cand_ovc_granted [P-1 : 0];
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wire [P_1-1 : 0] ovc_allocated_all_gen [PV-1 : 0];
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wire [V-1 : 0] granted_ovc_local_num_per_port [P-1 : 0];
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wire [V-1 : 0] ivc_local_num_getting_ovc_grant [P-1 : 0];
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genvar i,j;
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generate
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// IVC loop
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for(i=0;i< PV;i=i+1) begin :total_vc_loop
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//seprate input/output
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assign masked_non_assigned_request [i] = masked_ovc_request_all [(i+1)*V-1 : i*V ];
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end//for
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for(i=0;i< P;i=i+1) begin :port_loop3
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for(j=0;j< V;j=j+1) begin :vc_loop
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//merge masked_candidate_ovc in each port
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assign masked_candidate_ovc_per_port[i][(j+1)*V-1 : j*V] = masked_non_assigned_request [i*V+j];
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end//for j
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assign spec_first_arbiter_granted_ivc_per_port[i] =spec_first_arbiter_granted_ivc_all[(i+1)*V-1 : i*V];
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assign spec_granted_dest_port_per_port[i] =spec_granted_dest_port_all[(i+1)*P_1-1 : i*P_1];
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// multiplex candidate OVC of first level switch allocatore winner
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one_hot_mux #(
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.IN_WIDTH (VV),
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.SEL_WIDTH (V)
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)
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multiplexer2
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(
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.mux_in (masked_candidate_ovc_per_port [i]),
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.mux_out (spec_first_arbiter_ovc_request [i]),
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.sel (spec_first_arbiter_granted_ivc_per_port [i])
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);
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//first level arbiter to candidate only one OVC
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arbiter #(
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.ARBITER_WIDTH (V)
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)
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second_arbiter
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(
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.clk (clk),
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.reset (reset),
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.request (spec_first_arbiter_ovc_request[i]),
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.grant (spec_first_arbiter_ovc_granted[i]),
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.any_grant (valid_speculation[i])
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);
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//demultiplexer
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one_hot_demux #(
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.IN_WIDTH (V),
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.SEL_WIDTH (P_1)
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)demux1
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(
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.demux_sel (spec_granted_dest_port_per_port [i]),//selectore
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.demux_in (spec_first_arbiter_ovc_granted[i]),//repeated
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.demux_out (cand_ovc_granted[i])
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);
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assign granted_ovc_local_num_per_port[i]=(spec_any_ivc_grant_valid[i])? spec_first_arbiter_ovc_granted[i] : {V{1'b0}};
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assign ivc_local_num_getting_ovc_grant[i]= (spec_any_ivc_grant_valid[i] & valid_speculation[i])?spec_first_arbiter_granted_ivc_per_port [i] : {V{1'b0}};
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assign ivc_num_getting_ovc_grant[(i+1)*V-1 : i*V] = ivc_local_num_getting_ovc_grant[i];
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for(j=0;j<V; j=j+1)begin: assign_loop3
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assign granted_ovc_num_all[(i*VV)+((j+1)*V)-1 : (i*VV)+(j*V)]=granted_ovc_local_num_per_port[i];
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end//j
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end//i
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wire [PV-1 : 0] result;
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for(i=0;i< PV;i=i+1) begin :total_vc_loop2
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for(j=0;j<P; j=j+1)begin: assign_loop2
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if((i/V)<j )begin: jj
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assign ovc_allocated_all_gen[i][j-1] = cand_ovc_granted[j][i];
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end else if((i/V)>j) begin: hh
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assign ovc_allocated_all_gen[i][j] = cand_ovc_granted[j][i-V];
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end
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end//j
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assign ovc_allocated_all [i] = |ovc_allocated_all_gen[i];
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//synthesis translate_off
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//synopsys translate_off
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if(DEBUG_EN)begin :dbg
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check_single_bit_assertation #(
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.IN_WIDTH(P_1)
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)
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check_ovc_allocated
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(
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.in(ovc_allocated_all_gen[i]),
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.result(result[i])
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);
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always @(posedge clk ) begin
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if(~result[i]) $display("%t,Error: An OVC is assigned to more than one IVC %m",$time);
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end
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end //DEBUG_EN
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//synopsys translate_on
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//synthesis translate_on
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end//i
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endgenerate
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endmodule
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/******************************
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*
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* speculative switch allocator
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*
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******************************/
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module spec_sw_alloc #(
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parameter V = 4,
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parameter P = 5,
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parameter DEBUG_EN = 1,
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parameter SWA_ARBITER_TYPE="RRA",
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parameter MIN_PCK_SIZE=2 //minimum packet size in flits. The minimum value is 1.
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)(
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ivc_granted_all,
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ivc_request_all,
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ovc_is_assigned_all,
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assigned_ovc_not_full_all,
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dest_port_all,
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nonspec_granted_dest_port_all,
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granted_dest_port_all,
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valid_speculation,
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spec_first_arbiter_granted_ivc_all,
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nonspec_first_arbiter_granted_ivc_all,
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spec_granted_dest_port_all,
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spec_any_ivc_grant_valid,
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any_ivc_sw_request_granted_all,
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vc_weight_is_consumed_all,
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iport_weight_is_consumed_all,
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pck_is_single_flit_all,
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granted_dst_is_from_a_single_flit_pck,
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clk,
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reset
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);
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localparam
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P_1 = P-1,//assumed that no port request for itself!
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PV = V * P,
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VP_1 = V * P_1,
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PVP_1 = P * VP_1,
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PP_1 = P_1 * P;
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output [PV-1 : 0] ivc_granted_all;
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input [PV-1 : 0] ivc_request_all;
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input [PV-1 : 0] ovc_is_assigned_all;
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input [PV-1 : 0] assigned_ovc_not_full_all;
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input [PVP_1-1 : 0] dest_port_all;
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output [PP_1-1 : 0] granted_dest_port_all;
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output [PP_1-1 : 0] nonspec_granted_dest_port_all;
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input [P-1 : 0] valid_speculation;
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output [PV-1 : 0] spec_first_arbiter_granted_ivc_all;
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output [PV-1 : 0] nonspec_first_arbiter_granted_ivc_all;
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|
output [PP_1-1 : 0] spec_granted_dest_port_all;
|
324 |
|
|
output [P-1 : 0] spec_any_ivc_grant_valid;
|
325 |
|
|
output [P-1 : 0] any_ivc_sw_request_granted_all;
|
326 |
|
|
input [PV-1 : 0] vc_weight_is_consumed_all;
|
327 |
|
|
input [P-1 : 0] iport_weight_is_consumed_all;
|
328 |
|
|
input [PV-1 : 0] pck_is_single_flit_all;
|
329 |
|
|
output [P-1 : 0] granted_dst_is_from_a_single_flit_pck;
|
330 |
|
|
|
331 |
|
|
input clk, reset;
|
332 |
|
|
|
333 |
|
|
|
334 |
|
|
|
335 |
|
|
//internal wire
|
336 |
|
|
wire [PV-1 : 0] spec_ivc_granted_all,nonspec_ivc_granted_all;
|
337 |
|
|
wire [PV-1 : 0] spec_ivc_request_all,nonspec_ivc_request_all;
|
338 |
|
|
wire [PV-1 : 0] spec_assigned_ovc_not_full_all,nonspec_assigned_ovc_not_full_all;
|
339 |
|
|
wire [PVP_1-1 : 0] spec_dest_port_all,nonspec_dest_port_all;
|
340 |
|
|
wire [PP_1-1 : 0] spec_granted_dest_port_all,spec_granted_dest_port_all_accepted;
|
341 |
|
|
wire [P-1 : 0] nonspec_inport_granted_all,nonspec_outport_granted_all;
|
342 |
|
|
wire [PP_1-1 : 0] spec_granted_dest_port_all_pre;
|
343 |
|
|
|
344 |
|
|
wire [P_1-1 : 0] nonspec_portsel_granted [P-1 : 0];
|
345 |
|
|
wire [PP_1-1 : 0] spec_request_acceptable;
|
346 |
|
|
wire [P_1-1 : 0] spec_request_accepted [P-1 : 0];
|
347 |
|
|
wire [P-1 : 0] any_spec_request_accepted;
|
348 |
|
|
wire [PV-1 : 0] spec_ivc_granted_all_accepted;
|
349 |
|
|
wire [P-1 : 0] spec_any_ivc_grant,nonspec_any_ivc_grant;
|
350 |
|
|
|
351 |
|
|
|
352 |
|
|
sw_alloc_sub#(
|
353 |
|
|
.V(V),
|
354 |
|
|
.P(P),
|
355 |
|
|
.SWA_ARBITER_TYPE(SWA_ARBITER_TYPE),
|
356 |
|
|
.MIN_PCK_SIZE(MIN_PCK_SIZE)
|
357 |
|
|
|
358 |
|
|
)
|
359 |
|
|
speculative_alloc
|
360 |
|
|
(
|
361 |
|
|
.ivc_granted_all(spec_ivc_granted_all),
|
362 |
|
|
.ivc_request_all(spec_ivc_request_all),
|
363 |
|
|
.assigned_ovc_not_full_all(spec_assigned_ovc_not_full_all),
|
364 |
|
|
.dest_port_all(spec_dest_port_all),
|
365 |
|
|
.granted_dest_port_all(spec_granted_dest_port_all_pre),
|
366 |
|
|
.first_arbiter_granted_ivc_all(spec_first_arbiter_granted_ivc_all),
|
367 |
|
|
.first_arbiter_granted_port_all( ),
|
368 |
|
|
.any_ivc_grant (spec_any_ivc_grant),
|
369 |
|
|
.vc_weight_is_consumed_all(vc_weight_is_consumed_all),
|
370 |
|
|
.iport_weight_is_consumed_all(iport_weight_is_consumed_all),
|
371 |
|
|
.pck_is_single_flit_all(pck_is_single_flit_all),
|
372 |
|
|
.granted_dst_is_from_a_single_flit_pck(granted_dst_is_from_a_single_flit_pck),
|
373 |
|
|
.inport_granted_all ( ),
|
374 |
|
|
.outport_granted_all( ),
|
375 |
|
|
.clk (clk),
|
376 |
|
|
.reset (reset)
|
377 |
|
|
);
|
378 |
|
|
|
379 |
|
|
|
380 |
|
|
sw_alloc_sub#(
|
381 |
|
|
.V(V),
|
382 |
|
|
.P(P),
|
383 |
|
|
.SWA_ARBITER_TYPE(SWA_ARBITER_TYPE),
|
384 |
|
|
.MIN_PCK_SIZE(MIN_PCK_SIZE)
|
385 |
|
|
)
|
386 |
|
|
nonspeculative_alloc
|
387 |
|
|
(
|
388 |
|
|
.ivc_granted_all (nonspec_ivc_granted_all),
|
389 |
|
|
.ivc_request_all (nonspec_ivc_request_all),
|
390 |
|
|
.assigned_ovc_not_full_all (nonspec_assigned_ovc_not_full_all),
|
391 |
|
|
.dest_port_all (nonspec_dest_port_all),
|
392 |
|
|
.granted_dest_port_all (nonspec_granted_dest_port_all),
|
393 |
|
|
.inport_granted_all (nonspec_inport_granted_all),
|
394 |
|
|
.outport_granted_all (nonspec_outport_granted_all),
|
395 |
|
|
.first_arbiter_granted_ivc_all (nonspec_first_arbiter_granted_ivc_all),
|
396 |
|
|
.first_arbiter_granted_port_all ( ),
|
397 |
|
|
.any_ivc_grant (nonspec_any_ivc_grant),
|
398 |
|
|
.vc_weight_is_consumed_all (vc_weight_is_consumed_all),
|
399 |
|
|
.iport_weight_is_consumed_all(iport_weight_is_consumed_all),
|
400 |
|
|
.pck_is_single_flit_all( ),
|
401 |
|
|
.granted_dst_is_from_a_single_flit_pck( ),
|
402 |
|
|
.clk (clk),
|
403 |
|
|
.reset (reset)
|
404 |
|
|
);
|
405 |
|
|
|
406 |
|
|
assign nonspec_ivc_request_all = ivc_request_all & ovc_is_assigned_all;
|
407 |
|
|
assign spec_ivc_request_all = ivc_request_all & ~ovc_is_assigned_all;
|
408 |
|
|
assign spec_assigned_ovc_not_full_all = {PV{1'b1}};
|
409 |
|
|
assign nonspec_assigned_ovc_not_full_all = assigned_ovc_not_full_all;
|
410 |
|
|
assign spec_dest_port_all = dest_port_all;
|
411 |
|
|
assign nonspec_dest_port_all = dest_port_all;
|
412 |
|
|
|
413 |
|
|
|
414 |
|
|
|
415 |
|
|
genvar i,j;
|
416 |
|
|
generate
|
417 |
|
|
for(i=0;i<P; i=i+1) begin :port_lp
|
418 |
|
|
//remove non-spec inport from the nonspec_outport_granted_all
|
419 |
|
|
for(j=0;j<P; j=j+1)begin: port_loop2
|
420 |
|
|
if(i<j)begin: jj
|
421 |
|
|
assign nonspec_portsel_granted[i][j-1] = nonspec_outport_granted_all[j];
|
422 |
|
|
end else if(i>j)begin: hh
|
423 |
|
|
assign nonspec_portsel_granted[i][j] = nonspec_outport_granted_all [j];
|
424 |
|
|
end
|
425 |
|
|
//if(i==j) wires are left disconnected
|
426 |
|
|
end//j
|
427 |
|
|
// an speculative grant is acceptable if the non-speculative request is not granted for both inport request and outport grant
|
428 |
|
|
assign spec_request_acceptable[(i+1)*P_1-1 : i*P_1] = (nonspec_inport_granted_all[i])? {P_1{1'b0}} : ~nonspec_portsel_granted[i];
|
429 |
|
|
assign spec_request_accepted [i]= spec_request_acceptable[(i+1)*P_1-1 : i*P_1] & spec_granted_dest_port_all_pre[(i+1)*P_1-1 : i*P_1];
|
430 |
|
|
assign any_spec_request_accepted [i] = |spec_request_accepted [i];
|
431 |
|
|
assign spec_ivc_granted_all_accepted[(i+1)*V-1 : i*V] = (any_spec_request_accepted [i] & valid_speculation[i])? spec_ivc_granted_all[(i+1)*V-1 : i*V]: {V{1'b0}};
|
432 |
|
|
assign spec_granted_dest_port_all_accepted[(i+1)*P_1-1 : i*P_1]=(valid_speculation[i])? spec_request_accepted [i]: {P_1{1'b0}};
|
433 |
|
|
|
434 |
|
|
//synthesis translate_off
|
435 |
|
|
//synopsys translate_off
|
436 |
|
|
if(DEBUG_EN)begin :dbg
|
437 |
|
|
wire [P_1-1 : 0] nonspec_check [P-1:0];
|
438 |
|
|
wire [P_1-1 : 0] spec_check [P-1:0];
|
439 |
|
|
assign nonspec_check[i] = nonspec_granted_dest_port_all[(i+1)*P_1-1 : i*P_1];
|
440 |
|
|
assign spec_check[i]= spec_granted_dest_port_all_accepted[(i+1)*P_1-1 : i*P_1];
|
441 |
|
|
always @(posedge clk) begin
|
442 |
|
|
if(nonspec_granted_dest_port_all[(i+1)*P_1-1 : i*P_1] >0 && spec_granted_dest_port_all_accepted[(i+1)*P_1-1 : i*P_1]>0 ) $display("%t: Error: Both speculative and nonspeculative is granted for one port",$time);
|
443 |
|
|
if(nonspec_ivc_granted_all [(i+1)*V-1 : i*V] >0 && spec_ivc_granted_all_accepted[(i+1)*V-1 : i*V]>0 ) $display("%t: Error: Both speculative and nonspeculative is granted for one port",$time);
|
444 |
|
|
end
|
445 |
|
|
end //DEBUG
|
446 |
|
|
//synopsys translate_on
|
447 |
|
|
//synthesis translate_on
|
448 |
|
|
|
449 |
|
|
|
450 |
|
|
|
451 |
|
|
end//i
|
452 |
|
|
endgenerate
|
453 |
|
|
|
454 |
|
|
assign spec_any_ivc_grant_valid = any_spec_request_accepted & valid_speculation & spec_any_ivc_grant;
|
455 |
|
|
assign any_ivc_sw_request_granted_all = nonspec_any_ivc_grant | spec_any_ivc_grant_valid;
|
456 |
|
|
|
457 |
|
|
assign granted_dest_port_all = nonspec_granted_dest_port_all | spec_granted_dest_port_all_accepted;
|
458 |
|
|
assign ivc_granted_all = nonspec_ivc_granted_all | spec_ivc_granted_all_accepted;
|
459 |
|
|
assign spec_granted_dest_port_all = spec_granted_dest_port_all_accepted;
|
460 |
|
|
|
461 |
|
|
endmodule
|
462 |
|
|
|
463 |
|
|
/**********************************
|
464 |
|
|
*
|
465 |
|
|
* canonical switch allocator
|
466 |
|
|
*
|
467 |
|
|
**********************************/
|
468 |
|
|
|
469 |
|
|
|
470 |
|
|
module sw_alloc_sub#(
|
471 |
|
|
parameter V = 4,
|
472 |
|
|
parameter P = 5,
|
473 |
|
|
parameter SWA_ARBITER_TYPE="RRA",
|
474 |
|
|
parameter MIN_PCK_SIZE=2 //minimum packet size in flits. The minimum value is 1.
|
475 |
|
|
|
476 |
|
|
)(
|
477 |
|
|
ivc_granted_all,
|
478 |
|
|
ivc_request_all,
|
479 |
|
|
assigned_ovc_not_full_all,
|
480 |
|
|
dest_port_all,
|
481 |
|
|
granted_dest_port_all,
|
482 |
|
|
inport_granted_all,
|
483 |
|
|
outport_granted_all,
|
484 |
|
|
first_arbiter_granted_ivc_all,
|
485 |
|
|
first_arbiter_granted_port_all,
|
486 |
|
|
vc_weight_is_consumed_all,
|
487 |
|
|
iport_weight_is_consumed_all,
|
488 |
|
|
any_ivc_grant,
|
489 |
|
|
pck_is_single_flit_all,
|
490 |
|
|
granted_dst_is_from_a_single_flit_pck,
|
491 |
|
|
clk,
|
492 |
|
|
reset
|
493 |
|
|
);
|
494 |
|
|
|
495 |
|
|
|
496 |
|
|
localparam
|
497 |
|
|
P_1 = P-1,//assumed that no port request for itself!
|
498 |
|
|
PV = V * P,
|
499 |
|
|
VP_1 = V * P_1,
|
500 |
|
|
PVP_1 = P * VP_1,
|
501 |
|
|
PP_1 = P_1 * P,
|
502 |
|
|
PP = P * P;
|
503 |
|
|
|
504 |
|
|
|
505 |
|
|
output [PV-1 : 0] ivc_granted_all;
|
506 |
|
|
input [PV-1 : 0] ivc_request_all;
|
507 |
|
|
input [PV-1 : 0] assigned_ovc_not_full_all;
|
508 |
|
|
input [PVP_1-1 : 0] dest_port_all;
|
509 |
|
|
output [PP_1-1 : 0] granted_dest_port_all;
|
510 |
|
|
output [P-1 : 0] inport_granted_all;
|
511 |
|
|
output [P-1 : 0] outport_granted_all;
|
512 |
|
|
output [PV-1 : 0] first_arbiter_granted_ivc_all;
|
513 |
|
|
output [PP_1-1 : 0] first_arbiter_granted_port_all;
|
514 |
|
|
output [P-1 : 0] any_ivc_grant;
|
515 |
|
|
input [PV-1 : 0 ] vc_weight_is_consumed_all;
|
516 |
|
|
input [P-1:0] iport_weight_is_consumed_all;
|
517 |
|
|
input [PV-1 : 0] pck_is_single_flit_all;
|
518 |
|
|
output [P-1 : 0] granted_dst_is_from_a_single_flit_pck;
|
519 |
|
|
input clk;
|
520 |
|
|
input reset;
|
521 |
|
|
|
522 |
|
|
//separte input per port
|
523 |
|
|
wire [V-1 : 0] ivc_granted [P-1 : 0];
|
524 |
|
|
wire [V-1 : 0] ivc_request [P-1 : 0];
|
525 |
|
|
wire [V-1 : 0] ivc_not_full [P-1 : 0];
|
526 |
|
|
wire [VP_1-1 : 0] dest_port_ivc [P-1 : 0];
|
527 |
|
|
wire [P_1-1 : 0] granted_dest_port [P-1 : 0];
|
528 |
|
|
|
529 |
|
|
// internal wires
|
530 |
|
|
wire [V-1 : 0] ivc_masked [P-1 : 0];//output of mask and
|
531 |
|
|
wire [V-1 : 0] first_arbiter_grant [P-1 : 0];//output of first arbiter
|
532 |
|
|
wire [P_1-1 : 0] dest_port [P-1 : 0];//output of multiplexer
|
533 |
|
|
wire [P_1-1 : 0] second_arbiter_request [P-1 : 0];
|
534 |
|
|
wire [P_1-1 : 0] second_arbiter_grant [P-1 : 0];
|
535 |
|
|
wire [P_1-1 : 0] second_arbiter_weight_consumed [P-1 : 0];
|
536 |
|
|
wire [V-1 : 0] vc_weight_is_consumed [P-1 : 0];
|
537 |
|
|
wire [P-1 : 0] winner_weight_consumed;
|
538 |
|
|
|
539 |
|
|
wire [P_1-1 : 0] single_flit_granted_dst [P-1 : 0];
|
540 |
|
|
wire [PP-1 : 0] single_flit_granted_dst_all;
|
541 |
|
|
wire [V-1 : 0] pck_is_single_flit [P-1 : 0];
|
542 |
|
|
wire [P-1 : 0] single_flit_pck_local_grant;
|
543 |
|
|
|
544 |
|
|
genvar i,j;
|
545 |
|
|
generate
|
546 |
|
|
|
547 |
|
|
for(i=0;i< P;i=i+1) begin :port_loop
|
548 |
|
|
//assign in/out to the port based wires
|
549 |
|
|
//output
|
550 |
|
|
assign ivc_granted_all [(i+1)*V-1 : i*V] = ivc_granted [i];
|
551 |
|
|
assign granted_dest_port_all [(i+1)*P_1-1 : i*P_1] = granted_dest_port[i];
|
552 |
|
|
assign first_arbiter_granted_ivc_all[(i+1)*V-1 : i*V]= first_arbiter_grant[i];
|
553 |
|
|
//input
|
554 |
|
|
assign ivc_request[i] = ivc_request_all [(i+1)*V-1 : i*V];
|
555 |
|
|
assign ivc_not_full[i] = assigned_ovc_not_full_all[(i+1)*V-1 : i*V];
|
556 |
|
|
assign dest_port_ivc[i] = dest_port_all [(i+1)*VP_1-1 : i*VP_1];
|
557 |
|
|
assign vc_weight_is_consumed[i] = vc_weight_is_consumed_all [(i+1)*V-1 : i*V];
|
558 |
|
|
|
559 |
|
|
//mask
|
560 |
|
|
assign ivc_masked[i] = ivc_request[i] & ivc_not_full[i];
|
561 |
|
|
|
562 |
|
|
//first level arbiter
|
563 |
|
|
swa_input_port_arbiter #(
|
564 |
|
|
.ARBITER_WIDTH(V),
|
565 |
|
|
.EXT_P_EN(0),
|
566 |
|
|
.ARBITER_TYPE(SWA_ARBITER_TYPE)
|
567 |
|
|
)
|
568 |
|
|
input_arbiter
|
569 |
|
|
(
|
570 |
|
|
.ext_pr_en_i(1'b1),// not used here anyway
|
571 |
|
|
.request(ivc_masked [i]),
|
572 |
|
|
.grant(first_arbiter_grant[i]),
|
573 |
|
|
.any_grant( ),
|
574 |
|
|
.clk(clk),
|
575 |
|
|
.reset(reset),
|
576 |
|
|
.vc_weight_is_consumed(vc_weight_is_consumed[i]),
|
577 |
|
|
.winner_weight_consumed(winner_weight_consumed[i])
|
578 |
|
|
);
|
579 |
|
|
|
580 |
|
|
//destination port multiplexer
|
581 |
|
|
one_hot_mux #(
|
582 |
|
|
.IN_WIDTH(VP_1),
|
583 |
|
|
.SEL_WIDTH(V)
|
584 |
|
|
)
|
585 |
|
|
multiplexer
|
586 |
|
|
(
|
587 |
|
|
.mux_in (dest_port_ivc [i]),
|
588 |
|
|
.mux_out(dest_port [i]),
|
589 |
|
|
.sel(first_arbiter_grant[i])
|
590 |
|
|
);
|
591 |
|
|
|
592 |
|
|
assign first_arbiter_granted_port_all[(i+1)*P_1-1 : i*P_1] = dest_port [i];
|
593 |
|
|
|
594 |
|
|
|
595 |
|
|
if(MIN_PCK_SIZE == 1) begin :single_flit_supported
|
596 |
|
|
assign pck_is_single_flit[i] = pck_is_single_flit_all [(i+1)*V-1 : i*V];
|
597 |
|
|
//single_flit req multiplexer
|
598 |
|
|
one_hot_mux #(
|
599 |
|
|
.IN_WIDTH (V),
|
600 |
|
|
.SEL_WIDTH (V)
|
601 |
|
|
)
|
602 |
|
|
multiplexer2
|
603 |
|
|
(
|
604 |
|
|
.mux_in (pck_is_single_flit [i]),
|
605 |
|
|
.mux_out (single_flit_pck_local_grant[i]),
|
606 |
|
|
.sel (first_arbiter_grant[i])
|
607 |
|
|
|
608 |
|
|
);
|
609 |
|
|
|
610 |
|
|
assign single_flit_granted_dst[i] = (single_flit_pck_local_grant[i])? granted_dest_port[i] : {P_1{1'b0}};
|
611 |
|
|
|
612 |
|
|
add_sw_loc_one_hot #(
|
613 |
|
|
.P(P),
|
614 |
|
|
.SW_LOC(i)
|
615 |
|
|
)
|
616 |
|
|
add_sw_loc
|
617 |
|
|
(
|
618 |
|
|
.destport_in(single_flit_granted_dst[i]),
|
619 |
|
|
.destport_out(single_flit_granted_dst_all[(i+1)*P-1 : i*P])
|
620 |
|
|
);
|
621 |
|
|
|
622 |
|
|
end else begin : single_flit_notsupported
|
623 |
|
|
assign single_flit_pck_local_grant[i] = 1'b0;
|
624 |
|
|
assign single_flit_granted_dst[i] = {P_1{1'b0}};
|
625 |
|
|
assign single_flit_granted_dst_all[(i+1)*P-1 : i*P]={P{1'b0}};
|
626 |
|
|
end
|
627 |
|
|
|
628 |
|
|
|
629 |
|
|
|
630 |
|
|
//second arbiter input/output generate
|
631 |
|
|
for(j=0;j<P; j=j+1)begin: assign_loop
|
632 |
|
|
if(i<j)begin: jj
|
633 |
|
|
assign second_arbiter_request[i][j-1] = dest_port[j][i] ;
|
634 |
|
|
//assign second_arbiter_weight_consumed[i][j-1] =winner_weight_consumed[j] ;
|
635 |
|
|
assign second_arbiter_weight_consumed[i][j-1] =iport_weight_is_consumed_all[j];
|
636 |
|
|
assign granted_dest_port[j][i] = second_arbiter_grant [i][j-1] ;
|
637 |
|
|
end else if(i>j)begin: hh
|
638 |
|
|
assign second_arbiter_request[i][j] = dest_port [j][i-1];
|
639 |
|
|
//assign second_arbiter_weight_consumed[i][j] =winner_weight_consumed[j];
|
640 |
|
|
assign second_arbiter_weight_consumed[i][j] =iport_weight_is_consumed_all[j];
|
641 |
|
|
assign granted_dest_port[j][i-1] = second_arbiter_grant [i][j];
|
642 |
|
|
end
|
643 |
|
|
//if(i==j) wires are left disconnected
|
644 |
|
|
|
645 |
|
|
end
|
646 |
|
|
|
647 |
|
|
|
648 |
|
|
|
649 |
|
|
//second level arbiter
|
650 |
|
|
swa_output_port_arbiter #(
|
651 |
|
|
.ARBITER_WIDTH(P_1),
|
652 |
|
|
.ARBITER_TYPE(SWA_ARBITER_TYPE) // RRA, WRRA
|
653 |
|
|
)
|
654 |
|
|
output_arbiter
|
655 |
|
|
(
|
656 |
|
|
.weight_consumed(second_arbiter_weight_consumed[i]), // only used for WRRA
|
657 |
|
|
.clk(clk),
|
658 |
|
|
.reset(reset),
|
659 |
|
|
.request(second_arbiter_request [i]),
|
660 |
|
|
.grant(second_arbiter_grant [i]),
|
661 |
|
|
.any_grant(outport_granted_all [i])
|
662 |
|
|
);
|
663 |
|
|
|
664 |
|
|
|
665 |
|
|
|
666 |
|
|
//any ivc
|
667 |
|
|
assign any_ivc_grant[i] = | granted_dest_port[i];
|
668 |
|
|
|
669 |
|
|
assign ivc_granted[i] = (any_ivc_grant[i]) ? first_arbiter_grant[i] : {V{1'b0}};
|
670 |
|
|
|
671 |
|
|
assign inport_granted_all[i] =any_ivc_grant[i];
|
672 |
|
|
end//for
|
673 |
|
|
endgenerate
|
674 |
|
|
|
675 |
|
|
custom_or #(
|
676 |
|
|
.IN_NUM(P),
|
677 |
|
|
.OUT_WIDTH(P)
|
678 |
|
|
)
|
679 |
|
|
or_dst
|
680 |
|
|
(
|
681 |
|
|
.or_in(single_flit_granted_dst_all),
|
682 |
|
|
.or_out(granted_dst_is_from_a_single_flit_pck)
|
683 |
|
|
);
|
684 |
|
|
|
685 |
|
|
|
686 |
|
|
endmodule
|
687 |
|
|
|
688 |
|
|
|