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URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_noc/] [noc_filelist.f] - Blame information for rev 54

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Line No. Rev Author Line
1 48 alirezamon
+incdir+./
2 54 alirezamon
+incdir+./../
3 48 alirezamon
./pronoc_pkg.sv
4
./../main_comp.v
5
./../arbiter.v
6
./class_table.v
7
./ss_allocator.sv
8
./route_torus.v
9
./header_flit.sv
10
./noc_top.sv
11
./fattree_noc_top.sv
12
./fattree_route.v
13 54 alirezamon
./comb_nonspec.sv
14 48 alirezamon
./inout_ports.sv
15
./wrra.v
16
./input_ports.sv
17
./tree_noc_top.sv
18
./tree_route.v
19
./comb-spec1.v
20 54 alirezamon
./combined_vc_sw_alloc.sv
21 48 alirezamon
./mesh_torus_routting.v
22
./baseline.v
23
./comb_spec2.v
24
./flit_buffer_reg_bas.v
25
./route_mesh.v
26
./router_bypass.sv
27
./traffic_gen_top.sv
28
./congestion_analyzer.v
29
./output_ports.sv
30
./routing.v
31
./router_two_stage.sv
32
./crossbar.v
33
./iport_reg_base.sv
34 54 alirezamon
./flit_buffer.sv
35
./mesh_torus.sv
36 48 alirezamon
./debug.v
37
./router_top.sv
38
./mesh_torus_noc_top.sv
39
./star_noc.sv
40
./fmesh.sv
41
./packet_injector.sv
42 54 alirezamon
./multicast.sv
43 48 alirezamon
 
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