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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_peripheral/] [Other/] [fout_simulator.v] - Blame information for rev 48

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/**************************************
* Module: print to file simulator.
* Date:2017-06-13
* Author: alireza
*
* Description: A simple module that use Verilog fwrite command to repicate C fprintf command.
* TODO: suuport fread vcommand
***************************************/
// synthesis translate_off
`timescale 1ns / 1ps
// synthesis translate_on
 
 
 
module  fout_simulator #(
    parameter BUFFER_SIZE   =255,  // for getting fle name
        parameter FLUSH_COUNTER = 0    // define after how many charactor writes the $fflush command should be executaed. define it as zero to deactivate the $fflush command. 
 
)(
    reset,
    clk,
    s_dat_i,
    s_sel_i,
    s_addr_i,
    s_cti_i,
    s_stb_i,
    s_cyc_i,
    s_we_i,
    s_dat_o,
    s_ack_o
 
);
 
   localparam
        Dw            =   32,
        M_Aw          =   32,
    TAGw          =   3,
    SELw          =   4;
 
 
 
    input reset,clk;
        //wishbone slave interface signals
    input   [Dw-1       :   0]      s_dat_i;
    input   [SELw-1     :   0]      s_sel_i;
    input   [2:0]                            s_addr_i;
    input   [TAGw-1     :   0]      s_cti_i;
    input                           s_stb_i;
    input                           s_cyc_i;
    input                           s_we_i;
 
    output  reg [Dw-1       :   0]  s_dat_o;
    output  reg                     s_ack_o;
 
 
 
 
     wire s_ack_o_next    =   s_stb_i & (~s_ack_o);
 
    always @(posedge clk)begin
        if( reset   )s_ack_o<=1'b0;
       else s_ack_o<=s_ack_o_next;
    end
 
 
//synthesis translate_off
//synopsys  translate_off
 
 
 
        function integer log2;
      input integer number; begin
         log2=(number <=1) ? 1: 0;
         while(2**log2<number) begin
            log2=log2+1;
         end
      end
    endfunction // log2 
 
 
 
    localparam Bw = log2(BUFFER_SIZE+1);
 
 
    reg [7  : 0 ]  buffer [ 0  : BUFFER_SIZE-1];
    wire [ BUFFER_SIZE*8-1 : 0] buff_string;
 
 
 
 
    reg [Bw-1   :   0] ptr,ptr_next;
 
    always @(posedge clk)begin
        if( reset   )s_ack_o<=1'b0;
       else s_ack_o<=s_ack_o_next;
    end
 
 
        reg buff_en;
 
 
 
        reg [7: 0 ]  file_ptr,file_ptr_next;
        integer file [0:126];
 
        genvar i;
    generate
    for (i=0;i<BUFFER_SIZE;i=i+1)begin
                assign  buff_string [(i+1)*8-1 : i*8] = buffer [BUFFER_SIZE-i-1];
        end
        endgenerate
 
        integer k;
        initial begin
                for (k=0;k<127;k=k+1)file[k] = 0;
        end
 
 
 
 
 
 
localparam //WB address registers
        GET_FLE_PTR   = 0,
        GET_FILE_NAME   = 1,
        GET_FILE_CONTENT = 2,
        FILE_MODE =3;
 
localparam [3:0]
        MODE_CLOSE  = 1,
        MODE_W      = 2,
        MODE_WB     = 3,
        MODE_A      = 4,
        MODE_AB     = 5;
 
 
localparam CNTw= log2(FLUSH_COUNTER);
 
reg [CNTw-1: 0] counter_next,counter;
reg [3: 0] mode,mode_next;
   always @(*)begin
        counter_next=counter;
        ptr_next = ptr;
        buff_en=0;
        file_ptr_next=file_ptr;
                mode_next = mode;
                if( s_stb_i &  s_cyc_i &  s_we_i & ~s_ack_o) begin // get a write command from WB interface
                        case(s_addr_i)
                        GET_FLE_PTR:begin
                                        file_ptr_next=s_dat_i[7:0];
                        end
                        GET_FILE_NAME:begin
                                if(s_dat_i[7:0]==0)begin //end of file name. Open the file to write
                                        case(mode)
                                                MODE_W: begin
                                                        file[file_ptr] = $fopen(buff_string, "w");
                                                        $display("file_ptr[%u]= fopen(%s,w)\n",file_ptr,buff_string);
                                                end
                                                MODE_WB:  begin
                                                    file[file_ptr] = $fopen(buff_string, "wb");
                                                        $display("file_ptr[%u]= fopen(%s,wb)\n",file_ptr,buff_string);
                                                end
                                                MODE_A:   begin
                                                    file[file_ptr] = $fopen(buff_string, "a");
                                                        $display("file_ptr[%u]= fopen(%s,a)\n",file_ptr,buff_string);
                                                end
                                                MODE_AB:  begin
                                                        file[file_ptr] = $fopen(buff_string, "ab");
                                                        $display("file_ptr[%u]= $fopen(%s,ab)\n",file_ptr,buff_string);
                                                end
                                                default :   begin
                                                        $display("Mode %d is not supported fule mode",mode);
                                                        $stop;
                                                end
                                        endcase
                                        ptr_next  =  0;
 
                                end else begin
                                        buff_en=1;
                                        if( ptr < BUFFER_SIZE)begin
                                                ptr_next  =  ptr+1;
                                                if(counter < FLUSH_COUNTER ) counter_next=counter+1'b1;
                                                else counter_next={CNTw{1'b0}};
                                        end
                                end
                        end
                        GET_FILE_CONTENT:begin
                                $fwrite (file[file_ptr], "%c", s_dat_i[7:0]);
 
                        end
                        FILE_MODE:begin
                                mode_next = s_dat_i[3:0];
                                //$display("mode[%u].\n",mode); 
                                if(s_dat_i[3:0]== MODE_CLOSE) begin
                                        $fclose (file[file_ptr]);
                                        file[file_ptr] = 0;
                                        $display("Close file_ptr[%u].\n",file_ptr);
                                end
                        end
                        endcase
                end
    end
 
 
   generate
   if (FLUSH_COUNTER>0) begin :flush
           for (i=0;i<127;i=i+1)begin :i_
                        always @ (posedge clk)begin
                                if(reset==1'b0 && counter== {CNTw{1'b0}} && file[i]!=0) $fflush (file[i]);
                        end     //always                
           end //for
   end//if
   endgenerate
 
 
 
    always @(posedge clk)begin
        if(reset) begin
 
            ptr<=0;
            buffer[0]<=0;
                        file_ptr<=0;
                        counter<={CNTw{1'b0}};
                        mode<=3'd0;
        end else begin
                        file_ptr<=file_ptr_next;
            counter<=counter_next;
            ptr <= ptr_next;
                        mode<= mode_next;
            if( buff_en )begin
                buffer[ptr]<=s_dat_i[7:0];
                if(ptr<BUFFER_SIZE-1) buffer[ptr+1]<=0;
            end
        end
    end
 
 
 
 
 
 //synopsys  translate_on
//synthesis translate_on 
 
endmodule
 
 
 
 

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_peripheral/] [Other/] [fout_simulator.v] - Blame information for rev 48

Line No.	Rev	Author	Line
1	48	alirezamon	`/**************************************`
2			`* Module: print to file simulator.`
3			`* Date:2017-06-13`
4			`* Author: alireza`
5			`*`
6			`* Description: A simple module that use Verilog fwrite command to repicate C fprintf command.`
7			`* TODO: suuport fread vcommand`
8			`***************************************/`
9			`// synthesis translate_off`
10			`timescale 1ns / 1ps
11			`// synthesis translate_on`
12
13
14
15			`module fout_simulator #(`
16			`parameter BUFFER_SIZE =255, // for getting fle name`
17			`parameter FLUSH_COUNTER = 0 // define after how many charactor writes the $fflush command should be executaed. define it as zero to deactivate the $fflush command.`
18
19			`)(`
20			`reset,`
21			`clk,`
22			`s_dat_i,`
23			`s_sel_i,`
24			`s_addr_i,`
25			`s_cti_i,`
26			`s_stb_i,`
27			`s_cyc_i,`
28			`s_we_i,`
29			`s_dat_o,`
30			`s_ack_o`
31
32			`);`
33
34			`localparam`
35			`Dw = 32,`
36			`M_Aw = 32,`
37			`TAGw = 3,`
38			`SELw = 4;`
39
40
41
42			`input reset,clk;`
43			`//wishbone slave interface signals`
44			`input [Dw-1 : 0] s_dat_i;`
45			`input [SELw-1 : 0] s_sel_i;`
46			`input [2:0] s_addr_i;`
47			`input [TAGw-1 : 0] s_cti_i;`
48			`input s_stb_i;`
49			`input s_cyc_i;`
50			`input s_we_i;`
51
52			`output reg [Dw-1 : 0] s_dat_o;`
53			`output reg s_ack_o;`
54
55
56
57
58			`wire s_ack_o_next = s_stb_i & (~s_ack_o);`
59
60			`always @(posedge clk)begin`
61			`if( reset )s_ack_o<=1'b0;`
62			`else s_ack_o<=s_ack_o_next;`
63			`end`
64
65
66			`//synthesis translate_off`
67			`//synopsys translate_off`
68
69
70
71			`function integer log2;`
72			`input integer number; begin`
73			`log2=(number <=1) ? 1: 0;`
74			`while(2**log2<number) begin`
75			`log2=log2+1;`
76			`end`
77			`end`
78			`endfunction // log2`
79
80
81
82			`localparam Bw = log2(BUFFER_SIZE+1);`
83
84
85			`reg [7 : 0 ] buffer [ 0 : BUFFER_SIZE-1];`
86			`wire [ BUFFER_SIZE*8-1 : 0] buff_string;`
87
88
89
90
91			`reg [Bw-1 : 0] ptr,ptr_next;`
92
93			`always @(posedge clk)begin`
94			`if( reset )s_ack_o<=1'b0;`
95			`else s_ack_o<=s_ack_o_next;`
96			`end`
97
98
99			`reg buff_en;`
100
101
102
103			`reg [7: 0 ] file_ptr,file_ptr_next;`
104			`integer file [0:126];`
105
106			`genvar i;`
107			`generate`
108			`for (i=0;i<BUFFER_SIZE;i=i+1)begin`
109			`assign buff_string [(i+1)8-1 : i8] = buffer [BUFFER_SIZE-i-1];`
110			`end`
111			`endgenerate`
112
113			`integer k;`
114			`initial begin`
115			`for (k=0;k<127;k=k+1)file[k] = 0;`
116			`end`
117
118
119
120
121
122
123			`localparam //WB address registers`
124			`GET_FLE_PTR = 0,`
125			`GET_FILE_NAME = 1,`
126			`GET_FILE_CONTENT = 2,`
127			`FILE_MODE =3;`
128
129			`localparam [3:0]`
130			`MODE_CLOSE = 1,`
131			`MODE_W = 2,`
132			`MODE_WB = 3,`
133			`MODE_A = 4,`
134			`MODE_AB = 5;`
135
136
137			`localparam CNTw= log2(FLUSH_COUNTER);`
138
139			`reg [CNTw-1: 0] counter_next,counter;`
140			`reg [3: 0] mode,mode_next;`
141			`always @(*)begin`
142			`counter_next=counter;`
143			`ptr_next = ptr;`
144			`buff_en=0;`
145			`file_ptr_next=file_ptr;`
146			`mode_next = mode;`
147			`if( s_stb_i & s_cyc_i & s_we_i & ~s_ack_o) begin // get a write command from WB interface`
148			`case(s_addr_i)`
149			`GET_FLE_PTR:begin`
150			`file_ptr_next=s_dat_i[7:0];`
151			`end`
152			`GET_FILE_NAME:begin`
153			`if(s_dat_i[7:0]==0)begin //end of file name. Open the file to write`
154			`case(mode)`
155			`MODE_W: begin`
156			`file[file_ptr] = $fopen(buff_string, "w");`
157			`$display("file_ptr[%u]= fopen(%s,w)\n",file_ptr,buff_string);`
158			`end`
159			`MODE_WB: begin`
160			`file[file_ptr] = $fopen(buff_string, "wb");`
161			`$display("file_ptr[%u]= fopen(%s,wb)\n",file_ptr,buff_string);`
162			`end`
163			`MODE_A: begin`
164			`file[file_ptr] = $fopen(buff_string, "a");`
165			`$display("file_ptr[%u]= fopen(%s,a)\n",file_ptr,buff_string);`
166			`end`
167			`MODE_AB: begin`
168			`file[file_ptr] = $fopen(buff_string, "ab");`
169			`$display("file_ptr[%u]= $fopen(%s,ab)\n",file_ptr,buff_string);`
170			`end`
171			`default : begin`
172			`$display("Mode %d is not supported fule mode",mode);`
173			`$stop;`
174			`end`
175			`endcase`
176			`ptr_next = 0;`
177
178			`end else begin`
179			`buff_en=1;`
180			`if( ptr < BUFFER_SIZE)begin`
181			`ptr_next = ptr+1;`
182			`if(counter < FLUSH_COUNTER ) counter_next=counter+1'b1;`
183			`else counter_next={CNTw{1'b0}};`
184			`end`
185			`end`
186			`end`
187			`GET_FILE_CONTENT:begin`
188			`$fwrite (file[file_ptr], "%c", s_dat_i[7:0]);`
189
190			`end`
191			`FILE_MODE:begin`
192			`mode_next = s_dat_i[3:0];`
193			`//$display("mode[%u].\n",mode);`
194			`if(s_dat_i[3:0]== MODE_CLOSE) begin`
195			`$fclose (file[file_ptr]);`
196			`file[file_ptr] = 0;`
197			`$display("Close file_ptr[%u].\n",file_ptr);`
198			`end`
199			`end`
200			`endcase`
201			`end`
202			`end`
203
204
205			`generate`
206			`if (FLUSH_COUNTER>0) begin :flush`
207			`for (i=0;i<127;i=i+1)begin :i_`
208			`always @ (posedge clk)begin`
209			`if(reset==1'b0 && counter== {CNTw{1'b0}} && file[i]!=0) $fflush (file[i]);`
210			`end //always`
211			`end //for`
212			`end//if`
213			`endgenerate`
214
215
216
217			`always @(posedge clk)begin`
218			`if(reset) begin`
219
220			`ptr<=0;`
221			`buffer[0]<=0;`
222			`file_ptr<=0;`
223			`counter<={CNTw{1'b0}};`
224			`mode<=3'd0;`
225			`end else begin`
226			`file_ptr<=file_ptr_next;`
227			`counter<=counter_next;`
228			`ptr <= ptr_next;`
229			`mode<= mode_next;`
230			`if( buff_en )begin`
231			`buffer[ptr]<=s_dat_i[7:0];`
232			`if(ptr<BUFFER_SIZE-1) buffer[ptr+1]<=0;`
233			`end`
234			`end`
235			`end`
236
237
238
239
240
241			`//synopsys translate_on`
242			`//synthesis translate_on`
243
244			`endmodule`
245
246
247
248