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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [rtl/] [src_peripheral/] [jtag/] [jtag_simulation/] [jtag_wb_test/] [run_sim.sh] - Blame information for rev 48

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echo "Start simulation"
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#Modelsim altera edition
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#/home/alireza/intelFPGA_lite/18.1/modelsim_ase/bin/vsim -quiet -c -do model.tcl >&3
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/home/alireza/intelFPGA_lite/18.1/modelsim_ase/bin/vsim -quiet   -do model.tcl
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