URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_c/] [jtag/] [test_rtl/] [jtag_ram_test/] [sw/] [write_memory.sh] - Blame information for rev 48

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#!/bin/bash
 
#JTAG_INTFC="$PRONOC_WORK/toolchain/bin/JTAG_INTFC"
source ./jtag_intfc.sh
 
 $JTAG_INTFC -n 0 -s "0x00000000" -e "0x0000ffff" -i  "./RAM/ram0.bin" -c

Line No.	Rev	Author	Line
1	48	alirezamon	`#!/bin/bash`
2	38	alirezamon
3			`#JTAG_INTFC="$PRONOC_WORK/toolchain/bin/JTAG_INTFC"`
4			`source ./jtag_intfc.sh`
5
6			`$JTAG_INTFC -n 0 -s "0x00000000" -e "0x0000ffff" -i "./RAM/ram0.bin" -c`

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_c/] [jtag/] [test_rtl/] [jtag_ram_test/] [sw/] [write_memory.sh] - Blame information for rev 48