URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [__main.c] - Blame information for rev 48

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#ifndef _AEMB_MAIN_HH
#define  _AEMB_MAIN_HH
 
extern char __rodata_end, __data_start, __sdata_end;
 
extern int main ();
 
extern "C" int __main (void){ //initial_global_data
 
        char *src = &__rodata_end;  //start of Data section in Rom
        char *dst = &__data_start;
 
        /* ROM has data at end of rodata; copy it. */
        while (dst < &__sdata_end) {
                *dst++ = *src++;
        }
         main(); //call the main function
        return 0;
}
 
 
 
 
 
#endif

Line No.	Rev	Author	Line
1	48	alirezamon	`#ifndef _AEMB_MAIN_HH`
2			`#define _AEMB_MAIN_HH`
3
4			`extern char __rodata_end, __data_start, __sdata_end;`
5
6			`extern int main ();`
7
8			`extern "C" int __main (void){ //initial_global_data`
9
10			`char *src = &__rodata_end; //start of Data section in Rom`
11			`char *dst = &__data_start;`
12
13			`/* ROM has data at end of rodata; copy it. */`
14			`while (dst < &__sdata_end) {`
15			`dst++ = src++;`
16			`}`
17			`main(); //call the main function`
18			`return 0;`
19			`}`
20
21
22
23
24
25			`#endif`

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Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [sw/] [aemb/] [__main.c] - Blame information for rev 48