OpenCores
URL https://opencores.org/ocsvn/an-fpga-implementation-of-low-latency-noc-based-mpsoc/an-fpga-implementation-of-low-latency-noc-based-mpsoc/trunk

Subversion Repositories an-fpga-implementation-of-low-latency-noc-based-mpsoc

[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [aeMB/] [verilog/] [src/] [aeMB2_regs.v] - Blame information for rev 16

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 16 alirezamon
/* $Id: aeMB2_regs.v,v 1.4 2008-04-26 17:57:43 sybreon Exp $
2
**
3
** AEMB2 EDK 6.2 COMPATIBLE CORE
4
** Copyright (C) 2004-2008 Shawn Tan <shawn.tan@aeste.net>
5
**
6
** This file is part of AEMB.
7
**
8
** AEMB is free software: you can redistribute it and/or modify it
9
** under the terms of the GNU Lesser General Public License as
10
** published by the Free Software Foundation, either version 3 of the
11
** License, or (at your option) any later version.
12
**
13
** AEMB is distributed in the hope that it will be useful, but WITHOUT
14
** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15
** or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser General
16
** Public License for more details.
17
**
18
** You should have received a copy of the GNU Lesser General Public
19
** License along with AEMB. If not, see <http:**www.gnu.org/licenses/>.
20
*/
21
/**
22
 * Register File Wrapper
23
 * @file aeMB2_regs.v
24
 
25
 * A collection of general purpose and special function registers.
26
 
27
 */
28
 
29
// 200@207
30
`timescale  1ns/1ps
31
module aeMB2_regs (/*AUTOARG*/
32
   // Outputs
33
   opd_if, opb_if, opa_if,
34
   // Inputs
35
   xwb_mx, sfr_mx, sel_mx, rpc_mx, rd_of, rd_ex, mux_of, mux_ex,
36
   mul_mx, ich_dat, grst, gpha, gclk, dwb_mx, dena, bsf_mx, alu_mx
37
   );
38
 
39
   parameter AEMB_HTX = 1;
40
 
41
   /*AUTOOUTPUT*/
42
   // Beginning of automatic outputs (from unused autoinst outputs)
43
   output [31:0] opa_if;                 // From gprf0 of aeMB2_gprf.v
44
   output [31:0] opb_if;                 // From gprf0 of aeMB2_gprf.v
45
   output [31:0] opd_if;                 // From gprf0 of aeMB2_gprf.v
46
   // End of automatics
47
   /*AUTOINPUT*/
48
   // Beginning of automatic inputs (from unused autoinst inputs)
49
   input [31:0]          alu_mx;                 // To gprf0 of aeMB2_gprf.v
50
   input [31:0]          bsf_mx;                 // To gprf0 of aeMB2_gprf.v
51
   input                dena;                   // To gprf0 of aeMB2_gprf.v
52
   input [31:0]          dwb_mx;                 // To gprf0 of aeMB2_gprf.v
53
   input                gclk;                   // To gprf0 of aeMB2_gprf.v
54
   input                gpha;                   // To gprf0 of aeMB2_gprf.v
55
   input                grst;                   // To gprf0 of aeMB2_gprf.v
56
   input [31:0]          ich_dat;                // To gprf0 of aeMB2_gprf.v
57
   input [31:0]          mul_mx;                 // To gprf0 of aeMB2_gprf.v
58
   input [2:0]           mux_ex;                 // To gprf0 of aeMB2_gprf.v
59
   input [2:0]           mux_of;                 // To gprf0 of aeMB2_gprf.v
60
   input [4:0]           rd_ex;                  // To gprf0 of aeMB2_gprf.v
61
   input [4:0]           rd_of;                  // To gprf0 of aeMB2_gprf.v
62
   input [31:2]         rpc_mx;                 // To gprf0 of aeMB2_gprf.v
63
   input [3:0]           sel_mx;                 // To gprf0 of aeMB2_gprf.v
64
   input [31:0]          sfr_mx;                 // To gprf0 of aeMB2_gprf.v
65
   input [31:0]          xwb_mx;                 // To gprf0 of aeMB2_gprf.v
66
   // End of automatics
67
   /*AUTOWIRE*/
68
 
69
   // TODO: Add special function registers
70
 
71
   aeMB2_gprf
72
     #(/*AUTOINSTPARAM*/
73
       // Parameters
74
       .AEMB_HTX                        (AEMB_HTX))
75
   gprf0
76
     (/*AUTOINST*/
77
      // Outputs
78
      .opa_if                           (opa_if[31:0]),
79
      .opb_if                           (opb_if[31:0]),
80
      .opd_if                           (opd_if[31:0]),
81
      // Inputs
82
      .mux_of                           (mux_of[2:0]),
83
      .mux_ex                           (mux_ex[2:0]),
84
      .ich_dat                          (ich_dat[31:0]),
85
      .rd_of                            (rd_of[4:0]),
86
      .rd_ex                            (rd_ex[4:0]),
87
      .sel_mx                           (sel_mx[3:0]),
88
      .rpc_mx                           (rpc_mx[31:2]),
89
      .xwb_mx                           (xwb_mx[31:0]),
90
      .dwb_mx                           (dwb_mx[31:0]),
91
      .alu_mx                           (alu_mx[31:0]),
92
      .sfr_mx                           (sfr_mx[31:0]),
93
      .mul_mx                           (mul_mx[31:0]),
94
      .bsf_mx                           (bsf_mx[31:0]),
95
      .gclk                             (gclk),
96
      .grst                             (grst),
97
      .dena                             (dena),
98
      .gpha                             (gpha));
99
 
100
endmodule // aeMB2_regs
101
 
102
/*
103
 $Log: not supported by cvs2svn $
104
 Revision 1.3  2008/04/26 01:09:06  sybreon
105
 Passes basic tests. Minor documentation changes to make it compatible with iverilog pre-processor.
106
 
107
 Revision 1.2  2008/04/21 12:11:38  sybreon
108
 Passes arithmetic tests with single thread.
109
 
110
 Revision 1.1  2008/04/18 00:21:52  sybreon
111
 Initial import.
112
*/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.