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alirezamon |
`include "system_conf.v"
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`timescale 1 ns / 1 ps
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module lm32_monitor_ram (DataInA, DataInB, AddressA, AddressB, ClockA,
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ClockB, ClockEnA, ClockEnB, WrA, WrB, ResetA, ResetB, QA, QB);
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input [31:0] DataInA;
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input [31:0] DataInB;
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input [8:0] AddressA;
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input [8:0] AddressB;
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input ClockA;
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input ClockB;
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input ClockEnA;
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input ClockEnB;
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input WrA;
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input WrB;
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input ResetA;
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input ResetB;
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output [31:0] QA;
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output [31:0] QB;
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parameter lat_family = `LATTICE_FAMILY;
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generate
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if (lat_family == "EC" || lat_family == "ECP" || lat_family == "XP") begin
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/* Verilog netlist generated by SCUBA ispLever_v51_SP2_Build (10) */
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/* Module Version: 2.0 */
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/* c:\applications\ispTools5.1\ispfpga\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch ep5g00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr ENABLED -writemode NORMAL -resetmode ASYNC -memfile ../../source/jtag_rom_monitor/rom.mem -memformat hex */
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// synopsys translate_off
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defparam lm32_monitor_ram_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_17 = 320'h00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B;
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defparam lm32_monitor_ram_0_0_1.INITVAL_16 = 320'h1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB;
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defparam lm32_monitor_ram_0_0_1.INITVAL_15 = 320'h0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3;
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defparam lm32_monitor_ram_0_0_1.INITVAL_14 = 320'h00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019;
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defparam lm32_monitor_ram_0_0_1.INITVAL_13 = 320'h00035100180003510013000301001200030100110003010010000301000900030100080003010007;
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defparam lm32_monitor_ram_0_0_1.INITVAL_12 = 320'h010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004;
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defparam lm32_monitor_ram_0_0_1.INITVAL_11 = 320'h000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3;
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defparam lm32_monitor_ram_0_0_1.INITVAL_10 = 320'h10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0F = 320'h0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0E = 320'h100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0D = 320'h100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0C = 320'h10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0B = 320'h300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048;
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defparam lm32_monitor_ram_0_0_1.INITVAL_0A = 320'h10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008;
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defparam lm32_monitor_ram_0_0_1.INITVAL_09 = 320'h100040000000070200802000020090200002008C20000200883007C100743006C200681006400060;
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defparam lm32_monitor_ram_0_0_1.INITVAL_08 = 320'h3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020;
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defparam lm32_monitor_ram_0_0_1.INITVAL_07 = 320'h3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001;
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defparam lm32_monitor_ram_0_0_1.INITVAL_06 = 320'h100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068;
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defparam lm32_monitor_ram_0_0_1.INITVAL_05 = 320'h10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028;
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defparam lm32_monitor_ram_0_0_1.INITVAL_04 = 320'h10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_03 = 320'h000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_02 = 320'h000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_01 = 320'h0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000;
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defparam lm32_monitor_ram_0_0_1.INITVAL_00 = 320'h0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000;
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defparam lm32_monitor_ram_0_0_1.CSDECODE_B = "000";
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defparam lm32_monitor_ram_0_0_1.CSDECODE_A = "000";
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defparam lm32_monitor_ram_0_0_1.WRITEMODE_B = "NORMAL";
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defparam lm32_monitor_ram_0_0_1.WRITEMODE_A = "NORMAL";
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defparam lm32_monitor_ram_0_0_1.GSR = "ENABLED";
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defparam lm32_monitor_ram_0_0_1.RESETMODE = "ASYNC";
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defparam lm32_monitor_ram_0_0_1.REGMODE_B = "NOREG";
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defparam lm32_monitor_ram_0_0_1.REGMODE_A = "NOREG";
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defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_B = 18;
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defparam lm32_monitor_ram_0_0_1.DATA_WIDTH_A = 18;
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// synopsys translate_on
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DP8KA lm32_monitor_ram_0_0_1 (.CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA),
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.CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA),
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.CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),
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.CSB2(scuba_vlo), .RSTB(ResetB), .DIA0(DataInA[0]), .DIA1(DataInA[1]),
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.DIA2(DataInA[2]), .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]),
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.DIA6(DataInA[6]), .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]),
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.DIA10(DataInA[10]), .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]),
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.DIA14(DataInA[14]), .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]),
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.ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),
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.ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),
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.ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),
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.ADA12(AddressA[8]), .DIB0(DataInB[0]), .DIB1(DataInB[1]), .DIB2(DataInB[2]),
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.DIB3(DataInB[3]), .DIB4(DataInB[4]), .DIB5(DataInB[5]), .DIB6(DataInB[6]),
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.DIB7(DataInB[7]), .DIB8(DataInB[8]), .DIB9(DataInB[9]), .DIB10(DataInB[10]),
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.DIB11(DataInB[11]), .DIB12(DataInB[12]), .DIB13(DataInB[13]), .DIB14(DataInB[14]),
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.DIB15(DataInB[15]), .DIB16(DataInB[16]), .DIB17(DataInB[17]), .ADB0(scuba_vhi),
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.ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),
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.ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),
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.ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),
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.DOA0(QA[0]), .DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]), .DOA4(QA[4]),
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.DOA5(QA[5]), .DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]), .DOA9(QA[9]),
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.DOA10(QA[10]), .DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]),
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.DOA14(QA[14]), .DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]),
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.DOB0(QB[0]), .DOB1(QB[1]), .DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]),
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.DOB5(QB[5]), .DOB6(QB[6]), .DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]),
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.DOB10(QB[10]), .DOB11(QB[11]), .DOB12(QB[12]), .DOB13(QB[13]),
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.DOB14(QB[14]), .DOB15(QB[15]), .DOB16(QB[16]), .DOB17(QB[17]))
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/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_17="0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B" */
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/* synthesis INITVAL_16="0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB" */
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/* synthesis INITVAL_15="0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3" */
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/* synthesis INITVAL_14="0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019" */
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/* synthesis INITVAL_13="0x00035100180003510013000301001200030100110003010010000301000900030100080003010007" */
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/* synthesis INITVAL_12="0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004" */
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/* synthesis INITVAL_11="0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3" */
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/* synthesis INITVAL_10="0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF" */
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/* synthesis INITVAL_0F="0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008" */
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/* synthesis INITVAL_0E="0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008" */
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/* synthesis INITVAL_0D="0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002" */
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/* synthesis INITVAL_0C="0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090" */
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/* synthesis INITVAL_0B="0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048" */
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/* synthesis INITVAL_0A="0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008" */
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/* synthesis INITVAL_09="0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060" */
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/* synthesis INITVAL_08="0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020" */
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/* synthesis INITVAL_07="0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001" */
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/* synthesis INITVAL_06="0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068" */
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/* synthesis INITVAL_05="0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028" */
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/* synthesis INITVAL_04="0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000" */
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/* synthesis INITVAL_03="0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000" */
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/* synthesis INITVAL_02="0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000" */
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/* synthesis INITVAL_01="0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000" */
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/* synthesis INITVAL_00="0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000" */
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/* synthesis CSDECODE_B="000" */
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/* synthesis CSDECODE_A="000" */
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/* synthesis WRITEMODE_B="NORMAL" */
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/* synthesis WRITEMODE_A="NORMAL" */
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/* synthesis GSR="ENABLED" */
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/* synthesis RESETMODE="ASYNC" */
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/* synthesis REGMODE_B="NOREG" */
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/* synthesis REGMODE_A="NOREG" */
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/* synthesis DATA_WIDTH_B="18" */
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/* synthesis DATA_WIDTH_A="18" */;
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VHI scuba_vhi_inst (.Z(scuba_vhi));
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VLO scuba_vlo_inst (.Z(scuba_vlo));
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// synopsys translate_off
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defparam lm32_monitor_ram_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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153 |
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defparam lm32_monitor_ram_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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defparam lm32_monitor_ram_0_1_0.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000;
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156 |
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defparam lm32_monitor_ram_0_1_0.INITVAL_17 = 320'h0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF;
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defparam lm32_monitor_ram_0_1_0.INITVAL_16 = 320'h00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF;
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defparam lm32_monitor_ram_0_1_0.INITVAL_15 = 320'h00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363;
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defparam lm32_monitor_ram_0_1_0.INITVAL_14 = 320'h00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10;
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defparam lm32_monitor_ram_0_1_0.INITVAL_13 = 320'h0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08;
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defparam lm32_monitor_ram_0_1_0.INITVAL_12 = 320'h02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7;
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defparam lm32_monitor_ram_0_1_0.INITVAL_11 = 320'h00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708;
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defparam lm32_monitor_ram_0_1_0.INITVAL_10 = 320'h01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0F = 320'h024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0E = 320'h00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0D = 320'h00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0C = 320'h01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0B = 320'h0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4;
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defparam lm32_monitor_ram_0_1_0.INITVAL_0A = 320'h00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0;
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defparam lm32_monitor_ram_0_1_0.INITVAL_09 = 320'h00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6;
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defparam lm32_monitor_ram_0_1_0.INITVAL_08 = 320'h00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2;
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defparam lm32_monitor_ram_0_1_0.INITVAL_07 = 320'h00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008;
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defparam lm32_monitor_ram_0_1_0.INITVAL_06 = 320'h0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE;
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defparam lm32_monitor_ram_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA;
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defparam lm32_monitor_ram_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8;
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defparam lm32_monitor_ram_0_1_0.INITVAL_03 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600;
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defparam lm32_monitor_ram_0_1_0.INITVAL_02 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600;
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defparam lm32_monitor_ram_0_1_0.INITVAL_01 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600;
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defparam lm32_monitor_ram_0_1_0.INITVAL_00 = 320'h00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600;
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defparam lm32_monitor_ram_0_1_0.CSDECODE_B = "000";
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defparam lm32_monitor_ram_0_1_0.CSDECODE_A = "000";
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defparam lm32_monitor_ram_0_1_0.WRITEMODE_B = "NORMAL";
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defparam lm32_monitor_ram_0_1_0.WRITEMODE_A = "NORMAL";
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defparam lm32_monitor_ram_0_1_0.GSR = "ENABLED";
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defparam lm32_monitor_ram_0_1_0.RESETMODE = "ASYNC";
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defparam lm32_monitor_ram_0_1_0.REGMODE_B = "NOREG";
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defparam lm32_monitor_ram_0_1_0.REGMODE_A = "NOREG";
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defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_B = 18;
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defparam lm32_monitor_ram_0_1_0.DATA_WIDTH_A = 18;
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// synopsys translate_on
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DP8KA lm32_monitor_ram_0_1_0 (.CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA),
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192 |
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.CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA),
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193 |
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.CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo),
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194 |
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.CSB2(scuba_vlo), .RSTB(ResetB), .DIA0(DataInA[18]), .DIA1(DataInA[19]),
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195 |
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.DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),
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196 |
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.DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),
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197 |
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.DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),
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198 |
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.DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),
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199 |
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.ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),
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.ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),
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201 |
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.ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),
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202 |
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.ADA12(AddressA[8]), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),
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203 |
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.DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),
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204 |
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.DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),
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.DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),
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206 |
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.DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),
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207 |
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.ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),
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208 |
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.ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),
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.ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),
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210 |
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.DOA0(QA[18]), .DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]),
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211 |
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.DOA5(QA[23]), .DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]),
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212 |
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.DOA10(QA[28]), .DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]),
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213 |
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.DOA14(), .DOA15(), .DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]),
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214 |
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.DOB2(QB[20]), .DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]),
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215 |
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.DOB7(QB[25]), .DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]),
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216 |
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.DOB12(QB[30]), .DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())
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217 |
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/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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218 |
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/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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219 |
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/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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220 |
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/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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222 |
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/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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224 |
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/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
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225 |
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/* synthesis INITVAL_17="0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF" */
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226 |
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/* synthesis INITVAL_16="0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF" */
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227 |
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/* synthesis INITVAL_15="0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363" */
|
228 |
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/* synthesis INITVAL_14="0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10" */
|
229 |
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/* synthesis INITVAL_13="0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08" */
|
230 |
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/* synthesis INITVAL_12="0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7" */
|
231 |
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/* synthesis INITVAL_11="0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708" */
|
232 |
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/* synthesis INITVAL_10="0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708" */
|
233 |
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/* synthesis INITVAL_0F="0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7" */
|
234 |
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/* synthesis INITVAL_0E="0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0" */
|
235 |
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/* synthesis INITVAL_0D="0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108" */
|
236 |
|
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/* synthesis INITVAL_0C="0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7" */
|
237 |
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/* synthesis INITVAL_0B="0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4" */
|
238 |
|
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/* synthesis INITVAL_0A="0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0" */
|
239 |
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/* synthesis INITVAL_09="0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6" */
|
240 |
|
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/* synthesis INITVAL_08="0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2" */
|
241 |
|
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/* synthesis INITVAL_07="0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008" */
|
242 |
|
|
/* synthesis INITVAL_06="0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE" */
|
243 |
|
|
/* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */
|
244 |
|
|
/* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */
|
245 |
|
|
/* synthesis INITVAL_03="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
246 |
|
|
/* synthesis INITVAL_02="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
247 |
|
|
/* synthesis INITVAL_01="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
248 |
|
|
/* synthesis INITVAL_00="0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600" */
|
249 |
|
|
/* synthesis CSDECODE_B="000" */
|
250 |
|
|
/* synthesis CSDECODE_A="000" */
|
251 |
|
|
/* synthesis WRITEMODE_B="NORMAL" */
|
252 |
|
|
/* synthesis WRITEMODE_A="NORMAL" */
|
253 |
|
|
/* synthesis GSR="ENABLED" */
|
254 |
|
|
/* synthesis RESETMODE="ASYNC" */
|
255 |
|
|
/* synthesis REGMODE_B="NOREG" */
|
256 |
|
|
/* synthesis REGMODE_A="NOREG" */
|
257 |
|
|
/* synthesis DATA_WIDTH_B="18" */
|
258 |
|
|
/* synthesis DATA_WIDTH_A="18" */;
|
259 |
|
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|
260 |
|
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|
261 |
|
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|
262 |
|
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// exemplar begin
|
263 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
264 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
265 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
266 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
267 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
268 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
269 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
270 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
271 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_17 0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B
|
272 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_16 0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB
|
273 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_15 0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3
|
274 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_14 0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019
|
275 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_13 0x00035100180003510013000301001200030100110003010010000301000900030100080003010007
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276 |
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|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_12 0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004
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277 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_11 0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3
|
278 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_10 0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF
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279 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0F 0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008
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280 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0E 0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008
|
281 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0D 0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002
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282 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0C 0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090
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283 |
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|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0B 0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048
|
284 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_0A 0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008
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285 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_09 0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060
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286 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_08 0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020
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287 |
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_07 0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001
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288 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_06 0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068
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289 |
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|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_05 0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028
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290 |
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// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_04 0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000
|
291 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_03 0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000
|
292 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_02 0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000
|
293 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_01 0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000
|
294 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 INITVAL_00 0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000
|
295 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 CSDECODE_B 000
|
296 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 CSDECODE_A 000
|
297 |
|
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// exemplar attribute lm32_monitor_ram_0_0_1 WRITEMODE_B NORMAL
|
298 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 WRITEMODE_A NORMAL
|
299 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 GSR ENABLED
|
300 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 RESETMODE ASYNC
|
301 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 REGMODE_B NOREG
|
302 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 REGMODE_A NOREG
|
303 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 DATA_WIDTH_B 18
|
304 |
|
|
// exemplar attribute lm32_monitor_ram_0_0_1 DATA_WIDTH_A 18
|
305 |
|
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// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
306 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
307 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
308 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
309 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
310 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
311 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
312 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
313 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_17 0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF
|
314 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_16 0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF
|
315 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_15 0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363
|
316 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_14 0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10
|
317 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_13 0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08
|
318 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_12 0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7
|
319 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_11 0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708
|
320 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_10 0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708
|
321 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0F 0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7
|
322 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0E 0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0
|
323 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0D 0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108
|
324 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0C 0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7
|
325 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0B 0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4
|
326 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_0A 0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0
|
327 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_09 0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6
|
328 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_08 0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2
|
329 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_07 0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008
|
330 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_06 0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE
|
331 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA
|
332 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8
|
333 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_03 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
334 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_02 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
335 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_01 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
336 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 INITVAL_00 0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600
|
337 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 CSDECODE_B 000
|
338 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 CSDECODE_A 000
|
339 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 WRITEMODE_B NORMAL
|
340 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 WRITEMODE_A NORMAL
|
341 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 GSR ENABLED
|
342 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 RESETMODE ASYNC
|
343 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 REGMODE_B NOREG
|
344 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 REGMODE_A NOREG
|
345 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 DATA_WIDTH_B 18
|
346 |
|
|
// exemplar attribute lm32_monitor_ram_0_1_0 DATA_WIDTH_A 18
|
347 |
|
|
// exemplar end
|
348 |
|
|
end else if (lat_family == "ECP2" || lat_family == "ECP2M") begin
|
349 |
|
|
/* Verilog netlist generated by SCUBA ispLever_v60_PROD_Build (36) */
|
350 |
|
|
/* Module Version: 3.0 */
|
351 |
|
|
/* c:\ispTOOLS6_0\ispFPGA\bin\nt\scuba.exe -w -lang verilog -synth synplify -bus_exp 7 -bb -arch ep5a00 -type bram -wp 11 -rp 1010 -addr_width 9 -data_width 32 -num_rows 512 -gsr ENABLED -writemode NORMAL -resetmode ASYNC -memfile ./rom.mem -memformat hex -e -n lm32_monitor_ram_ecp2 */
|
352 |
|
|
// synopsys translate_off
|
353 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
354 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
355 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
356 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
357 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
358 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
359 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
360 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
361 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
362 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
363 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
364 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
365 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
366 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
367 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
368 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
369 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
370 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
371 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
372 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
373 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
374 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
375 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
376 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
377 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
378 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
379 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
380 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
381 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
382 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
383 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
384 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
385 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
386 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
387 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
388 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
389 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
390 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
391 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
392 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
393 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_17 = 320'h00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B ;
|
394 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_16 = 320'h1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB ;
|
395 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_15 = 320'h0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3 ;
|
396 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_14 = 320'h00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019 ;
|
397 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_13 = 320'h00035100180003510013000301001200030100110003010010000301000900030100080003010007 ;
|
398 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_12 = 320'h010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004 ;
|
399 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_11 = 320'h000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3 ;
|
400 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_10 = 320'h10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF ;
|
401 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0F = 320'h0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008 ;
|
402 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0E = 320'h100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008 ;
|
403 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0D = 320'h100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002 ;
|
404 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0C = 320'h10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090 ;
|
405 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0B = 320'h300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048 ;
|
406 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_0A = 320'h10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008 ;
|
407 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_09 = 320'h100040000000070200802000020090200002008C20000200883007C100743006C200681006400060 ;
|
408 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_08 = 320'h3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020 ;
|
409 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_07 = 320'h3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001 ;
|
410 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_06 = 320'h100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068 ;
|
411 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_05 = 320'h10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028 ;
|
412 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_04 = 320'h10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000 ;
|
413 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_03 = 320'h000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000 ;
|
414 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_02 = 320'h000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000 ;
|
415 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_01 = 320'h0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000 ;
|
416 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.INITVAL_00 = 320'h0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000 ;
|
417 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.CSDECODE_B = 3'b000 ;
|
418 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.CSDECODE_A = 3'b000 ;
|
419 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.WRITEMODE_B = "NORMAL" ;
|
420 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.WRITEMODE_A = "NORMAL" ;
|
421 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.GSR = "ENABLED" ;
|
422 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.RESETMODE = "ASYNC" ;
|
423 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.REGMODE_B = "NOREG" ;
|
424 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.REGMODE_A = "NOREG" ;
|
425 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.DATA_WIDTH_B = 18 ;
|
426 |
|
|
defparam lm32_monitor_ram_ecp2_0_0_1.DATA_WIDTH_A = 18 ;
|
427 |
|
|
// synopsys translate_on
|
428 |
|
|
DP16KB lm32_monitor_ram_ecp2_0_0_1 (.DIA0(DataInA[0]), .DIA1(DataInA[1]),
|
429 |
|
|
.DIA2(DataInA[2]), .DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]),
|
430 |
|
|
.DIA6(DataInA[6]), .DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]),
|
431 |
|
|
.DIA10(DataInA[10]), .DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]),
|
432 |
|
|
.DIA14(DataInA[14]), .DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]),
|
433 |
|
|
.ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),
|
434 |
|
|
.ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),
|
435 |
|
|
.ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),
|
436 |
|
|
.ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),
|
437 |
|
|
.WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),
|
438 |
|
|
.RSTA(ResetA), .DIB0(DataInB[0]), .DIB1(DataInB[1]), .DIB2(DataInB[2]),
|
439 |
|
|
.DIB3(DataInB[3]), .DIB4(DataInB[4]), .DIB5(DataInB[5]), .DIB6(DataInB[6]),
|
440 |
|
|
.DIB7(DataInB[7]), .DIB8(DataInB[8]), .DIB9(DataInB[9]), .DIB10(DataInB[10]),
|
441 |
|
|
.DIB11(DataInB[11]), .DIB12(DataInB[12]), .DIB13(DataInB[13]), .DIB14(DataInB[14]),
|
442 |
|
|
.DIB15(DataInB[15]), .DIB16(DataInB[16]), .DIB17(DataInB[17]), .ADB0(scuba_vhi),
|
443 |
|
|
.ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),
|
444 |
|
|
.ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),
|
445 |
|
|
.ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),
|
446 |
|
|
.ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),
|
447 |
|
|
.CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[0]),
|
448 |
|
|
.DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]), .DOA4(QA[4]), .DOA5(QA[5]),
|
449 |
|
|
.DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]), .DOA9(QA[9]), .DOA10(QA[10]),
|
450 |
|
|
.DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]), .DOA14(QA[14]),
|
451 |
|
|
.DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]), .DOB0(QB[0]), .DOB1(QB[1]),
|
452 |
|
|
.DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]), .DOB5(QB[5]), .DOB6(QB[6]),
|
453 |
|
|
.DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]), .DOB10(QB[10]), .DOB11(QB[11]),
|
454 |
|
|
.DOB12(QB[12]), .DOB13(QB[13]), .DOB14(QB[14]), .DOB15(QB[15]),
|
455 |
|
|
.DOB16(QB[16]), .DOB17(QB[17]))
|
456 |
|
|
/* synthesis MEM_LPC_FILE="lm32_monitor_ram_ecp2.lpc" */
|
457 |
|
|
/* synthesis MEM_INIT_FILE="rom.mem" */
|
458 |
|
|
/* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
459 |
|
|
/* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
460 |
|
|
/* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
461 |
|
|
/* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
462 |
|
|
/* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
463 |
|
|
/* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
464 |
|
|
/* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
465 |
|
|
/* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
466 |
|
|
/* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
467 |
|
|
/* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
468 |
|
|
/* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
469 |
|
|
/* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
470 |
|
|
/* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
471 |
|
|
/* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
472 |
|
|
/* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
473 |
|
|
/* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
474 |
|
|
/* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
475 |
|
|
/* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
476 |
|
|
/* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
477 |
|
|
/* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
478 |
|
|
/* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
479 |
|
|
/* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
480 |
|
|
/* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
481 |
|
|
/* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
482 |
|
|
/* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
483 |
|
|
/* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
484 |
|
|
/* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
485 |
|
|
/* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
486 |
|
|
/* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
487 |
|
|
/* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
488 |
|
|
/* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
489 |
|
|
/* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
490 |
|
|
/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
491 |
|
|
/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
492 |
|
|
/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
493 |
|
|
/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
494 |
|
|
/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
495 |
|
|
/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
496 |
|
|
/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
497 |
|
|
/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
498 |
|
|
/* synthesis INITVAL_17="0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B" */
|
499 |
|
|
/* synthesis INITVAL_16="0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB" */
|
500 |
|
|
/* synthesis INITVAL_15="0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3" */
|
501 |
|
|
/* synthesis INITVAL_14="0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019" */
|
502 |
|
|
/* synthesis INITVAL_13="0x00035100180003510013000301001200030100110003010010000301000900030100080003010007" */
|
503 |
|
|
/* synthesis INITVAL_12="0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004" */
|
504 |
|
|
/* synthesis INITVAL_11="0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3" */
|
505 |
|
|
/* synthesis INITVAL_10="0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF" */
|
506 |
|
|
/* synthesis INITVAL_0F="0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008" */
|
507 |
|
|
/* synthesis INITVAL_0E="0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008" */
|
508 |
|
|
/* synthesis INITVAL_0D="0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002" */
|
509 |
|
|
/* synthesis INITVAL_0C="0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090" */
|
510 |
|
|
/* synthesis INITVAL_0B="0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048" */
|
511 |
|
|
/* synthesis INITVAL_0A="0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008" */
|
512 |
|
|
/* synthesis INITVAL_09="0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060" */
|
513 |
|
|
/* synthesis INITVAL_08="0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020" */
|
514 |
|
|
/* synthesis INITVAL_07="0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001" */
|
515 |
|
|
/* synthesis INITVAL_06="0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068" */
|
516 |
|
|
/* synthesis INITVAL_05="0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028" */
|
517 |
|
|
/* synthesis INITVAL_04="0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000" */
|
518 |
|
|
/* synthesis INITVAL_03="0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000" */
|
519 |
|
|
/* synthesis INITVAL_02="0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000" */
|
520 |
|
|
/* synthesis INITVAL_01="0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000" */
|
521 |
|
|
/* synthesis INITVAL_00="0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000" */
|
522 |
|
|
/* synthesis CSDECODE_B="0b000" */
|
523 |
|
|
/* synthesis CSDECODE_A="0b000" */
|
524 |
|
|
/* synthesis WRITEMODE_B="NORMAL" */
|
525 |
|
|
/* synthesis WRITEMODE_A="NORMAL" */
|
526 |
|
|
/* synthesis GSR="ENABLED" */
|
527 |
|
|
/* synthesis RESETMODE="ASYNC" */
|
528 |
|
|
/* synthesis REGMODE_B="NOREG" */
|
529 |
|
|
/* synthesis REGMODE_A="NOREG" */
|
530 |
|
|
/* synthesis DATA_WIDTH_B="18" */
|
531 |
|
|
/* synthesis DATA_WIDTH_A="18" */;
|
532 |
|
|
|
533 |
|
|
VHI scuba_vhi_inst (.Z(scuba_vhi));
|
534 |
|
|
|
535 |
|
|
VLO scuba_vlo_inst (.Z(scuba_vlo));
|
536 |
|
|
|
537 |
|
|
// synopsys translate_off
|
538 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
539 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
540 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
541 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
542 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
543 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
544 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
545 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
546 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
547 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
548 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
549 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
550 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
551 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
552 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
553 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
554 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
555 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
556 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
557 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
558 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
559 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
560 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
561 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
562 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
563 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
564 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
565 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
566 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
567 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
568 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
569 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
570 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
571 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
572 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
573 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
574 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
575 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
576 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
577 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
578 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_17 = 320'h0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF ;
|
579 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_16 = 320'h00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF ;
|
580 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_15 = 320'h00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363 ;
|
581 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_14 = 320'h00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10 ;
|
582 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_13 = 320'h0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08 ;
|
583 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_12 = 320'h02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7 ;
|
584 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_11 = 320'h00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708 ;
|
585 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_10 = 320'h01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708 ;
|
586 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0F = 320'h024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7 ;
|
587 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0E = 320'h00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0 ;
|
588 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0D = 320'h00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108 ;
|
589 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0C = 320'h01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7 ;
|
590 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0B = 320'h0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4 ;
|
591 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_0A = 320'h00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0 ;
|
592 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_09 = 320'h00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6 ;
|
593 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_08 = 320'h00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2 ;
|
594 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_07 = 320'h00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008 ;
|
595 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_06 = 320'h0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE ;
|
596 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA ;
|
597 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8 ;
|
598 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_03 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
599 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_02 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
600 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_01 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
601 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.INITVAL_00 = 320'h00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600 ;
|
602 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.CSDECODE_B = 3'b000 ;
|
603 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.CSDECODE_A = 3'b000 ;
|
604 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.WRITEMODE_B = "NORMAL" ;
|
605 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.WRITEMODE_A = "NORMAL" ;
|
606 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.GSR = "ENABLED" ;
|
607 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.RESETMODE = "ASYNC" ;
|
608 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.REGMODE_B = "NOREG" ;
|
609 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.REGMODE_A = "NOREG" ;
|
610 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.DATA_WIDTH_B = 18 ;
|
611 |
|
|
defparam lm32_monitor_ram_ecp2_0_1_0.DATA_WIDTH_A = 18 ;
|
612 |
|
|
// synopsys translate_on
|
613 |
|
|
DP16KB lm32_monitor_ram_ecp2_0_1_0 (.DIA0(DataInA[18]), .DIA1(DataInA[19]),
|
614 |
|
|
.DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),
|
615 |
|
|
.DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),
|
616 |
|
|
.DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),
|
617 |
|
|
.DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),
|
618 |
|
|
.ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),
|
619 |
|
|
.ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),
|
620 |
|
|
.ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),
|
621 |
|
|
.ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),
|
622 |
|
|
.WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),
|
623 |
|
|
.RSTA(ResetA), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),
|
624 |
|
|
.DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),
|
625 |
|
|
.DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),
|
626 |
|
|
.DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),
|
627 |
|
|
.DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),
|
628 |
|
|
.ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),
|
629 |
|
|
.ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),
|
630 |
|
|
.ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),
|
631 |
|
|
.ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),
|
632 |
|
|
.CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[18]),
|
633 |
|
|
.DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]), .DOA5(QA[23]),
|
634 |
|
|
.DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]), .DOA10(QA[28]),
|
635 |
|
|
.DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]), .DOA14(), .DOA15(),
|
636 |
|
|
.DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]), .DOB2(QB[20]),
|
637 |
|
|
.DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]), .DOB7(QB[25]),
|
638 |
|
|
.DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]), .DOB12(QB[30]),
|
639 |
|
|
.DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())
|
640 |
|
|
/* synthesis MEM_LPC_FILE="lm32_monitor_ram_ecp2.lpc" */
|
641 |
|
|
/* synthesis MEM_INIT_FILE="rom.mem" */
|
642 |
|
|
/* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
643 |
|
|
/* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
644 |
|
|
/* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
645 |
|
|
/* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
646 |
|
|
/* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
647 |
|
|
/* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
648 |
|
|
/* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
649 |
|
|
/* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
650 |
|
|
/* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
651 |
|
|
/* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
652 |
|
|
/* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
653 |
|
|
/* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
654 |
|
|
/* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
655 |
|
|
/* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
656 |
|
|
/* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
657 |
|
|
/* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
658 |
|
|
/* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
659 |
|
|
/* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
660 |
|
|
/* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
661 |
|
|
/* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
662 |
|
|
/* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
663 |
|
|
/* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
664 |
|
|
/* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
665 |
|
|
/* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
666 |
|
|
/* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
667 |
|
|
/* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
668 |
|
|
/* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
669 |
|
|
/* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
670 |
|
|
/* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
671 |
|
|
/* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
672 |
|
|
/* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
673 |
|
|
/* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
674 |
|
|
/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
675 |
|
|
/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
676 |
|
|
/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
677 |
|
|
/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
678 |
|
|
/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
679 |
|
|
/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
680 |
|
|
/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
681 |
|
|
/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
682 |
|
|
/* synthesis INITVAL_17="0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF" */
|
683 |
|
|
/* synthesis INITVAL_16="0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF" */
|
684 |
|
|
/* synthesis INITVAL_15="0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363" */
|
685 |
|
|
/* synthesis INITVAL_14="0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10" */
|
686 |
|
|
/* synthesis INITVAL_13="0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08" */
|
687 |
|
|
/* synthesis INITVAL_12="0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7" */
|
688 |
|
|
/* synthesis INITVAL_11="0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708" */
|
689 |
|
|
/* synthesis INITVAL_10="0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708" */
|
690 |
|
|
/* synthesis INITVAL_0F="0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7" */
|
691 |
|
|
/* synthesis INITVAL_0E="0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0" */
|
692 |
|
|
/* synthesis INITVAL_0D="0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108" */
|
693 |
|
|
/* synthesis INITVAL_0C="0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7" */
|
694 |
|
|
/* synthesis INITVAL_0B="0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4" */
|
695 |
|
|
/* synthesis INITVAL_0A="0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0" */
|
696 |
|
|
/* synthesis INITVAL_09="0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6" */
|
697 |
|
|
/* synthesis INITVAL_08="0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2" */
|
698 |
|
|
/* synthesis INITVAL_07="0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008" */
|
699 |
|
|
/* synthesis INITVAL_06="0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE" */
|
700 |
|
|
/* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */
|
701 |
|
|
/* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */
|
702 |
|
|
/* synthesis INITVAL_03="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
703 |
|
|
/* synthesis INITVAL_02="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
704 |
|
|
/* synthesis INITVAL_01="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
705 |
|
|
/* synthesis INITVAL_00="0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600" */
|
706 |
|
|
/* synthesis CSDECODE_B="0b000" */
|
707 |
|
|
/* synthesis CSDECODE_A="0b000" */
|
708 |
|
|
/* synthesis WRITEMODE_B="NORMAL" */
|
709 |
|
|
/* synthesis WRITEMODE_A="NORMAL" */
|
710 |
|
|
/* synthesis GSR="ENABLED" */
|
711 |
|
|
/* synthesis RESETMODE="ASYNC" */
|
712 |
|
|
/* synthesis REGMODE_B="NOREG" */
|
713 |
|
|
/* synthesis REGMODE_A="NOREG" */
|
714 |
|
|
/* synthesis DATA_WIDTH_B="18" */
|
715 |
|
|
/* synthesis DATA_WIDTH_A="18" */;
|
716 |
|
|
|
717 |
|
|
|
718 |
|
|
|
719 |
|
|
// exemplar begin
|
720 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 MEM_LPC_FILE lm32_monitor_ram_ecp2.lpc
|
721 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 MEM_INIT_FILE rom.mem
|
722 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
723 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
724 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
725 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
726 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
727 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
728 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
729 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
730 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
731 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
732 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
733 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
734 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
735 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
736 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
737 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
738 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
739 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
740 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
741 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
742 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
743 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
744 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
745 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
746 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
747 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
748 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
749 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
750 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
751 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
752 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
753 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
754 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
755 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
756 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
757 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
758 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
759 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
760 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
761 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
762 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_17 0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B
|
763 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_16 0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB
|
764 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_15 0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3
|
765 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_14 0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019
|
766 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_13 0x00035100180003510013000301001200030100110003010010000301000900030100080003010007
|
767 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_12 0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004
|
768 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_11 0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3
|
769 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_10 0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF
|
770 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0F 0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008
|
771 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0E 0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008
|
772 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0D 0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002
|
773 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0C 0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090
|
774 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0B 0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048
|
775 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_0A 0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008
|
776 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_09 0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060
|
777 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_08 0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020
|
778 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_07 0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001
|
779 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_06 0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068
|
780 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_05 0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028
|
781 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_04 0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000
|
782 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_03 0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000
|
783 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_02 0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000
|
784 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_01 0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000
|
785 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 INITVAL_00 0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000
|
786 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 CSDECODE_B 0b000
|
787 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 CSDECODE_A 0b000
|
788 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 WRITEMODE_B NORMAL
|
789 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 WRITEMODE_A NORMAL
|
790 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 GSR ENABLED
|
791 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 RESETMODE ASYNC
|
792 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 REGMODE_B NOREG
|
793 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 REGMODE_A NOREG
|
794 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 DATA_WIDTH_B 18
|
795 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_0_1 DATA_WIDTH_A 18
|
796 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 MEM_LPC_FILE lm32_monitor_ram_ecp2.lpc
|
797 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 MEM_INIT_FILE rom.mem
|
798 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
799 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
800 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
801 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
802 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
803 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
804 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
805 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
806 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
807 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
808 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
809 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
810 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
811 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
812 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
813 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
814 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
815 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
816 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
817 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
818 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
819 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
820 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
821 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
822 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
823 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
824 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
825 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
826 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
827 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
828 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
829 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
830 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
831 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
832 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
833 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
834 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
835 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
836 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
837 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
838 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_17 0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF
|
839 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_16 0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF
|
840 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_15 0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363
|
841 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_14 0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10
|
842 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_13 0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08
|
843 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_12 0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7
|
844 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_11 0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708
|
845 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_10 0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708
|
846 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0F 0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7
|
847 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0E 0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0
|
848 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0D 0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108
|
849 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0C 0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7
|
850 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0B 0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4
|
851 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_0A 0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0
|
852 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_09 0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6
|
853 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_08 0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2
|
854 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_07 0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008
|
855 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_06 0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE
|
856 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA
|
857 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8
|
858 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_03 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
859 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_02 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
860 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_01 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
861 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 INITVAL_00 0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600
|
862 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 CSDECODE_B 0b000
|
863 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 CSDECODE_A 0b000
|
864 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 WRITEMODE_B NORMAL
|
865 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 WRITEMODE_A NORMAL
|
866 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 GSR ENABLED
|
867 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 RESETMODE ASYNC
|
868 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 REGMODE_B NOREG
|
869 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 REGMODE_A NOREG
|
870 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 DATA_WIDTH_B 18
|
871 |
|
|
// exemplar attribute lm32_monitor_ram_ecp2_0_1_0 DATA_WIDTH_A 18
|
872 |
|
|
// exemplar end
|
873 |
|
|
end else if (lat_family == "SC" || lat_family == "SCM") begin
|
874 |
|
|
// synopsys translate_off
|
875 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
876 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
877 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
878 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
879 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
880 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
881 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
882 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
883 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
884 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
885 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
886 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
887 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
888 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
889 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
890 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
891 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
892 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
893 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
894 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
895 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
896 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
897 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
898 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
899 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
900 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
901 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
902 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
903 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
904 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
905 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
906 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
907 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
908 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
909 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
910 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
911 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
912 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
913 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
914 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
915 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_17 = 320'h00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B ;
|
916 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_16 = 320'h1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB ;
|
917 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_15 = 320'h0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3 ;
|
918 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_14 = 320'h00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019 ;
|
919 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_13 = 320'h00035100180003510013000301001200030100110003010010000301000900030100080003010007 ;
|
920 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_12 = 320'h010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004 ;
|
921 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_11 = 320'h000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3 ;
|
922 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_10 = 320'h10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF ;
|
923 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0F = 320'h0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008 ;
|
924 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0E = 320'h100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008 ;
|
925 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0D = 320'h100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002 ;
|
926 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0C = 320'h10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090 ;
|
927 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0B = 320'h300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048 ;
|
928 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_0A = 320'h10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008 ;
|
929 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_09 = 320'h100040000000070200802000020090200002008C20000200883007C100743006C200681006400060 ;
|
930 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_08 = 320'h3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020 ;
|
931 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_07 = 320'h3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001 ;
|
932 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_06 = 320'h100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068 ;
|
933 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_05 = 320'h10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028 ;
|
934 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_04 = 320'h10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000 ;
|
935 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_03 = 320'h000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000 ;
|
936 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_02 = 320'h000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000 ;
|
937 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_01 = 320'h0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000 ;
|
938 |
|
|
defparam sc_rom_monitor_0_0_1.INITVAL_00 = 320'h0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000 ;
|
939 |
|
|
defparam sc_rom_monitor_0_0_1.CSDECODE_B = 3'b000 ;
|
940 |
|
|
defparam sc_rom_monitor_0_0_1.CSDECODE_A = 3'b000 ;
|
941 |
|
|
defparam sc_rom_monitor_0_0_1.WRITEMODE_B = "NORMAL" ;
|
942 |
|
|
defparam sc_rom_monitor_0_0_1.WRITEMODE_A = "NORMAL" ;
|
943 |
|
|
defparam sc_rom_monitor_0_0_1.GSR = "ENABLED" ;
|
944 |
|
|
defparam sc_rom_monitor_0_0_1.RESETMODE = "ASYNC" ;
|
945 |
|
|
defparam sc_rom_monitor_0_0_1.REGMODE_B = "NOREG" ;
|
946 |
|
|
defparam sc_rom_monitor_0_0_1.REGMODE_A = "NOREG" ;
|
947 |
|
|
defparam sc_rom_monitor_0_0_1.DATA_WIDTH_B = 18 ;
|
948 |
|
|
defparam sc_rom_monitor_0_0_1.DATA_WIDTH_A = 18 ;
|
949 |
|
|
// synopsys translate_on
|
950 |
|
|
DP16KA sc_rom_monitor_0_0_1 (.DIA0(DataInA[0]), .DIA1(DataInA[1]), .DIA2(DataInA[2]),
|
951 |
|
|
.DIA3(DataInA[3]), .DIA4(DataInA[4]), .DIA5(DataInA[5]), .DIA6(DataInA[6]),
|
952 |
|
|
.DIA7(DataInA[7]), .DIA8(DataInA[8]), .DIA9(DataInA[9]), .DIA10(DataInA[10]),
|
953 |
|
|
.DIA11(DataInA[11]), .DIA12(DataInA[12]), .DIA13(DataInA[13]), .DIA14(DataInA[14]),
|
954 |
|
|
.DIA15(DataInA[15]), .DIA16(DataInA[16]), .DIA17(DataInA[17]), .ADA0(scuba_vhi),
|
955 |
|
|
.ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo), .ADA4(AddressA[0]),
|
956 |
|
|
.ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]), .ADA8(AddressA[4]),
|
957 |
|
|
.ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]), .ADA12(AddressA[8]),
|
958 |
|
|
.ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA), .WEA(WrA), .CSA0(scuba_vlo),
|
959 |
|
|
.CSA1(scuba_vlo), .CSA2(scuba_vlo), .RSTA(ResetA), .DIB0(DataInB[0]),
|
960 |
|
|
.DIB1(DataInB[1]), .DIB2(DataInB[2]), .DIB3(DataInB[3]), .DIB4(DataInB[4]),
|
961 |
|
|
.DIB5(DataInB[5]), .DIB6(DataInB[6]), .DIB7(DataInB[7]), .DIB8(DataInB[8]),
|
962 |
|
|
.DIB9(DataInB[9]), .DIB10(DataInB[10]), .DIB11(DataInB[11]), .DIB12(DataInB[12]),
|
963 |
|
|
.DIB13(DataInB[13]), .DIB14(DataInB[14]), .DIB15(DataInB[15]), .DIB16(DataInB[16]),
|
964 |
|
|
.DIB17(DataInB[17]), .ADB0(scuba_vhi), .ADB1(scuba_vhi), .ADB2(scuba_vlo),
|
965 |
|
|
.ADB3(scuba_vlo), .ADB4(AddressB[0]), .ADB5(AddressB[1]), .ADB6(AddressB[2]),
|
966 |
|
|
.ADB7(AddressB[3]), .ADB8(AddressB[4]), .ADB9(AddressB[5]), .ADB10(AddressB[6]),
|
967 |
|
|
.ADB11(AddressB[7]), .ADB12(AddressB[8]), .ADB13(scuba_vlo), .CEB(ClockEnB),
|
968 |
|
|
.CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo), .CSB1(scuba_vlo), .CSB2(scuba_vlo),
|
969 |
|
|
.RSTB(ResetB), .DOA0(QA[0]), .DOA1(QA[1]), .DOA2(QA[2]), .DOA3(QA[3]),
|
970 |
|
|
.DOA4(QA[4]), .DOA5(QA[5]), .DOA6(QA[6]), .DOA7(QA[7]), .DOA8(QA[8]),
|
971 |
|
|
.DOA9(QA[9]), .DOA10(QA[10]), .DOA11(QA[11]), .DOA12(QA[12]), .DOA13(QA[13]),
|
972 |
|
|
.DOA14(QA[14]), .DOA15(QA[15]), .DOA16(QA[16]), .DOA17(QA[17]),
|
973 |
|
|
.DOB0(QB[0]), .DOB1(QB[1]), .DOB2(QB[2]), .DOB3(QB[3]), .DOB4(QB[4]),
|
974 |
|
|
.DOB5(QB[5]), .DOB6(QB[6]), .DOB7(QB[7]), .DOB8(QB[8]), .DOB9(QB[9]),
|
975 |
|
|
.DOB10(QB[10]), .DOB11(QB[11]), .DOB12(QB[12]), .DOB13(QB[13]),
|
976 |
|
|
.DOB14(QB[14]), .DOB15(QB[15]), .DOB16(QB[16]), .DOB17(QB[17]))
|
977 |
|
|
/* synthesis MEM_LPC_FILE="sc_rom_monitor.lpc" */
|
978 |
|
|
/* synthesis MEM_INIT_FILE="rom.mem" */
|
979 |
|
|
/* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
980 |
|
|
/* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
981 |
|
|
/* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
982 |
|
|
/* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
983 |
|
|
/* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
984 |
|
|
/* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
985 |
|
|
/* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
986 |
|
|
/* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
987 |
|
|
/* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
988 |
|
|
/* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
989 |
|
|
/* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
990 |
|
|
/* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
991 |
|
|
/* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
992 |
|
|
/* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
993 |
|
|
/* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
994 |
|
|
/* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
995 |
|
|
/* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
996 |
|
|
/* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
997 |
|
|
/* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
998 |
|
|
/* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
999 |
|
|
/* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1000 |
|
|
/* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1001 |
|
|
/* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1002 |
|
|
/* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1003 |
|
|
/* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1004 |
|
|
/* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1005 |
|
|
/* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1006 |
|
|
/* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1007 |
|
|
/* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1008 |
|
|
/* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1009 |
|
|
/* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1010 |
|
|
/* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1011 |
|
|
/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1012 |
|
|
/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1013 |
|
|
/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1014 |
|
|
/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1015 |
|
|
/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1016 |
|
|
/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1017 |
|
|
/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1018 |
|
|
/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1019 |
|
|
/* synthesis INITVAL_17="0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B" */
|
1020 |
|
|
/* synthesis INITVAL_16="0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB" */
|
1021 |
|
|
/* synthesis INITVAL_15="0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3" */
|
1022 |
|
|
/* synthesis INITVAL_14="0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019" */
|
1023 |
|
|
/* synthesis INITVAL_13="0x00035100180003510013000301001200030100110003010010000301000900030100080003010007" */
|
1024 |
|
|
/* synthesis INITVAL_12="0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004" */
|
1025 |
|
|
/* synthesis INITVAL_11="0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3" */
|
1026 |
|
|
/* synthesis INITVAL_10="0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF" */
|
1027 |
|
|
/* synthesis INITVAL_0F="0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008" */
|
1028 |
|
|
/* synthesis INITVAL_0E="0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008" */
|
1029 |
|
|
/* synthesis INITVAL_0D="0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002" */
|
1030 |
|
|
/* synthesis INITVAL_0C="0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090" */
|
1031 |
|
|
/* synthesis INITVAL_0B="0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048" */
|
1032 |
|
|
/* synthesis INITVAL_0A="0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008" */
|
1033 |
|
|
/* synthesis INITVAL_09="0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060" */
|
1034 |
|
|
/* synthesis INITVAL_08="0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020" */
|
1035 |
|
|
/* synthesis INITVAL_07="0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001" */
|
1036 |
|
|
/* synthesis INITVAL_06="0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068" */
|
1037 |
|
|
/* synthesis INITVAL_05="0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028" */
|
1038 |
|
|
/* synthesis INITVAL_04="0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000" */
|
1039 |
|
|
/* synthesis INITVAL_03="0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000" */
|
1040 |
|
|
/* synthesis INITVAL_02="0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000" */
|
1041 |
|
|
/* synthesis INITVAL_01="0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000" */
|
1042 |
|
|
/* synthesis INITVAL_00="0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000" */
|
1043 |
|
|
/* synthesis CSDECODE_B="0b000" */
|
1044 |
|
|
/* synthesis CSDECODE_A="0b000" */
|
1045 |
|
|
/* synthesis WRITEMODE_B="NORMAL" */
|
1046 |
|
|
/* synthesis WRITEMODE_A="NORMAL" */
|
1047 |
|
|
/* synthesis GSR="ENABLED" */
|
1048 |
|
|
/* synthesis RESETMODE="ASYNC" */
|
1049 |
|
|
/* synthesis REGMODE_B="NOREG" */
|
1050 |
|
|
/* synthesis REGMODE_A="NOREG" */
|
1051 |
|
|
/* synthesis DATA_WIDTH_B="18" */
|
1052 |
|
|
/* synthesis DATA_WIDTH_A="18" */;
|
1053 |
|
|
|
1054 |
|
|
VHI scuba_vhi_inst (.Z(scuba_vhi));
|
1055 |
|
|
|
1056 |
|
|
VLO scuba_vlo_inst (.Z(scuba_vlo));
|
1057 |
|
|
|
1058 |
|
|
// synopsys translate_off
|
1059 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1060 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1061 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1062 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1063 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1064 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_3A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1065 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_39 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1066 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_38 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1067 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_37 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1068 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_36 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1069 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_35 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1070 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_34 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1071 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_33 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1072 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_32 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1073 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_31 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1074 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_30 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1075 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1076 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1077 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1078 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1079 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1080 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_2A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1081 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_29 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1082 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_28 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1083 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_27 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1084 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_26 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1085 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_25 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1086 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_24 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1087 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_23 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1088 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_22 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1089 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_21 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1090 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_20 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1091 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1F = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1092 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1E = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1093 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1D = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1094 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1C = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1095 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1B = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1096 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_1A = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1097 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_19 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1098 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_18 = 320'h00000000000000000000000000000000000000000000000000000000000000000000000000000000 ;
|
1099 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_17 = 320'h0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF ;
|
1100 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_16 = 320'h00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF ;
|
1101 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_15 = 320'h00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363 ;
|
1102 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_14 = 320'h00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10 ;
|
1103 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_13 = 320'h0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08 ;
|
1104 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_12 = 320'h02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7 ;
|
1105 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_11 = 320'h00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708 ;
|
1106 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_10 = 320'h01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708 ;
|
1107 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0F = 320'h024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7 ;
|
1108 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0E = 320'h00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0 ;
|
1109 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0D = 320'h00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108 ;
|
1110 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0C = 320'h01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7 ;
|
1111 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0B = 320'h0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4 ;
|
1112 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_0A = 320'h00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0 ;
|
1113 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_09 = 320'h00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6 ;
|
1114 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_08 = 320'h00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2 ;
|
1115 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_07 = 320'h00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008 ;
|
1116 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_06 = 320'h0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE ;
|
1117 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_05 = 320'h016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA ;
|
1118 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_04 = 320'h016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8 ;
|
1119 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_03 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
1120 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_02 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
1121 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_01 = 320'h00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600 ;
|
1122 |
|
|
defparam sc_rom_monitor_0_1_0.INITVAL_00 = 320'h00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600 ;
|
1123 |
|
|
defparam sc_rom_monitor_0_1_0.CSDECODE_B = 3'b000 ;
|
1124 |
|
|
defparam sc_rom_monitor_0_1_0.CSDECODE_A = 3'b000 ;
|
1125 |
|
|
defparam sc_rom_monitor_0_1_0.WRITEMODE_B = "NORMAL" ;
|
1126 |
|
|
defparam sc_rom_monitor_0_1_0.WRITEMODE_A = "NORMAL" ;
|
1127 |
|
|
defparam sc_rom_monitor_0_1_0.GSR = "ENABLED" ;
|
1128 |
|
|
defparam sc_rom_monitor_0_1_0.RESETMODE = "ASYNC" ;
|
1129 |
|
|
defparam sc_rom_monitor_0_1_0.REGMODE_B = "NOREG" ;
|
1130 |
|
|
defparam sc_rom_monitor_0_1_0.REGMODE_A = "NOREG" ;
|
1131 |
|
|
defparam sc_rom_monitor_0_1_0.DATA_WIDTH_B = 18 ;
|
1132 |
|
|
defparam sc_rom_monitor_0_1_0.DATA_WIDTH_A = 18 ;
|
1133 |
|
|
// synopsys translate_on
|
1134 |
|
|
DP16KA sc_rom_monitor_0_1_0 (.DIA0(DataInA[18]), .DIA1(DataInA[19]),
|
1135 |
|
|
.DIA2(DataInA[20]), .DIA3(DataInA[21]), .DIA4(DataInA[22]), .DIA5(DataInA[23]),
|
1136 |
|
|
.DIA6(DataInA[24]), .DIA7(DataInA[25]), .DIA8(DataInA[26]), .DIA9(DataInA[27]),
|
1137 |
|
|
.DIA10(DataInA[28]), .DIA11(DataInA[29]), .DIA12(DataInA[30]), .DIA13(DataInA[31]),
|
1138 |
|
|
.DIA14(scuba_vlo), .DIA15(scuba_vlo), .DIA16(scuba_vlo), .DIA17(scuba_vlo),
|
1139 |
|
|
.ADA0(scuba_vhi), .ADA1(scuba_vhi), .ADA2(scuba_vlo), .ADA3(scuba_vlo),
|
1140 |
|
|
.ADA4(AddressA[0]), .ADA5(AddressA[1]), .ADA6(AddressA[2]), .ADA7(AddressA[3]),
|
1141 |
|
|
.ADA8(AddressA[4]), .ADA9(AddressA[5]), .ADA10(AddressA[6]), .ADA11(AddressA[7]),
|
1142 |
|
|
.ADA12(AddressA[8]), .ADA13(scuba_vlo), .CEA(ClockEnA), .CLKA(ClockA),
|
1143 |
|
|
.WEA(WrA), .CSA0(scuba_vlo), .CSA1(scuba_vlo), .CSA2(scuba_vlo),
|
1144 |
|
|
.RSTA(ResetA), .DIB0(DataInB[18]), .DIB1(DataInB[19]), .DIB2(DataInB[20]),
|
1145 |
|
|
.DIB3(DataInB[21]), .DIB4(DataInB[22]), .DIB5(DataInB[23]), .DIB6(DataInB[24]),
|
1146 |
|
|
.DIB7(DataInB[25]), .DIB8(DataInB[26]), .DIB9(DataInB[27]), .DIB10(DataInB[28]),
|
1147 |
|
|
.DIB11(DataInB[29]), .DIB12(DataInB[30]), .DIB13(DataInB[31]), .DIB14(scuba_vlo),
|
1148 |
|
|
.DIB15(scuba_vlo), .DIB16(scuba_vlo), .DIB17(scuba_vlo), .ADB0(scuba_vhi),
|
1149 |
|
|
.ADB1(scuba_vhi), .ADB2(scuba_vlo), .ADB3(scuba_vlo), .ADB4(AddressB[0]),
|
1150 |
|
|
.ADB5(AddressB[1]), .ADB6(AddressB[2]), .ADB7(AddressB[3]), .ADB8(AddressB[4]),
|
1151 |
|
|
.ADB9(AddressB[5]), .ADB10(AddressB[6]), .ADB11(AddressB[7]), .ADB12(AddressB[8]),
|
1152 |
|
|
.ADB13(scuba_vlo), .CEB(ClockEnB), .CLKB(ClockB), .WEB(WrB), .CSB0(scuba_vlo),
|
1153 |
|
|
.CSB1(scuba_vlo), .CSB2(scuba_vlo), .RSTB(ResetB), .DOA0(QA[18]),
|
1154 |
|
|
.DOA1(QA[19]), .DOA2(QA[20]), .DOA3(QA[21]), .DOA4(QA[22]), .DOA5(QA[23]),
|
1155 |
|
|
.DOA6(QA[24]), .DOA7(QA[25]), .DOA8(QA[26]), .DOA9(QA[27]), .DOA10(QA[28]),
|
1156 |
|
|
.DOA11(QA[29]), .DOA12(QA[30]), .DOA13(QA[31]), .DOA14(), .DOA15(),
|
1157 |
|
|
.DOA16(), .DOA17(), .DOB0(QB[18]), .DOB1(QB[19]), .DOB2(QB[20]),
|
1158 |
|
|
.DOB3(QB[21]), .DOB4(QB[22]), .DOB5(QB[23]), .DOB6(QB[24]), .DOB7(QB[25]),
|
1159 |
|
|
.DOB8(QB[26]), .DOB9(QB[27]), .DOB10(QB[28]), .DOB11(QB[29]), .DOB12(QB[30]),
|
1160 |
|
|
.DOB13(QB[31]), .DOB14(), .DOB15(), .DOB16(), .DOB17())
|
1161 |
|
|
/* synthesis MEM_LPC_FILE="sc_rom_monitor.lpc" */
|
1162 |
|
|
/* synthesis MEM_INIT_FILE="rom.mem" */
|
1163 |
|
|
/* synthesis INITVAL_3F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1164 |
|
|
/* synthesis INITVAL_3E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1165 |
|
|
/* synthesis INITVAL_3D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1166 |
|
|
/* synthesis INITVAL_3C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1167 |
|
|
/* synthesis INITVAL_3B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1168 |
|
|
/* synthesis INITVAL_3A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1169 |
|
|
/* synthesis INITVAL_39="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1170 |
|
|
/* synthesis INITVAL_38="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1171 |
|
|
/* synthesis INITVAL_37="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1172 |
|
|
/* synthesis INITVAL_36="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1173 |
|
|
/* synthesis INITVAL_35="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1174 |
|
|
/* synthesis INITVAL_34="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1175 |
|
|
/* synthesis INITVAL_33="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1176 |
|
|
/* synthesis INITVAL_32="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1177 |
|
|
/* synthesis INITVAL_31="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1178 |
|
|
/* synthesis INITVAL_30="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1179 |
|
|
/* synthesis INITVAL_2F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1180 |
|
|
/* synthesis INITVAL_2E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1181 |
|
|
/* synthesis INITVAL_2D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1182 |
|
|
/* synthesis INITVAL_2C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1183 |
|
|
/* synthesis INITVAL_2B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1184 |
|
|
/* synthesis INITVAL_2A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1185 |
|
|
/* synthesis INITVAL_29="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1186 |
|
|
/* synthesis INITVAL_28="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1187 |
|
|
/* synthesis INITVAL_27="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1188 |
|
|
/* synthesis INITVAL_26="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1189 |
|
|
/* synthesis INITVAL_25="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1190 |
|
|
/* synthesis INITVAL_24="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1191 |
|
|
/* synthesis INITVAL_23="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1192 |
|
|
/* synthesis INITVAL_22="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1193 |
|
|
/* synthesis INITVAL_21="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1194 |
|
|
/* synthesis INITVAL_20="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1195 |
|
|
/* synthesis INITVAL_1F="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1196 |
|
|
/* synthesis INITVAL_1E="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1197 |
|
|
/* synthesis INITVAL_1D="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1198 |
|
|
/* synthesis INITVAL_1C="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1199 |
|
|
/* synthesis INITVAL_1B="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1200 |
|
|
/* synthesis INITVAL_1A="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1201 |
|
|
/* synthesis INITVAL_19="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1202 |
|
|
/* synthesis INITVAL_18="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000" */
|
1203 |
|
|
/* synthesis INITVAL_17="0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF" */
|
1204 |
|
|
/* synthesis INITVAL_16="0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF" */
|
1205 |
|
|
/* synthesis INITVAL_15="0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363" */
|
1206 |
|
|
/* synthesis INITVAL_14="0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10" */
|
1207 |
|
|
/* synthesis INITVAL_13="0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08" */
|
1208 |
|
|
/* synthesis INITVAL_12="0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7" */
|
1209 |
|
|
/* synthesis INITVAL_11="0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708" */
|
1210 |
|
|
/* synthesis INITVAL_10="0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708" */
|
1211 |
|
|
/* synthesis INITVAL_0F="0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7" */
|
1212 |
|
|
/* synthesis INITVAL_0E="0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0" */
|
1213 |
|
|
/* synthesis INITVAL_0D="0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108" */
|
1214 |
|
|
/* synthesis INITVAL_0C="0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7" */
|
1215 |
|
|
/* synthesis INITVAL_0B="0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4" */
|
1216 |
|
|
/* synthesis INITVAL_0A="0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0" */
|
1217 |
|
|
/* synthesis INITVAL_09="0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6" */
|
1218 |
|
|
/* synthesis INITVAL_08="0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2" */
|
1219 |
|
|
/* synthesis INITVAL_07="0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008" */
|
1220 |
|
|
/* synthesis INITVAL_06="0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE" */
|
1221 |
|
|
/* synthesis INITVAL_05="0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA" */
|
1222 |
|
|
/* synthesis INITVAL_04="0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8" */
|
1223 |
|
|
/* synthesis INITVAL_03="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
1224 |
|
|
/* synthesis INITVAL_02="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
1225 |
|
|
/* synthesis INITVAL_01="0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600" */
|
1226 |
|
|
/* synthesis INITVAL_00="0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600" */
|
1227 |
|
|
/* synthesis CSDECODE_B="0b000" */
|
1228 |
|
|
/* synthesis CSDECODE_A="0b000" */
|
1229 |
|
|
/* synthesis WRITEMODE_B="NORMAL" */
|
1230 |
|
|
/* synthesis WRITEMODE_A="NORMAL" */
|
1231 |
|
|
/* synthesis GSR="ENABLED" */
|
1232 |
|
|
/* synthesis RESETMODE="ASYNC" */
|
1233 |
|
|
/* synthesis REGMODE_B="NOREG" */
|
1234 |
|
|
/* synthesis REGMODE_A="NOREG" */
|
1235 |
|
|
/* synthesis DATA_WIDTH_B="18" */
|
1236 |
|
|
/* synthesis DATA_WIDTH_A="18" */;
|
1237 |
|
|
|
1238 |
|
|
|
1239 |
|
|
|
1240 |
|
|
// exemplar begin
|
1241 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 MEM_LPC_FILE sc_rom_monitor.lpc
|
1242 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 MEM_INIT_FILE rom.mem
|
1243 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1244 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1245 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1246 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1247 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1248 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1249 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1250 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1251 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1252 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1253 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1254 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1255 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1256 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1257 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1258 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1259 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1260 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1261 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1262 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1263 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1264 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1265 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1266 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1267 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1268 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1269 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1270 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1271 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1272 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1273 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1274 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1275 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1276 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1277 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1278 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1279 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1280 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1281 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1282 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1283 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_17 0x00000000000000000000000000000000000000003FF8C300003FF8E300003FF90300003FF923FF5B
|
1284 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_16 0x1004F3FF95300003FF97300003FF99300003FF9B300003FF9D300003FF9F300003FFA1300003FFFB
|
1285 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_15 0x0000130001100003FF691001400000068003FF7E058003FF803FFFB300013FF7800001100001FFB3
|
1286 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_14 0x00000068003FF89058003FF8B3FFB93FF9B008003FFBC300000FFBE1001B000331001A0002C10019
|
1287 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_13 0x00035100180003510013000301001200030100110003010010000301000900030100080003010007
|
1288 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_12 0x010003FF97058003FFAA3FFFC00800078003FFDB3FFBD0080000004100063FFA2000000001C10004
|
1289 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_11 0x000083000C2001010014000183001C0000000000000001000000000000000000010000100010FFF3
|
1290 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_10 0x10063000481004D0003F1006D0003E1007200024100570001D10077010003FFC210000100540FFFF
|
1291 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0F 0x0080010000100540FFFF008000700010004000083000C2001010014000183001C0FFE40000000008
|
1292 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0E 0x100043FFDD100083FFDF100093FFE11000A3FFE31000B10008100040FFF8000000000C1000410008
|
1293 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0D 0x100083FFE7100093FFE91000A3FFEB1000B3FFED100040FFF400000200000FFFF010000000000002
|
1294 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0C 0x10054100000FFFF01000100FF00000100FF000000FFFE10100010000000000070300803000030090
|
1295 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0B 0x300003008C300003008820078100743006C2006810064000603005C2005810054000503004C20048
|
1296 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_0A 0x10044000403003C2003810034000303002C2002810024000203001C2001810014000103000C20008
|
1297 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_09 0x100040000000070200802000020090200002008C20000200883007C100743006C200681006400060
|
1298 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_08 0x3005C2005810054000503004C2004810044000403003C2003810034000303002C200281002400020
|
1299 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_07 0x3001C2001810014000103000C2000810004000001F9940E000000001007410000100841000110001
|
1300 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_06 0x100011000110001100FF1F99410090008001008C0080010088008003007C20078000703006C20068
|
1301 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_05 0x10064000603005C2005810054000503004C2004810044000403003C2003810034000303002C20028
|
1302 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_04 0x10024000203001C2001810014000103000C200081000400000000001066C3FFC530000007F40E000
|
1303 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_03 0x000000003B000B500800200800000A00000000000000000043000BD0080020080000120000000000
|
1304 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_02 0x000000004B000C500800200800001A00000000000000000053000CD0080020080000220000000000
|
1305 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_01 0x0000000081000D500800300800002A00000000000000000063000DD0080020080000320000000000
|
1306 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 INITVAL_00 0x0000000091000E500800300800003A00000000000000000000000000000000000000000003F00000
|
1307 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 CSDECODE_B 0b000
|
1308 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 CSDECODE_A 0b000
|
1309 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 WRITEMODE_B NORMAL
|
1310 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 WRITEMODE_A NORMAL
|
1311 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 GSR ENABLED
|
1312 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 RESETMODE ASYNC
|
1313 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 REGMODE_B NOREG
|
1314 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 REGMODE_A NOREG
|
1315 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 DATA_WIDTH_B 18
|
1316 |
|
|
// exemplar attribute sc_rom_monitor_0_0_1 DATA_WIDTH_A 18
|
1317 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 MEM_LPC_FILE sc_rom_monitor.lpc
|
1318 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 MEM_INIT_FILE rom.mem
|
1319 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1320 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1321 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1322 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1323 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1324 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_3A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1325 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_39 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1326 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_38 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1327 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_37 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1328 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_36 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1329 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_35 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1330 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_34 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1331 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_33 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1332 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_32 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1333 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_31 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1334 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_30 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1335 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1336 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1337 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1338 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1339 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1340 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_2A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1341 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_29 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1342 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_28 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1343 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_27 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1344 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_26 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1345 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_25 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1346 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_24 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1347 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_23 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1348 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_22 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1349 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_21 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1350 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_20 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1351 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1F 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1352 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1E 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1353 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1D 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1354 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1C 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1355 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1B 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1356 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_1A 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1357 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_19 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1358 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_18 0x00000000000000000000000000000000000000000000000000000000000000000000000000000000
|
1359 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_17 0x0000000000000000000000000000000000000000038FF034D2038FF034C2038FF0349A038FF03EFF
|
1360 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_16 0x00D00038FF034CA038FF03492038FF0348A038FF03482038FF0344A038FF03442038FF0343A038FF
|
1361 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_15 0x00D6300D5A00C5803EFF0136300D0302E0803EFF02E0803EFF038FF00D5A03EFF00D630105801363
|
1362 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_14 0x00D0302E0803EFF02E0803EFF038FF03EFF02E70038FF034DA0170801F100110801F100110801F10
|
1363 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_13 0x0110801F100110801F100110801F100110801F100110801F100110801F100110801F100110801F08
|
1364 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_12 0x02E0803EFF02E0803EFF038FF02E7802430038FF03EFF02E780110801F0803EFF030E800DE700AE7
|
1365 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_11 0x00AE400AE300AE300AE300AE300AE200D0000D0000D000342000D0000D0000D000341800D0001708
|
1366 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_10 0x01F100110801F100110801F100110801F100110801F100110801F0802E0803EFF0347000D0001708
|
1367 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0F 0x024700347000D00017080247002E08016E7016E4016E3016E3016E3016E3016E200DE7030E800DE7
|
1368 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0E 0x00AE703EFF010E003EFF010E003EFF010E003EFF010E0016E0016E700DE7030E800DE700AE700AE0
|
1369 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0D 0x00CE003EFF00CE003EFF00CE003EFF00CE003EFF016E700DE7030E8034700171002470030E801108
|
1370 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0C 0x01F0803470017100247000808030E80081003478011080081002478030F800AE700AE70340700AE7
|
1371 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0B 0x0344F00AE70343F00AE700AE700AE700AE600AE600AE600AE600AE500AE500AE500AE500AE400AE4
|
1372 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_0A 0x00AE400AE400AE300AE300AE300AE300AE200AE200AE200AE200AE100AE100AE100AE100AE000AE0
|
1373 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_09 0x00AE0030F000AE700AE70340700AE70344F00AE70343F00AE700AE700AE700AE600AE600AE600AE6
|
1374 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_08 0x00AE500AE500AE500AE500AE400AE400AE400AE400AE300AE300AE300AE300AE200AE200AE200AE2
|
1375 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_07 0x00AE100AE100AE100AE100AE000AE000AE0030E800DEF02EE8016E8016E800AE8016E80000800008
|
1376 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_06 0x0000800008000080080800DE8016E802400016E802448016E802438016EF016EF016EF016EE016EE
|
1377 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_05 0x016EE016EE016ED016ED016ED016ED016EC016EC016EC016EC016EB016EB016EB016EB016EA016EA
|
1378 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_04 0x016EA016EA016E9016E9016E9016E9016E8016E8016E802600016E800DEF038FF00D0700DE702EE8
|
1379 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_03 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
1380 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_02 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
1381 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_01 0x00D000380003E0002EE0016E703E0002EE80260000D000380003E0002EE0016E703E0002EE802600
|
1382 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 INITVAL_00 0x00D000380003E0002EE0016E703E0002EE80260000D0000D0000D0000D0000D0000D0003E0002600
|
1383 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 CSDECODE_B 0b000
|
1384 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 CSDECODE_A 0b000
|
1385 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 WRITEMODE_B NORMAL
|
1386 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 WRITEMODE_A NORMAL
|
1387 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 GSR ENABLED
|
1388 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 RESETMODE ASYNC
|
1389 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 REGMODE_B NOREG
|
1390 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 REGMODE_A NOREG
|
1391 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 DATA_WIDTH_B 18
|
1392 |
|
|
// exemplar attribute sc_rom_monitor_0_1_0 DATA_WIDTH_A 18
|
1393 |
|
|
// exemplar end
|
1394 |
|
|
end
|
1395 |
|
|
endgenerate
|
1396 |
|
|
|
1397 |
|
|
endmodule
|