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alirezamon |
/* ****************************************************************************
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This Source Code Form is subject to the terms of the
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Open Hardware Description License, v. 1.0. If a copy
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of the OHDL was not distributed with this file, You
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can obtain one at http://juliusbaxter.net/ohdl/ohdl.txt
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Description: mor1kx monitor module
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Attaches to hooks provided in the mor1kx pipeline wrapper and provides
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execution trace, disassembly, and l.nop instruction functions.
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Copyright (C) 2012, 2013 Authors
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Author(s): Julius Baxter <juliusbaxter@gmail.com>
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***************************************************************************** */
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/* Configure these defines to point to the mor1kx instantiation */
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`ifndef MOR1KX_INST
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`define MOR1KX_INST dut.mor1kx0
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`endif
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/* The rest of these shouldn't need changing if the wrapper hooks have been
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set up correctly in mor1kx_cpu. */
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`ifndef CPU_WRAPPER
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`define CPU_WRAPPER `MOR1KX_INST.mor1kx_cpu
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`endif
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`define CPU_INST `CPU_WRAPPER.`MOR1KX_CPU_PIPELINE.mor1kx_cpu
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`define EXECUTE_STAGE_INSN `CPU_WRAPPER.monitor_execute_insn
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`define EXECUTE_STAGE_ADV `CPU_WRAPPER.monitor_execute_advance
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`define CPU_clk `CPU_WRAPPER.monitor_clk
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`define CPU_FLAG `CPU_WRAPPER.monitor_flag
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`define CPU_SR `CPU_WRAPPER.monitor_spr_sr
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`define EXECUTE_PC `CPU_WRAPPER.monitor_execute_pc
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`define GPR_GET(x) `CPU_INST.get_gpr(x)
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`define GPR_SET(x, y) `CPU_INST.set_gpr(x, y)
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`include "mor1kx-defines.v"
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// Pull in an ORPSoC-specific file
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`include "test-defines.v" // indicate if we should trace or not
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// OR1K ISA defines used in this file
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`define OR1K_OPCODE_POS 31:26
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`define OR1K_J_BR_IMM_POS 25:0
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`define OR1K_RD_POS 25:21
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`define OR1K_RA_POS 20:16
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`define OR1K_RB_POS 15:11
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`define OR1K_ALU_OP_POS 3:0
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`define OR1K_SF_OP 25:21
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`define OR1K_XSYNC_OP_POS 25:21
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module mor1kx_monitor #(parameter LOG_DIR= "../out") ();
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// General output file descriptor
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integer fgeneral = 0;
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integer ftrace = 0;
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integer insns = 0;
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wire clk;
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parameter OPTION_OPERAND_WIDTH = 32;
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reg TRACE_ENABLE;
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initial TRACE_ENABLE = $test$plusargs("trace_enable");
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reg TRACE_TO_SCREEN;
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initial TRACE_TO_SCREEN = $test$plusargs("trace_to_screen");
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assign clk = `CPU_clk;
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reg [63:0] cycle_counter = 0 ;
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/* Log file management code */
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initial
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begin
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$timeformat (-9, 2, " ns", 12);
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fgeneral = $fopen({LOG_DIR,"/",`TEST_NAME_STRING,"-general.log"});
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ftrace = $fopen({LOG_DIR,"/",`TEST_NAME_STRING,"-trace.log"});
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end
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/* Simulation support code */
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reg [1:80*8] decode_insn_disas;
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reg [1:80*8] execute_insn_disas;
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reg [OPTION_OPERAND_WIDTH-1:0] decode_pc;
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reg [OPTION_OPERAND_WIDTH-1:0] execute_pc;
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reg [`OR1K_INSN_WIDTH-1:0] execute_insn;
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reg flag_4stage;
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always @(`EXECUTE_STAGE_INSN)
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mor1k_insn_to_string(`EXECUTE_STAGE_INSN, execute_insn_disas);
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//$write("%tns: decode insn PC %08h %08h %s\n",$time, pc_decode_i,
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// decode_insn_i, insn_disassembled_string);
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always @(negedge `CPU_clk) begin
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cycle_counter = cycle_counter + 1;
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if (`EXECUTE_STAGE_ADV)
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begin
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insns = insns + 1;
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execute_insn = `EXECUTE_STAGE_INSN;
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if(TRACE_ENABLE)
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mor1k_trace_print(execute_insn, `CPU_SR, `EXECUTE_PC, `CPU_FLAG);
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// Check instructions for simulation controls
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if (execute_insn == 32'h15_00_00_01)
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begin
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$fdisplay(fgeneral,"%0t:exit(0x%08h);",$time,`GPR_GET(3));
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$fdisplay(ftrace,"exit(0x%08h);",`GPR_GET(3));
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$display("exit(0x%08h);",`GPR_GET(3));
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$finish;
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end
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if (execute_insn == 32'h15_00_00_02)
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begin
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$fdisplay(fgeneral,"%0t:report(0x%08h);",$time,`GPR_GET(3));
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$fdisplay(ftrace,"report(0x%08h);",`GPR_GET(3));
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$display("report(0x%08h);",`GPR_GET(3));
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end
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if (execute_insn == 32'h15_00_00_04)
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begin
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$write("%c",`GPR_GET(3));
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$fdisplay(fgeneral, "%0t: l.nop putc (%c)", $time,`GPR_GET(3));
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end
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if (execute_insn == 32'h15_00_00_05)
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begin
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cycle_counter = 0;
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$fdisplay(fgeneral, "%0t: l.nop reset counter", $time);
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end
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if (execute_insn == 32'h15_00_00_06)
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begin
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$fdisplay(fgeneral, "%0t: l.nop report cycle counter: %d", $time, cycle_counter);
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`GPR_SET(11,cycle_counter[31:0]);
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`GPR_SET(12,cycle_counter[63:32]);
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end
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if (execute_insn == 32'h15_00_00_0c)
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begin
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// Silent exit
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$finish;
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end
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end // if (`EXECUTE_STAGE_ADV)
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end
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task mor1k_trace_print;
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input [31:0] insn;
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input [31:0] sr;
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input [31:0] pc;
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input flag;
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reg rD_used;
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reg [4:0] rD_num, rA_num, rB_num;
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reg [15:0] imm_16bit;
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reg [25:0] imm_26bit;
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reg [31:0] signext_imm_16bit;
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reg [1:80*8] insn_disas;
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// Actual things happening
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reg [15:0] regimm_chars;
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reg [31:0] addr_result;
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begin
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// Get instruction info
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mor1kx_insn_info(insn,rA_num,rB_num,rD_num,rD_used,imm_16bit,
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imm_26bit,regimm_chars);
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/* Sign-extend the 16-bit immediate to 32-bit so we can add it to other
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32-bit numbers and it should subtract if necessary */
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signext_imm_16bit = {{16{imm_16bit[15]}},imm_16bit};
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// Display useful line of stuff, like or1ksim trace
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if (sr[`OR1K_SPR_SR_SM] === 1'b0)
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begin
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$fwrite(ftrace,"U ");
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if(TRACE_TO_SCREEN)
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$write("U ");
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end
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else
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begin
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$fwrite(ftrace,"S ");
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if(TRACE_TO_SCREEN)
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$write("S ");
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end
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// PC next
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$fwrite(ftrace,"%08h: ", pc);
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if(TRACE_TO_SCREEN)
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$write("%08h: ", pc);
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// Instruction raw
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$fwrite(ftrace,"%08h ",insn);
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if(TRACE_TO_SCREEN)
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$write("%08h ",insn);
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mor1k_insn_to_string(insn, insn_disas);
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// Instruction, disassembled
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$fwrite(ftrace,"%0s", insn_disas);
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if(TRACE_TO_SCREEN)
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$write("%0s", insn_disas);
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for (regimm_chars=regimm_chars;
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regimm_chars < 16; regimm_chars = regimm_chars + 1)
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begin
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$fwrite(ftrace," ");
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if(TRACE_TO_SCREEN)
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$write(" ");
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end
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if (rD_used)
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begin
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if (insn[`OR1K_OPCODE_SELECT]===`OR1K_OPCODE_MFSPR)
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begin
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// Wait 1 cycle for MFSPR result
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@(posedge `CPU_clk);
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$fwrite(ftrace,"r%0d",rD_num);
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if(TRACE_TO_SCREEN)
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$write("r%0d",rD_num);
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end
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else
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begin
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$fwrite(ftrace,"r%0d",rD_num);
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if(TRACE_TO_SCREEN)
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$write("r%0d",rD_num);
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end // else: !if(insn[`OR1K_OPCODE_SELECT]===`OR1K_OPCODE_MFSPR)
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// Tab 1 more if we're a single-number register
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if (rD_num < 10) begin
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$fwrite(ftrace,"\t\t");
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if(TRACE_TO_SCREEN)
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$write("\t\t");
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end
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else begin
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$fwrite(ftrace,"\t");
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if(TRACE_TO_SCREEN)
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$write("\t");
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end
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// Finally write what ended up in the in rD
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$fwrite(ftrace,"= %08h ",`GPR_GET(rD_num));
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if(TRACE_TO_SCREEN)
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$write("= %08h ",`GPR_GET(rD_num));
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end
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else if (insn[`OR1K_OPCODE_SELECT]===`OR1K_OPCODE_MTSPR)
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begin
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// Clobber imm_16bit here to calculate MTSPR
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imm_16bit = imm_16bit | `GPR_GET(rA_num);
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$fwrite(ftrace,"SPR[%04x] = %08h ", imm_16bit, `GPR_GET(rB_num));
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if(TRACE_TO_SCREEN)
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$write("SPR[%04x] = %08h ", imm_16bit, `GPR_GET(rB_num));
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end // if (insn[`OR1K_OPCODE_SELECT]===`OR1K_OPCODE_MTSPR)
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else if (insn[`OR1K_OPCODE_SELECT]>=`OR1K_OPCODE_SD &&
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insn[`OR1K_OPCODE_SELECT]<=`OR1K_OPCODE_SH)
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begin
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addr_result = signext_imm_16bit + `GPR_GET(rA_num);
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$fwrite(ftrace,"[%08h] = %08h ",addr_result[31:0],
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`GPR_GET(rB_num));
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if(TRACE_TO_SCREEN)
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$write("[%08h] = %08h ",addr_result[31:0],
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`GPR_GET(rB_num));
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end
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else
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begin
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// Skip destination field
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$fwrite(ftrace,"\t\t\t ");
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if(TRACE_TO_SCREEN)
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$write("\t\t\t ");
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end
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/* Write flag */
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$fwrite(ftrace,"flag: %0d", flag);
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if(TRACE_TO_SCREEN)
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$write("flag: %0d", flag);
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/* End of line */
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$fwrite(ftrace,"\n");
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if(TRACE_TO_SCREEN)
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$write("\n");
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end
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endtask // mor1k_trace_print
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task mor1kx_insn_info;
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input [31:0] insn;
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output [4:0] rA_num;
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output [4:0] rB_num;
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output [4:0] rD_num;
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output rD_used;
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output [15:0] imm_16bit;
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output [25:0] imm_26bit;
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output [7:0] num_chars;
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// To count how long disassembled immediates/regs
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// are - what a pain!
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reg rA_used, rB_used, imm_16bit_used,
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imm_26bit_used;
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reg [5:0] opcode;
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reg opc_store;
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begin
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// Register numbers (D, A and B)
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rD_num = insn[`OR1K_RD_POS];
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rA_num = insn[`OR1K_RA_POS];
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rB_num = insn[`OR1K_RB_POS];
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opcode = insn[`OR1K_OPCODE_POS];
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opc_store = (opcode==`OR1K_OPCODE_SD) ||
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(opcode==`OR1K_OPCODE_SW) ||
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(opcode==`OR1K_OPCODE_SB) ||
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(opcode==`OR1K_OPCODE_SH);
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case (opcode)
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|
|
`OR1K_OPCODE_LWZ,
|
| 328 |
|
|
`OR1K_OPCODE_LBZ,
|
| 329 |
|
|
`OR1K_OPCODE_LBS,
|
| 330 |
|
|
`OR1K_OPCODE_LHZ,
|
| 331 |
|
|
`OR1K_OPCODE_LHS,
|
| 332 |
|
|
`OR1K_OPCODE_MFSPR,
|
| 333 |
|
|
`OR1K_OPCODE_MOVHI,
|
| 334 |
|
|
`OR1K_OPCODE_ADDI,
|
| 335 |
|
|
`OR1K_OPCODE_ADDIC,
|
| 336 |
|
|
`OR1K_OPCODE_ANDI,
|
| 337 |
|
|
`OR1K_OPCODE_ORI,
|
| 338 |
|
|
`OR1K_OPCODE_XORI,
|
| 339 |
|
|
`OR1K_OPCODE_MULI,
|
| 340 |
|
|
`OR1K_OPCODE_ALU,
|
| 341 |
|
|
`OR1K_OPCODE_SHRTI:
|
| 342 |
|
|
rD_used = 1;
|
| 343 |
|
|
default:
|
| 344 |
|
|
rD_used=0;
|
| 345 |
|
|
endcase // case (opcode)
|
| 346 |
|
|
|
| 347 |
|
|
case (opcode)
|
| 348 |
|
|
`OR1K_OPCODE_J ,
|
| 349 |
|
|
`OR1K_OPCODE_JAL ,
|
| 350 |
|
|
`OR1K_OPCODE_BNF ,
|
| 351 |
|
|
`OR1K_OPCODE_BF ,
|
| 352 |
|
|
`OR1K_OPCODE_NOP ,
|
| 353 |
|
|
`OR1K_OPCODE_MOVHI,
|
| 354 |
|
|
`OR1K_OPCODE_MACRC,
|
| 355 |
|
|
`OR1K_OPCODE_SYSTRAPSYNC,
|
| 356 |
|
|
`OR1K_OPCODE_RFE,
|
| 357 |
|
|
`OR1K_OPCODE_JR,
|
| 358 |
|
|
`OR1K_OPCODE_JALR:
|
| 359 |
|
|
/*
|
| 360 |
|
|
rD of store insns, is in rA field
|
| 361 |
|
|
`OR1K_OPCODE_SD,
|
| 362 |
|
|
`OR1K_OPCODE_SW,
|
| 363 |
|
|
`OR1K_OPCODE_SB,
|
| 364 |
|
|
`OR1K_OPCODE_SH
|
| 365 |
|
|
*/
|
| 366 |
|
|
rA_used = 0;
|
| 367 |
|
|
default:
|
| 368 |
|
|
rA_used=1;
|
| 369 |
|
|
endcase // case (opcode)
|
| 370 |
|
|
|
| 371 |
|
|
case (opcode)
|
| 372 |
|
|
`OR1K_OPCODE_JR,
|
| 373 |
|
|
`OR1K_OPCODE_JALR,
|
| 374 |
|
|
`OR1K_OPCODE_MTSPR,
|
| 375 |
|
|
`OR1K_OPCODE_MAC,
|
| 376 |
|
|
`OR1K_OPCODE_MSB,
|
| 377 |
|
|
`OR1K_OPCODE_SD,
|
| 378 |
|
|
`OR1K_OPCODE_SW,
|
| 379 |
|
|
`OR1K_OPCODE_SB,
|
| 380 |
|
|
`OR1K_OPCODE_SH,
|
| 381 |
|
|
`OR1K_OPCODE_SF:
|
| 382 |
|
|
rB_used = 1;
|
| 383 |
|
|
`OR1K_OPCODE_ALU:
|
| 384 |
|
|
case(insn[`OR1K_ALU_OPC_SELECT])
|
| 385 |
|
|
`OR1K_ALU_OPC_EXTBH,
|
| 386 |
|
|
`OR1K_ALU_OPC_EXTW,
|
| 387 |
|
|
`OR1K_ALU_OPC_FFL1:
|
| 388 |
|
|
rB_used = 0;
|
| 389 |
|
|
default:
|
| 390 |
|
|
rB_used = 1;
|
| 391 |
|
|
endcase // case (insn[`OR1K_ALU_OPC_SELECT])
|
| 392 |
|
|
default:
|
| 393 |
|
|
rB_used = 0;
|
| 394 |
|
|
endcase // case (opcode)
|
| 395 |
|
|
|
| 396 |
|
|
case (opcode)
|
| 397 |
|
|
`OR1K_OPCODE_MOVHI,
|
| 398 |
|
|
`OR1K_OPCODE_NOP,
|
| 399 |
|
|
`OR1K_OPCODE_SD,
|
| 400 |
|
|
`OR1K_OPCODE_SW,
|
| 401 |
|
|
`OR1K_OPCODE_SB,
|
| 402 |
|
|
`OR1K_OPCODE_SH,
|
| 403 |
|
|
`OR1K_OPCODE_LD ,
|
| 404 |
|
|
`OR1K_OPCODE_LWZ ,
|
| 405 |
|
|
`OR1K_OPCODE_LWS ,
|
| 406 |
|
|
`OR1K_OPCODE_LBZ ,
|
| 407 |
|
|
`OR1K_OPCODE_LBS ,
|
| 408 |
|
|
`OR1K_OPCODE_LHZ ,
|
| 409 |
|
|
`OR1K_OPCODE_LHS ,
|
| 410 |
|
|
`OR1K_OPCODE_ADDI ,
|
| 411 |
|
|
`OR1K_OPCODE_ADDIC,
|
| 412 |
|
|
`OR1K_OPCODE_ANDI ,
|
| 413 |
|
|
`OR1K_OPCODE_ORI ,
|
| 414 |
|
|
`OR1K_OPCODE_XORI ,
|
| 415 |
|
|
`OR1K_OPCODE_MULI ,
|
| 416 |
|
|
`OR1K_OPCODE_MACI ,
|
| 417 |
|
|
`OR1K_OPCODE_SFIMM,
|
| 418 |
|
|
`OR1K_OPCODE_MTSPR,
|
| 419 |
|
|
`OR1K_OPCODE_MFSPR:
|
| 420 |
|
|
imm_16bit_used = 1;
|
| 421 |
|
|
default:
|
| 422 |
|
|
imm_16bit_used = 0;
|
| 423 |
|
|
endcase // case (opcode)
|
| 424 |
|
|
|
| 425 |
|
|
case (opcode)
|
| 426 |
|
|
`OR1K_OPCODE_J ,
|
| 427 |
|
|
`OR1K_OPCODE_JAL,
|
| 428 |
|
|
`OR1K_OPCODE_BNF,
|
| 429 |
|
|
`OR1K_OPCODE_BF:
|
| 430 |
|
|
imm_26bit_used = 1;
|
| 431 |
|
|
default:
|
| 432 |
|
|
imm_26bit_used = 0;
|
| 433 |
|
|
endcase
|
| 434 |
|
|
|
| 435 |
|
|
// Extract immediate
|
| 436 |
|
|
case (opcode)
|
| 437 |
|
|
`OR1K_OPCODE_SW,
|
| 438 |
|
|
`OR1K_OPCODE_SB,
|
| 439 |
|
|
`OR1K_OPCODE_SH,
|
| 440 |
|
|
`OR1K_OPCODE_SD,
|
| 441 |
|
|
`OR1K_OPCODE_MTSPR:
|
| 442 |
|
|
imm_16bit = {insn[25:21],insn[10:0]};
|
| 443 |
|
|
default:
|
| 444 |
|
|
imm_16bit = insn[15:0];
|
| 445 |
|
|
endcase // case (opcode)
|
| 446 |
|
|
|
| 447 |
|
|
imm_26bit = insn[25:0];
|
| 448 |
|
|
|
| 449 |
|
|
// Extra chars (commas, brackets)
|
| 450 |
|
|
case (opcode)
|
| 451 |
|
|
/*
|
| 452 |
|
|
`OR1K_OPCODE_J :
|
| 453 |
|
|
num_chars = 0;
|
| 454 |
|
|
`OR1K_OPCODE_JAL :
|
| 455 |
|
|
num_chars = 0;
|
| 456 |
|
|
`OR1K_OPCODE_BNF :
|
| 457 |
|
|
num_chars = 0;
|
| 458 |
|
|
`OR1K_OPCODE_BF :
|
| 459 |
|
|
num_chars = 0;
|
| 460 |
|
|
`OR1K_OPCODE_MACRC:
|
| 461 |
|
|
num_chars = 0;
|
| 462 |
|
|
`OR1K_OPCODE_SYSTRAPSYNC:
|
| 463 |
|
|
num_chars = 0;
|
| 464 |
|
|
`OR1K_OPCODE_RFE:
|
| 465 |
|
|
num_chars = 0;
|
| 466 |
|
|
`OR1K_OPCODE_JR :
|
| 467 |
|
|
num_chars = 0;
|
| 468 |
|
|
`OR1K_OPCODE_JALR :
|
| 469 |
|
|
num_chars = 0;
|
| 470 |
|
|
`OR1K_OPCODE_CUST1:
|
| 471 |
|
|
num_chars = 0;
|
| 472 |
|
|
`OR1K_OPCODE_CUST2:
|
| 473 |
|
|
num_chars = 0;
|
| 474 |
|
|
`OR1K_OPCODE_CUST3:
|
| 475 |
|
|
num_chars = 0;
|
| 476 |
|
|
`OR1K_OPCODE_CUST4:
|
| 477 |
|
|
num_chars = 0;
|
| 478 |
|
|
`OR1K_OPCODE_NOP :
|
| 479 |
|
|
num_chars = 0;
|
| 480 |
|
|
*/
|
| 481 |
|
|
`OR1K_OPCODE_MOVHI:
|
| 482 |
|
|
num_chars = 1;
|
| 483 |
|
|
`OR1K_OPCODE_MACI :
|
| 484 |
|
|
num_chars = 1;
|
| 485 |
|
|
`OR1K_OPCODE_LD :
|
| 486 |
|
|
num_chars = 3;
|
| 487 |
|
|
`OR1K_OPCODE_LWZ :
|
| 488 |
|
|
num_chars = 3;
|
| 489 |
|
|
`OR1K_OPCODE_LWS :
|
| 490 |
|
|
num_chars = 3;
|
| 491 |
|
|
`OR1K_OPCODE_LBZ :
|
| 492 |
|
|
num_chars = 3;
|
| 493 |
|
|
`OR1K_OPCODE_LBS :
|
| 494 |
|
|
num_chars = 3;
|
| 495 |
|
|
`OR1K_OPCODE_LHZ :
|
| 496 |
|
|
num_chars = 3;
|
| 497 |
|
|
`OR1K_OPCODE_LHS :
|
| 498 |
|
|
num_chars = 3;
|
| 499 |
|
|
`OR1K_OPCODE_ADDI :
|
| 500 |
|
|
num_chars = 2;
|
| 501 |
|
|
`OR1K_OPCODE_ADDIC:
|
| 502 |
|
|
num_chars = 2;
|
| 503 |
|
|
`OR1K_OPCODE_ANDI :
|
| 504 |
|
|
num_chars = 2;
|
| 505 |
|
|
`OR1K_OPCODE_ORI :
|
| 506 |
|
|
num_chars = 2;
|
| 507 |
|
|
`OR1K_OPCODE_XORI :
|
| 508 |
|
|
num_chars = 2;
|
| 509 |
|
|
`OR1K_OPCODE_MULI :
|
| 510 |
|
|
num_chars = 2;
|
| 511 |
|
|
`OR1K_OPCODE_MFSPR:
|
| 512 |
|
|
num_chars = 2;
|
| 513 |
|
|
`OR1K_OPCODE_SFIMM:
|
| 514 |
|
|
num_chars = 1;
|
| 515 |
|
|
`OR1K_OPCODE_MTSPR :
|
| 516 |
|
|
num_chars = 2;
|
| 517 |
|
|
`OR1K_OPCODE_MAC :
|
| 518 |
|
|
num_chars = 1;
|
| 519 |
|
|
`OR1K_OPCODE_MSB :
|
| 520 |
|
|
num_chars = 1;
|
| 521 |
|
|
`OR1K_OPCODE_SD :
|
| 522 |
|
|
num_chars = 3;
|
| 523 |
|
|
`OR1K_OPCODE_SW :
|
| 524 |
|
|
num_chars = 3;
|
| 525 |
|
|
`OR1K_OPCODE_SB :
|
| 526 |
|
|
num_chars = 3;
|
| 527 |
|
|
`OR1K_OPCODE_SH:
|
| 528 |
|
|
num_chars = 3;
|
| 529 |
|
|
`OR1K_OPCODE_ALU:
|
| 530 |
|
|
case(insn[`OR1K_ALU_OPC_SELECT])
|
| 531 |
|
|
`OR1K_ALU_OPC_EXTBH,
|
| 532 |
|
|
`OR1K_ALU_OPC_EXTW,
|
| 533 |
|
|
`OR1K_ALU_OPC_FFL1:
|
| 534 |
|
|
num_chars = 1;
|
| 535 |
|
|
default:
|
| 536 |
|
|
num_chars = 2;
|
| 537 |
|
|
endcase // case (insn[`OR1K_ALU_OPC_SELECT])
|
| 538 |
|
|
`OR1K_OPCODE_SF:
|
| 539 |
|
|
num_chars =1;
|
| 540 |
|
|
`OR1K_OPCODE_SHRTI:
|
| 541 |
|
|
/*
|
| 542 |
|
|
if (insn[5:0] < 6'h10)
|
| 543 |
|
|
num_chars = 5;
|
| 544 |
|
|
else
|
| 545 |
|
|
*/
|
| 546 |
|
|
num_chars = 6;
|
| 547 |
|
|
|
| 548 |
|
|
default:
|
| 549 |
|
|
num_chars = 0;
|
| 550 |
|
|
|
| 551 |
|
|
endcase // case (opcode)
|
| 552 |
|
|
|
| 553 |
|
|
|
| 554 |
|
|
// Determine length of register/immediate
|
| 555 |
|
|
// disassembly in characters
|
| 556 |
|
|
if (rA_used)
|
| 557 |
|
|
num_chars = (rA_num > 9) ? num_chars + 3 :
|
| 558 |
|
|
num_chars + 2;
|
| 559 |
|
|
|
| 560 |
|
|
if (rB_used)
|
| 561 |
|
|
num_chars = (rB_num > 9) ? num_chars + 3 :
|
| 562 |
|
|
num_chars + 2;
|
| 563 |
|
|
|
| 564 |
|
|
if (rD_used)
|
| 565 |
|
|
num_chars = (rD_num > 9) ? num_chars + 3 :
|
| 566 |
|
|
num_chars + 2;
|
| 567 |
|
|
|
| 568 |
|
|
if (imm_16bit_used)
|
| 569 |
|
|
num_chars = num_chars + 6;
|
| 570 |
|
|
|
| 571 |
|
|
if (imm_26bit_used)
|
| 572 |
|
|
num_chars = num_chars + 9;
|
| 573 |
|
|
|
| 574 |
|
|
/*
|
| 575 |
|
|
$write("%b %b %b %b %b\n",rA_used, rB_used, rD_used, imm_16bit_used,
|
| 576 |
|
|
imm_26bit_used);
|
| 577 |
|
|
*/
|
| 578 |
|
|
//$write("%0d\n",num_chars);
|
| 579 |
|
|
|
| 580 |
|
|
end
|
| 581 |
|
|
endtask // mor1k_insn_info
|
| 582 |
|
|
|
| 583 |
|
|
|
| 584 |
|
|
|
| 585 |
|
|
|
| 586 |
|
|
|
| 587 |
|
|
task mor1k_insn_to_string;
|
| 588 |
|
|
input [31:0] insn;
|
| 589 |
|
|
output [80*8:1] insnstring;
|
| 590 |
|
|
|
| 591 |
|
|
reg [5:0] opcode;
|
| 592 |
|
|
|
| 593 |
|
|
reg [25:0] j_imm;
|
| 594 |
|
|
|
| 595 |
|
|
reg [25:0] br_imm;
|
| 596 |
|
|
|
| 597 |
|
|
reg [31:0] rA_val, rB_val;
|
| 598 |
|
|
|
| 599 |
|
|
reg [3:0] alu_op;
|
| 600 |
|
|
|
| 601 |
|
|
reg [5:0] sf_op;
|
| 602 |
|
|
|
| 603 |
|
|
reg [5:0] xsync_op;
|
| 604 |
|
|
|
| 605 |
|
|
reg [4:0] rD_num, rA_num, rB_num;
|
| 606 |
|
|
|
| 607 |
|
|
reg [15:0] imm_16bit;
|
| 608 |
|
|
reg [15:0] imm_split16bit;
|
| 609 |
|
|
|
| 610 |
|
|
|
| 611 |
|
|
begin
|
| 612 |
|
|
|
| 613 |
|
|
// Instruction opcode
|
| 614 |
|
|
opcode = insn[`OR1K_OPCODE_POS];
|
| 615 |
|
|
// Immediates for jump or branch instructions
|
| 616 |
|
|
j_imm = insn[`OR1K_J_BR_IMM_POS];
|
| 617 |
|
|
br_imm = insn[`OR1K_J_BR_IMM_POS];
|
| 618 |
|
|
// Register numbers (D, A and B)
|
| 619 |
|
|
rD_num = insn[`OR1K_RD_POS];
|
| 620 |
|
|
rA_num = insn[`OR1K_RA_POS];
|
| 621 |
|
|
rB_num = insn[`OR1K_RB_POS];
|
| 622 |
|
|
// Bottom 16 bits when used as immediates in various instructions
|
| 623 |
|
|
imm_16bit = insn[15:0];
|
| 624 |
|
|
// Bottom 11 bits used as immediates for l.sX instructions
|
| 625 |
|
|
|
| 626 |
|
|
// Split 16-bit immediate for l.mtspr/l.sX instructions
|
| 627 |
|
|
imm_split16bit = {insn[25:21],insn[10:0]};
|
| 628 |
|
|
// ALU op for ALU instructions
|
| 629 |
|
|
alu_op = insn[`OR1K_ALU_OP_POS];
|
| 630 |
|
|
|
| 631 |
|
|
|
| 632 |
|
|
// Set flag op
|
| 633 |
|
|
sf_op = insn[`OR1K_SF_OP];
|
| 634 |
|
|
|
| 635 |
|
|
// Xsync/syscall/trap opcode
|
| 636 |
|
|
xsync_op = insn[`OR1K_XSYNC_OP_POS];
|
| 637 |
|
|
|
| 638 |
|
|
case (opcode)
|
| 639 |
|
|
`OR1K_OPCODE_J:
|
| 640 |
|
|
begin
|
| 641 |
|
|
$sformat(insnstring, "l.j 0x%07h", j_imm);
|
| 642 |
|
|
end
|
| 643 |
|
|
|
| 644 |
|
|
`OR1K_OPCODE_JAL:
|
| 645 |
|
|
begin
|
| 646 |
|
|
$sformat(insnstring, "l.jal 0x%07h", j_imm);
|
| 647 |
|
|
end
|
| 648 |
|
|
|
| 649 |
|
|
`OR1K_OPCODE_BNF:
|
| 650 |
|
|
begin
|
| 651 |
|
|
$sformat(insnstring, "l.bnf 0x%07h", br_imm);
|
| 652 |
|
|
end
|
| 653 |
|
|
|
| 654 |
|
|
`OR1K_OPCODE_BF:
|
| 655 |
|
|
begin
|
| 656 |
|
|
$sformat(insnstring, "l.bf 0x%07h", br_imm);
|
| 657 |
|
|
end
|
| 658 |
|
|
|
| 659 |
|
|
`OR1K_OPCODE_RFE:
|
| 660 |
|
|
begin
|
| 661 |
|
|
$sformat(insnstring, "l.rfe ");
|
| 662 |
|
|
end
|
| 663 |
|
|
|
| 664 |
|
|
`OR1K_OPCODE_JR:
|
| 665 |
|
|
begin
|
| 666 |
|
|
$sformat(insnstring, "l.jr r%0d",rB_num);
|
| 667 |
|
|
end
|
| 668 |
|
|
|
| 669 |
|
|
`OR1K_OPCODE_JALR:
|
| 670 |
|
|
begin
|
| 671 |
|
|
$sformat(insnstring, "l.jalr r%0d",rB_num);
|
| 672 |
|
|
end
|
| 673 |
|
|
|
| 674 |
|
|
`OR1K_OPCODE_LWZ:
|
| 675 |
|
|
begin
|
| 676 |
|
|
$sformat(insnstring, "l.lwz r%0d,0x%04h(r%0d)",rD_num,imm_16bit,rA_num);
|
| 677 |
|
|
end
|
| 678 |
|
|
|
| 679 |
|
|
`OR1K_OPCODE_LBZ:
|
| 680 |
|
|
begin
|
| 681 |
|
|
$sformat(insnstring, "l.lbz r%0d,0x%04h(r%0d)",rD_num,imm_16bit,rA_num);
|
| 682 |
|
|
end
|
| 683 |
|
|
|
| 684 |
|
|
`OR1K_OPCODE_LBS:
|
| 685 |
|
|
begin
|
| 686 |
|
|
$sformat(insnstring, "l.lbs r%0d,0x%04h(r%0d)",rD_num,imm_16bit,rA_num);
|
| 687 |
|
|
end
|
| 688 |
|
|
|
| 689 |
|
|
`OR1K_OPCODE_LHZ:
|
| 690 |
|
|
begin
|
| 691 |
|
|
$sformat(insnstring, "l.lhz r%0d,0x%04h(r%0d)",rD_num,imm_16bit,rA_num);
|
| 692 |
|
|
end
|
| 693 |
|
|
|
| 694 |
|
|
`OR1K_OPCODE_LHS:
|
| 695 |
|
|
begin
|
| 696 |
|
|
$sformat(insnstring, "l.lhs r%0d,0x%04h(r%0d)",rD_num,imm_16bit,rA_num);
|
| 697 |
|
|
end
|
| 698 |
|
|
|
| 699 |
|
|
`OR1K_OPCODE_SW:
|
| 700 |
|
|
begin
|
| 701 |
|
|
$sformat(insnstring, "l.sw 0x%04h(r%0d),r%0d",imm_split16bit,rA_num,rB_num);
|
| 702 |
|
|
end
|
| 703 |
|
|
|
| 704 |
|
|
`OR1K_OPCODE_SB:
|
| 705 |
|
|
begin
|
| 706 |
|
|
$sformat(insnstring, "l.sb 0x%04h(r%0d),r%0d",imm_split16bit,rA_num,rB_num);
|
| 707 |
|
|
end
|
| 708 |
|
|
|
| 709 |
|
|
`OR1K_OPCODE_SH:
|
| 710 |
|
|
begin
|
| 711 |
|
|
$sformat(insnstring, "l.sh 0x%04h(r%0d),r%0d",imm_split16bit,rA_num,rB_num);
|
| 712 |
|
|
end
|
| 713 |
|
|
|
| 714 |
|
|
`OR1K_OPCODE_MFSPR:
|
| 715 |
|
|
begin
|
| 716 |
|
|
$sformat(insnstring, "l.mfspr r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 717 |
|
|
end
|
| 718 |
|
|
|
| 719 |
|
|
`OR1K_OPCODE_MTSPR:
|
| 720 |
|
|
begin
|
| 721 |
|
|
$sformat(insnstring, "l.mtspr r%0d,r%0d,0x%04h",rA_num,rB_num,imm_split16bit);
|
| 722 |
|
|
end
|
| 723 |
|
|
|
| 724 |
|
|
`OR1K_OPCODE_MOVHI:
|
| 725 |
|
|
begin
|
| 726 |
|
|
if (!insn[16])begin
|
| 727 |
|
|
$sformat(insnstring, "l.movhi r%0d,0x%04h",rD_num,imm_16bit);
|
| 728 |
|
|
end
|
| 729 |
|
|
else
|
| 730 |
|
|
$sformat(insnstring, "l.macrc r%0d",rD_num);
|
| 731 |
|
|
end
|
| 732 |
|
|
|
| 733 |
|
|
`OR1K_OPCODE_ADDI:
|
| 734 |
|
|
begin
|
| 735 |
|
|
$sformat(insnstring, "l.addi r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 736 |
|
|
end
|
| 737 |
|
|
|
| 738 |
|
|
`OR1K_OPCODE_ADDIC:
|
| 739 |
|
|
begin
|
| 740 |
|
|
$sformat(insnstring, "l.addic r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 741 |
|
|
end
|
| 742 |
|
|
|
| 743 |
|
|
`OR1K_OPCODE_ANDI:
|
| 744 |
|
|
begin
|
| 745 |
|
|
$sformat(insnstring, "l.andi r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 746 |
|
|
end
|
| 747 |
|
|
|
| 748 |
|
|
`OR1K_OPCODE_ORI:
|
| 749 |
|
|
begin
|
| 750 |
|
|
$sformat(insnstring, "l.ori r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 751 |
|
|
end
|
| 752 |
|
|
|
| 753 |
|
|
`OR1K_OPCODE_XORI:
|
| 754 |
|
|
begin
|
| 755 |
|
|
$sformat(insnstring, "l.xori r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 756 |
|
|
end
|
| 757 |
|
|
|
| 758 |
|
|
`OR1K_OPCODE_MULI:
|
| 759 |
|
|
begin
|
| 760 |
|
|
$sformat(insnstring, "l.muli r%0d,r%0d,0x%04h",rD_num,rA_num,imm_16bit);
|
| 761 |
|
|
end
|
| 762 |
|
|
|
| 763 |
|
|
`OR1K_OPCODE_ALU:
|
| 764 |
|
|
begin
|
| 765 |
|
|
case(insn[`OR1K_ALU_OPC_SELECT])
|
| 766 |
|
|
`OR1K_ALU_OPC_ADD:
|
| 767 |
|
|
$sformat(insnstring, "l.add r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 768 |
|
|
`OR1K_ALU_OPC_ADDC:
|
| 769 |
|
|
$sformat(insnstring, "l.addc r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 770 |
|
|
`OR1K_ALU_OPC_SUB:
|
| 771 |
|
|
$sformat(insnstring, "l.sub r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 772 |
|
|
`OR1K_ALU_OPC_AND:
|
| 773 |
|
|
$sformat(insnstring, "l.and r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 774 |
|
|
`OR1K_ALU_OPC_OR:
|
| 775 |
|
|
$sformat(insnstring, "l.or r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 776 |
|
|
`OR1K_ALU_OPC_XOR:
|
| 777 |
|
|
$sformat(insnstring, "l.xor r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 778 |
|
|
`OR1K_ALU_OPC_MUL:
|
| 779 |
|
|
$sformat(insnstring, "l.mul r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 780 |
|
|
`OR1K_ALU_OPC_SHRT:
|
| 781 |
|
|
begin
|
| 782 |
|
|
case(insn[`OR1K_ALU_OPC_SECONDARY_SELECT])
|
| 783 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SLL:
|
| 784 |
|
|
$sformat(insnstring, "l.sll r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 785 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SRL:
|
| 786 |
|
|
$sformat(insnstring, "l.srl r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 787 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SRA:
|
| 788 |
|
|
$sformat(insnstring, "l.sra r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 789 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_ROR:
|
| 790 |
|
|
$sformat(insnstring, "l.ror r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 791 |
|
|
endcase // case (insn[`OR1K_ALU_OPC_SECONDARY_SELECT])
|
| 792 |
|
|
end
|
| 793 |
|
|
`OR1K_ALU_OPC_DIV:
|
| 794 |
|
|
$sformat(insnstring, "l.div r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 795 |
|
|
`OR1K_ALU_OPC_DIVU:
|
| 796 |
|
|
$sformat(insnstring, "l.divu r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 797 |
|
|
`OR1K_ALU_OPC_MULU:
|
| 798 |
|
|
$sformat(insnstring, "l.mulu r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 799 |
|
|
`OR1K_ALU_OPC_CMOV:
|
| 800 |
|
|
$sformat(insnstring, "l.cmov r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 801 |
|
|
`OR1K_ALU_OPC_FFL1:
|
| 802 |
|
|
begin
|
| 803 |
|
|
case(insn[8])
|
| 804 |
|
|
0:
|
| 805 |
|
|
$sformat(insnstring, "l.ff1 r%0d,r%0d",rD_num,rA_num);
|
| 806 |
|
|
1:
|
| 807 |
|
|
$sformat(insnstring, "l.fl1 r%0d,r%0d",rD_num,rA_num);
|
| 808 |
|
|
endcase // case (insn[8])
|
| 809 |
|
|
end
|
| 810 |
|
|
|
| 811 |
|
|
endcase // case (alu_op)
|
| 812 |
|
|
//$sformat(insnstring, "r%0d,r%0d,r%0d",rD_num,rA_num,rB_num);
|
| 813 |
|
|
end
|
| 814 |
|
|
|
| 815 |
|
|
`OR1K_OPCODE_SHRTI:
|
| 816 |
|
|
begin
|
| 817 |
|
|
case(insn[`OR1K_ALU_OPC_SECONDARY_SELECT])
|
| 818 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SLL:
|
| 819 |
|
|
$sformat(insnstring, "l.slli r%0d,r%0d,0x%01h",rD_num,rA_num,insn[5:0]);
|
| 820 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SRL:
|
| 821 |
|
|
$sformat(insnstring, "l.srli r%0d,r%0d,0x%01h",rD_num,rA_num,insn[5:0]);
|
| 822 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_SRA:
|
| 823 |
|
|
$sformat(insnstring, "l.srai r%0d,r%0d,0x%01h",rD_num,rA_num,insn[5:0]);
|
| 824 |
|
|
`OR1K_ALU_OPC_SECONDARY_SHRT_ROR:
|
| 825 |
|
|
$sformat(insnstring, "l.rori r%0d,r%0d,0x%01h",rD_num,rA_num,insn[5:0]);
|
| 826 |
|
|
endcase // case (insn[`OR1K_ALU_OPC_SECONDARY_SELECT])
|
| 827 |
|
|
//$sformat(insnstring, "r%0d,r%0d,0x%0h",rD_num,rA_num,insn[5:0]);
|
| 828 |
|
|
end // case: `OR1K_OPCODE_SHRTI
|
| 829 |
|
|
|
| 830 |
|
|
`OR1K_OPCODE_SFIMM:
|
| 831 |
|
|
begin
|
| 832 |
|
|
case(insn[`OR1K_COMP_OPC_SELECT])
|
| 833 |
|
|
`OR1K_COMP_OPC_EQ:
|
| 834 |
|
|
$sformat(insnstring, "l.sfeqi r%0d,0x%04h",rA_num, imm_16bit);
|
| 835 |
|
|
`OR1K_COMP_OPC_NE:
|
| 836 |
|
|
$sformat(insnstring, "l.sfnei r%0d,0x%04h",rA_num, imm_16bit);
|
| 837 |
|
|
`OR1K_COMP_OPC_GTU:
|
| 838 |
|
|
$sformat(insnstring, "l.sfgtuir%0d,0x%04h",rA_num, imm_16bit);
|
| 839 |
|
|
`OR1K_COMP_OPC_GEU:
|
| 840 |
|
|
$sformat(insnstring, "l.sfgeuir%0d,0x%04h",rA_num, imm_16bit);
|
| 841 |
|
|
`OR1K_COMP_OPC_LTU:
|
| 842 |
|
|
$sformat(insnstring, "l.sfltuir%0d,0x%04h",rA_num, imm_16bit);
|
| 843 |
|
|
`OR1K_COMP_OPC_LEU:
|
| 844 |
|
|
$sformat(insnstring, "l.sfleuir%0d,0x%04h",rA_num, imm_16bit);
|
| 845 |
|
|
`OR1K_COMP_OPC_GTS:
|
| 846 |
|
|
$sformat(insnstring, "l.sfgtsir%0d,0x%04h",rA_num, imm_16bit);
|
| 847 |
|
|
`OR1K_COMP_OPC_GES:
|
| 848 |
|
|
$sformat(insnstring, "l.sfgesir%0d,0x%04h",rA_num, imm_16bit);
|
| 849 |
|
|
`OR1K_COMP_OPC_LTS:
|
| 850 |
|
|
$sformat(insnstring, "l.sfltsir%0d,0x%04h",rA_num, imm_16bit);
|
| 851 |
|
|
`OR1K_COMP_OPC_LES:
|
| 852 |
|
|
$sformat(insnstring, "l.sflesir%0d,0x%04h",rA_num, imm_16bit);
|
| 853 |
|
|
endcase // case (sf_op[2:0])
|
| 854 |
|
|
|
| 855 |
|
|
//$sformat(insnstring, "r%0d,0x%0h",rA_num, imm_16bit);
|
| 856 |
|
|
|
| 857 |
|
|
end // case: `OR1K_OPCODE_SFXXI
|
| 858 |
|
|
|
| 859 |
|
|
`OR1K_OPCODE_SF:
|
| 860 |
|
|
begin
|
| 861 |
|
|
case(insn[`OR1K_COMP_OPC_SELECT])
|
| 862 |
|
|
`OR1K_COMP_OPC_EQ:
|
| 863 |
|
|
$sformat(insnstring, "l.sfeq r%0d,r%0d",rA_num, rB_num);
|
| 864 |
|
|
`OR1K_COMP_OPC_NE:
|
| 865 |
|
|
$sformat(insnstring, "l.sfne r%0d,r%0d",rA_num, rB_num);
|
| 866 |
|
|
`OR1K_COMP_OPC_GTU:
|
| 867 |
|
|
$sformat(insnstring, "l.sfgtu r%0d,r%0d",rA_num, rB_num);
|
| 868 |
|
|
`OR1K_COMP_OPC_GEU:
|
| 869 |
|
|
$sformat(insnstring, "l.sfgeu r%0d,r%0d",rA_num, rB_num);
|
| 870 |
|
|
`OR1K_COMP_OPC_LTU:
|
| 871 |
|
|
$sformat(insnstring, "l.sfltu r%0d,r%0d",rA_num, rB_num);
|
| 872 |
|
|
`OR1K_COMP_OPC_LEU:
|
| 873 |
|
|
$sformat(insnstring, "l.sfleu r%0d,r%0d",rA_num, rB_num);
|
| 874 |
|
|
`OR1K_COMP_OPC_GTS:
|
| 875 |
|
|
$sformat(insnstring, "l.sfgts r%0d,r%0d",rA_num, rB_num);
|
| 876 |
|
|
`OR1K_COMP_OPC_GES:
|
| 877 |
|
|
$sformat(insnstring, "l.sfges r%0d,r%0d",rA_num, rB_num);
|
| 878 |
|
|
`OR1K_COMP_OPC_LTS:
|
| 879 |
|
|
$sformat(insnstring, "l.sflts r%0d,r%0d",rA_num, rB_num);
|
| 880 |
|
|
`OR1K_COMP_OPC_LES:
|
| 881 |
|
|
$sformat(insnstring, "l.sfles r%0d,r%0d",rA_num, rB_num);
|
| 882 |
|
|
endcase // case (sf_op[2:0])
|
| 883 |
|
|
//$sformat(insnstring, "r%0d,r%0d",rA_num, rB_num);
|
| 884 |
|
|
|
| 885 |
|
|
end
|
| 886 |
|
|
|
| 887 |
|
|
`OR1K_OPCODE_MACI:
|
| 888 |
|
|
begin
|
| 889 |
|
|
$sformat(insnstring, "l.maci r%0d,0x%04h",rA_num,imm_16bit);
|
| 890 |
|
|
end
|
| 891 |
|
|
|
| 892 |
|
|
`OR1K_OPCODE_NOP:
|
| 893 |
|
|
begin
|
| 894 |
|
|
$sformat(insnstring, "l.nop 0x%04h",imm_16bit);
|
| 895 |
|
|
end
|
| 896 |
|
|
|
| 897 |
|
|
`OR1K_OPCODE_SYSTRAPSYNC:
|
| 898 |
|
|
begin
|
| 899 |
|
|
case (insn[`OR1K_SYSTRAPSYNC_OPC_SELECT])
|
| 900 |
|
|
`OR1K_SYSTRAPSYNC_OPC_SYSCALL:
|
| 901 |
|
|
$sformat(insnstring, "l.sys 0x%04h",imm_16bit);
|
| 902 |
|
|
`OR1K_SYSTRAPSYNC_OPC_TRAP:
|
| 903 |
|
|
$sformat(insnstring, "l.trap 0x%04h",imm_16bit);
|
| 904 |
|
|
`OR1K_SYSTRAPSYNC_OPC_MSYNC:
|
| 905 |
|
|
$sformat(insnstring, "l.msync");
|
| 906 |
|
|
`OR1K_SYSTRAPSYNC_OPC_PSYNC:
|
| 907 |
|
|
$sformat(insnstring, "l.psync");
|
| 908 |
|
|
`OR1K_SYSTRAPSYNC_OPC_CSYNC:
|
| 909 |
|
|
$sformat(insnstring, "l.csync");
|
| 910 |
|
|
endcase // case (insn[`OR1K_SYSTRAPSYNC_OPC_SELECT])
|
| 911 |
|
|
end
|
| 912 |
|
|
default:
|
| 913 |
|
|
begin
|
| 914 |
|
|
$sformat(insnstring, "%t: Unknown opcode 0x%0h",$time,opcode);
|
| 915 |
|
|
$sformat(insnstring, "%t: Unknown opcode 0x%0h",$time,opcode);
|
| 916 |
|
|
end
|
| 917 |
|
|
|
| 918 |
|
|
endcase // case (opcode)
|
| 919 |
|
|
|
| 920 |
|
|
end
|
| 921 |
|
|
endtask // mor1k_insn_to_string
|
| 922 |
|
|
|
| 923 |
|
|
endmodule // mor1kx_module
|
