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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [mor1kx-5.0/] [rtl/] [verilog/] [mor1kx_cpu_espresso.v] - Blame information for rev 48

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1 48 alirezamon 
/* ****************************************************************************
2 
  This Source Code Form is subject to the terms of the
3 
  Open Hardware Description License, v. 1.0. If a copy
4 
  of the OHDL was not distributed with this file, You
5 
  can obtain one at http://juliusbaxter.net/ohdl/ohdl.txt
6 
 
7 
  Description: Espresso pipeline CPU module
8 
 
9 
  Copyright (C) 2012 Authors
10 
 
11 
  Author(s): Julius Baxter <juliusbaxter@gmail.com>
12 
 
13 
***************************************************************************** */
14 
 
15 
`include "mor1kx-defines.v"
16 
 
17 
module mor1kx_cpu_espresso
18 
  #(
19 
    parameter OPTION_OPERAND_WIDTH      = 32,
20 
 
21 
    parameter FEATURE_DATACACHE         = "NONE",
22 
    parameter OPTION_DCACHE_BLOCK_WIDTH = 5,
23 
    parameter OPTION_DCACHE_SET_WIDTH   = 9,
24 
    parameter OPTION_DCACHE_WAYS        = 2,
25 
    parameter FEATURE_DMMU              = "NONE",
26 
    parameter FEATURE_DMMU_HW_TLB_RELOAD = "NONE",
27 
    parameter FEATURE_INSTRUCTIONCACHE  = "NONE",
28 
    parameter OPTION_ICACHE_BLOCK_WIDTH = 5,
29 
    parameter OPTION_ICACHE_SET_WIDTH   = 9,
30 
    parameter OPTION_ICACHE_WAYS        = 2,
31 
    parameter FEATURE_IMMU              = "NONE",
32 
    parameter FEATURE_IMMU_HW_TLB_RELOAD = "NONE",
33 
    parameter FEATURE_TIMER             = "ENABLED",
34 
    parameter FEATURE_DEBUGUNIT         = "NONE",
35 
    parameter FEATURE_PERFCOUNTERS      = "NONE",
36 
    parameter FEATURE_MAC               = "NONE",
37 
 
38 
    parameter FEATURE_SYSCALL           = "ENABLED",
39 
    parameter FEATURE_TRAP              = "ENABLED",
40 
    parameter FEATURE_RANGE             = "ENABLED",
41 
 
42 
    parameter FEATURE_PIC               = "ENABLED",
43 
    parameter OPTION_PIC_TRIGGER        = "LEVEL",
44 
    parameter OPTION_PIC_NMI_WIDTH      = 0,
45 
 
46 
    parameter FEATURE_DSX               = "NONE",
47 
    parameter FEATURE_FASTCONTEXTS      = "NONE",
48 
    parameter FEATURE_OVERFLOW          = "NONE",
49 
    parameter FEATURE_CARRY_FLAG        = "ENABLED",
50 
 
51 
    parameter OPTION_RF_ADDR_WIDTH      = 5,
52 
    parameter OPTION_RF_WORDS           = 32,
53 
 
54 
    parameter OPTION_RESET_PC           = {{(OPTION_OPERAND_WIDTH-13){1'b0}},
55 
                                           `OR1K_RESET_VECTOR,8'd0},
56 
 
57 
    parameter FEATURE_MULTIPLIER                = "THREESTAGE",
58 
    parameter FEATURE_DIVIDER           = "NONE",
59 
 
60 
    parameter FEATURE_ADDC              = "NONE",
61 
    parameter FEATURE_SRA               = "ENABLED",
62 
    parameter FEATURE_ROR               = "NONE",
63 
    parameter FEATURE_EXT               = "NONE",
64 
    parameter FEATURE_CMOV              = "NONE",
65 
    parameter FEATURE_FFL1              = "NONE",
66 
    parameter FEATURE_MSYNC             = "NONE",
67 
    parameter FEATURE_PSYNC             = "NONE",
68 
    parameter FEATURE_CSYNC             = "NONE",
69 
 
70 
    parameter FEATURE_CUST1             = "NONE",
71 
    parameter FEATURE_CUST2             = "NONE",
72 
    parameter FEATURE_CUST3             = "NONE",
73 
    parameter FEATURE_CUST4             = "NONE",
74 
    parameter FEATURE_CUST5             = "NONE",
75 
    parameter FEATURE_CUST6             = "NONE",
76 
    parameter FEATURE_CUST7             = "NONE",
77 
    parameter FEATURE_CUST8             = "NONE",
78 
 
79 
    parameter OPTION_SHIFTER            = "BARREL",
80 
 
81 
    parameter FEATURE_MULTICORE = "NONE",
82 
 
83 
    parameter FEATURE_TRACEPORT_EXEC = "NONE"
84 
    )
85 
   (
86 
    input                             clk,
87 
    input                             rst,
88 
 
89 
    // Instruction bus
90 
    input                             ibus_err_i,
91 
    input                             ibus_ack_i,
92 
    input [`OR1K_INSN_WIDTH-1:0]      ibus_dat_i,
93 
    output [OPTION_OPERAND_WIDTH-1:0] ibus_adr_o,
94 
    output                            ibus_req_o,
95 
    output                            ibus_burst_o,
96 
 
97 
    // Data bus
98 
    input                             dbus_err_i,
99 
    input                             dbus_ack_i,
100 
    input [OPTION_OPERAND_WIDTH-1:0]  dbus_dat_i,
101 
    output [OPTION_OPERAND_WIDTH-1:0] dbus_adr_o,
102 
    output [OPTION_OPERAND_WIDTH-1:0] dbus_dat_o,
103 
    output                            dbus_req_o,
104 
    output [3:0]                       dbus_bsel_o,
105 
    output                            dbus_we_o,
106 
    output                            dbus_burst_o,
107 
 
108 
    // Interrupts
109 
    input [31:0]                       irq_i,
110 
 
111 
    // Debug interface
112 
    input [15:0]                       du_addr_i,
113 
    input                             du_stb_i,
114 
    input [OPTION_OPERAND_WIDTH-1:0]  du_dat_i,
115 
    input                             du_we_i,
116 
    output [OPTION_OPERAND_WIDTH-1:0] du_dat_o,
117 
    output                            du_ack_o,
118 
    // Stall control from debug interface
119 
    input                             du_stall_i,
120 
    output                            du_stall_o,
121 
 
122 
    // SPR accesses to external units (cache, mmu, etc.)
123 
    output [15:0]                      spr_bus_addr_o,
124 
    output                            spr_bus_we_o,
125 
    output                            spr_bus_stb_o,
126 
    output [OPTION_OPERAND_WIDTH-1:0] spr_bus_dat_o,
127 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_dmmu_i,
128 
    input                             spr_bus_ack_dmmu_i,
129 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_immu_i,
130 
    input                             spr_bus_ack_immu_i,
131 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_mac_i,
132 
    input                             spr_bus_ack_mac_i,
133 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_pmu_i,
134 
    input                             spr_bus_ack_pmu_i,
135 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_pcu_i,
136 
    input                             spr_bus_ack_pcu_i,
137 
    input [OPTION_OPERAND_WIDTH-1:0]  spr_bus_dat_fpu_i,
138 
    input                             spr_bus_ack_fpu_i,
139 
    output [15:0]                      spr_sr_o,
140 
 
141 
    input [OPTION_OPERAND_WIDTH-1:0]  multicore_coreid_i
142 
   );
143 
 
144 
   wire [OPTION_OPERAND_WIDTH-1:0]   pc_fetch_to_decode;
145 
   wire [`OR1K_INSN_WIDTH-1:0]        insn_fetch_to_decode;
146 
   wire [OPTION_OPERAND_WIDTH-1:0]   pc_decode_to_execute;
147 
   wire [OPTION_OPERAND_WIDTH-1:0]   pc_execute_to_ctrl;
148 
 
149 
   /*AUTOWIRE*/
150 
   // Beginning of automatic wires (for undeclared instantiated-module outputs)
151 
   wire [OPTION_OPERAND_WIDTH-1:0] adder_result_o;// From mor1kx_execute_alu of mor1kx_execute_alu.v
152 
   wire [OPTION_OPERAND_WIDTH-1:0] alu_result_o;// From mor1kx_execute_alu of mor1kx_execute_alu.v
153 
   wire                 alu_valid_o;            // From mor1kx_execute_alu of mor1kx_execute_alu.v
154 
   wire                 carry_clear_o;          // From mor1kx_execute_alu of mor1kx_execute_alu.v
155 
   wire                 carry_o;                // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
156 
   wire                 carry_set_o;            // From mor1kx_execute_alu of mor1kx_execute_alu.v
157 
   wire                 ctrl_branch_occur_o;    // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
158 
   wire [OPTION_OPERAND_WIDTH-1:0] ctrl_branch_target_o;// From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
159 
   wire                 ctrl_mfspr_we_o;        // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
160 
   wire                 decode_adder_do_carry_o;// From mor1kx_decode of mor1kx_decode.v
161 
   wire                 decode_adder_do_sub_o;  // From mor1kx_decode of mor1kx_decode.v
162 
   wire                 decode_except_ibus_err_o;// From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
163 
   wire                 decode_except_illegal_o;// From mor1kx_decode of mor1kx_decode.v
164 
   wire                 decode_except_syscall_o;// From mor1kx_decode of mor1kx_decode.v
165 
   wire                 decode_except_trap_o;   // From mor1kx_decode of mor1kx_decode.v
166 
   wire [`OR1K_IMM_WIDTH-1:0] decode_imm16_o;    // From mor1kx_decode of mor1kx_decode.v
167 
   wire [OPTION_OPERAND_WIDTH-1:0] decode_immediate_o;// From mor1kx_decode of mor1kx_decode.v
168 
   wire                 decode_immediate_sel_o; // From mor1kx_decode of mor1kx_decode.v
169 
   wire [9:0]            decode_immjbr_upper_o;  // From mor1kx_decode of mor1kx_decode.v
170 
   wire [1:0]            decode_lsu_length_o;    // From mor1kx_decode of mor1kx_decode.v
171 
   wire                 decode_lsu_zext_o;      // From mor1kx_decode of mor1kx_decode.v
172 
   wire                 decode_op_add_o;        // From mor1kx_decode of mor1kx_decode.v
173 
   wire                 decode_op_alu_o;        // From mor1kx_decode of mor1kx_decode.v
174 
   wire                 decode_op_bf_o;         // From mor1kx_decode of mor1kx_decode.v
175 
   wire                 decode_op_bnf_o;        // From mor1kx_decode of mor1kx_decode.v
176 
   wire                 decode_op_branch_o;     // From mor1kx_decode of mor1kx_decode.v
177 
   wire                 decode_op_brcond_o;     // From mor1kx_decode of mor1kx_decode.v
178 
   wire                 decode_op_div_o;        // From mor1kx_decode of mor1kx_decode.v
179 
   wire                 decode_op_div_signed_o; // From mor1kx_decode of mor1kx_decode.v
180 
   wire                 decode_op_div_unsigned_o;// From mor1kx_decode of mor1kx_decode.v
181 
   wire                 decode_op_ffl1_o;       // From mor1kx_decode of mor1kx_decode.v
182 
   wire [`OR1K_FPUOP_WIDTH-1:0] decode_op_fpu_o;// From mor1kx_decode of mor1kx_decode.v
183 
   wire                 decode_op_jal_o;        // From mor1kx_decode of mor1kx_decode.v
184 
   wire                 decode_op_jbr_o;        // From mor1kx_decode of mor1kx_decode.v
185 
   wire                 decode_op_jr_o;         // From mor1kx_decode of mor1kx_decode.v
186 
   wire                 decode_op_lsu_load_o;   // From mor1kx_decode of mor1kx_decode.v
187 
   wire                 decode_op_lsu_store_o;  // From mor1kx_decode of mor1kx_decode.v
188 
   wire                 decode_op_mfspr_o;      // From mor1kx_decode of mor1kx_decode.v
189 
   wire                 decode_op_movhi_o;      // From mor1kx_decode of mor1kx_decode.v
190 
   wire                 decode_op_ext_o;        // From mor1kx_decode of mor1kx_decode.v
191 
   wire                 decode_op_msync_o;      // From mor1kx_decode of mor1kx_decode.v
192 
   wire                 decode_op_mtspr_o;      // From mor1kx_decode of mor1kx_decode.v
193 
   wire                 decode_op_mul_o;        // From mor1kx_decode of mor1kx_decode.v
194 
   wire                 decode_op_mul_signed_o; // From mor1kx_decode of mor1kx_decode.v
195 
   wire                 decode_op_mul_unsigned_o;// From mor1kx_decode of mor1kx_decode.v
196 
   wire                 decode_op_rfe_o;        // From mor1kx_decode of mor1kx_decode.v
197 
   wire                 decode_op_setflag_o;    // From mor1kx_decode of mor1kx_decode.v
198 
   wire                 decode_op_shift_o;      // From mor1kx_decode of mor1kx_decode.v
199 
   wire [`OR1K_ALU_OPC_WIDTH-1:0] decode_opc_alu_o;// From mor1kx_decode of mor1kx_decode.v
200 
   wire [`OR1K_ALU_OPC_WIDTH-1:0] decode_opc_alu_secondary_o;// From mor1kx_decode of mor1kx_decode.v
201 
   wire [`OR1K_OPCODE_WIDTH-1:0] decode_opc_insn_o;// From mor1kx_decode of mor1kx_decode.v
202 
   wire                 decode_rf_wb_o;         // From mor1kx_decode of mor1kx_decode.v
203 
   wire [OPTION_RF_ADDR_WIDTH-1:0] decode_rfa_adr_o;// From mor1kx_decode of mor1kx_decode.v
204 
   wire [OPTION_RF_ADDR_WIDTH-1:0] decode_rfb_adr_o;// From mor1kx_decode of mor1kx_decode.v
205 
   wire [OPTION_RF_ADDR_WIDTH-1:0] decode_rfd_adr_o;// From mor1kx_decode of mor1kx_decode.v
206 
   wire                 du_restart_o;           // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
207 
   wire [OPTION_OPERAND_WIDTH-1:0] du_restart_pc_o;// From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
208 
   wire                 exception_taken_o;      // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
209 
   wire                 execute_waiting_o;      // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
210 
   wire                 fetch_advancing_o;      // From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
211 
   wire [OPTION_RF_ADDR_WIDTH-1:0] fetch_rfa_adr_o;// From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
212 
   wire [OPTION_RF_ADDR_WIDTH-1:0] fetch_rfb_adr_o;// From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
213 
   wire                 fetch_take_exception_branch_o;// From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
214 
   wire                 flag_clear_o;           // From mor1kx_execute_alu of mor1kx_execute_alu.v
215 
   wire                 flag_o;                 // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
216 
   wire                 flag_set_o;             // From mor1kx_execute_alu of mor1kx_execute_alu.v
217 
   wire [`OR1K_FPCSR_WIDTH-1:0] fpcsr_o; // From mor1kx_execute_alu of mor1kx_execute_alu.v
218 
   wire                 fpcsr_set_o;            // From mor1kx_execute_alu of mor1kx_execute_alu.v
219 
   wire                 lsu_except_align_o;     // From mor1kx_lsu_espresso of mor1kx_lsu_espresso.v
220 
   wire                 lsu_except_dbus_o;      // From mor1kx_lsu_espresso of mor1kx_lsu_espresso.v
221 
   wire [OPTION_OPERAND_WIDTH-1:0] lsu_result_o;// From mor1kx_lsu_espresso of mor1kx_lsu_espresso.v
222 
   wire                 lsu_valid_o;            // From mor1kx_lsu_espresso of mor1kx_lsu_espresso.v
223 
   wire [OPTION_OPERAND_WIDTH-1:0] mfspr_dat_o;  // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
224 
   wire [OPTION_OPERAND_WIDTH-1:0] mul_result_o;// From mor1kx_execute_alu of mor1kx_execute_alu.v
225 
   wire                 next_fetch_done_o;      // From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
226 
   wire                 overflow_clear_o;       // From mor1kx_execute_alu of mor1kx_execute_alu.v
227 
   wire                 overflow_set_o;         // From mor1kx_execute_alu of mor1kx_execute_alu.v
228 
   wire                 padv_decode_o;          // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
229 
   wire                 padv_execute_o;         // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
230 
   wire                 padv_fetch_o;           // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
231 
   wire [OPTION_OPERAND_WIDTH-1:0] pc_fetch_next_o;// From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
232 
   wire [OPTION_OPERAND_WIDTH-1:0] pc_fetch_o;   // From mor1kx_fetch_espresso of mor1kx_fetch_espresso.v
233 
   wire                 pipeline_flush_o;       // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
234 
   wire [OPTION_OPERAND_WIDTH-1:0] rf_result_o;  // From mor1kx_wb_mux_espresso of mor1kx_wb_mux_espresso.v
235 
   wire                 rf_we_o;                // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
236 
   wire [OPTION_OPERAND_WIDTH-1:0] rfa_o;        // From mor1kx_rf_espresso of mor1kx_rf_espresso.v
237 
   wire [OPTION_OPERAND_WIDTH-1:0] rfb_o;        // From mor1kx_rf_espresso of mor1kx_rf_espresso.v
238 
   wire [OPTION_OPERAND_WIDTH-1:0] spr_npc_o;    // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
239 
   wire [OPTION_OPERAND_WIDTH-1:0] spr_ppc_o;    // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
240 
   wire                 stepping_o;             // From mor1kx_ctrl_espresso of mor1kx_ctrl_espresso.v
241 
   // End of automatics
242 
 
243 
   /* mor1kx_fetch_espresso AUTO_TEMPLATE (
244 
    .padv_i                             (padv_fetch_o),
245 
    .branch_occur_i                     (ctrl_branch_occur_o),
246 
    .branch_dest_i                      (ctrl_branch_target_o),
247 
    .pipeline_flush_i                   (pipeline_flush_o),
248 
    .pc_decode_o                        (pc_fetch_to_decode),
249 
    .decode_insn_o                      (insn_fetch_to_decode),
250 
    .du_restart_pc_i                    (du_restart_pc_o),
251 
    .du_restart_i                       (du_restart_o),
252 
    .fetch_take_exception_branch_i      (fetch_take_exception_branch_o),
253 
    .execute_waiting_i                  (execute_waiting_o),
254 
    .stepping_i                         (stepping_o),
255 
    ); */
256 
   mor1kx_fetch_espresso
257 
     #(
258 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH),
259 
       .OPTION_RF_ADDR_WIDTH(OPTION_RF_ADDR_WIDTH),
260 
       .OPTION_RESET_PC(OPTION_RESET_PC)
261 
       )
262 
     mor1kx_fetch_espresso
263 
     (/*AUTOINST*/
264 
      // Outputs
265 
      .ibus_adr_o                       (ibus_adr_o[OPTION_OPERAND_WIDTH-1:0]),
266 
      .ibus_req_o                       (ibus_req_o),
267 
      .ibus_burst_o                     (ibus_burst_o),
268 
      .decode_insn_o                    (insn_fetch_to_decode),  // Templated
269 
      .next_fetch_done_o                (next_fetch_done_o),
270 
      .fetch_rfa_adr_o                  (fetch_rfa_adr_o[OPTION_RF_ADDR_WIDTH-1:0]),
271 
      .fetch_rfb_adr_o                  (fetch_rfb_adr_o[OPTION_RF_ADDR_WIDTH-1:0]),
272 
      .pc_fetch_o                       (pc_fetch_o[OPTION_OPERAND_WIDTH-1:0]),
273 
      .pc_fetch_next_o                  (pc_fetch_next_o[OPTION_OPERAND_WIDTH-1:0]),
274 
      .decode_except_ibus_err_o         (decode_except_ibus_err_o),
275 
      .fetch_advancing_o                (fetch_advancing_o),
276 
      // Inputs
277 
      .clk                              (clk),
278 
      .rst                              (rst),
279 
      .ibus_err_i                       (ibus_err_i),
280 
      .ibus_ack_i                       (ibus_ack_i),
281 
      .ibus_dat_i                       (ibus_dat_i[`OR1K_INSN_WIDTH-1:0]),
282 
      .padv_i                           (padv_fetch_o),          // Templated
283 
      .branch_occur_i                   (ctrl_branch_occur_o),   // Templated
284 
      .branch_dest_i                    (ctrl_branch_target_o),  // Templated
285 
      .du_restart_i                     (du_restart_o),          // Templated
286 
      .du_restart_pc_i                  (du_restart_pc_o),       // Templated
287 
      .fetch_take_exception_branch_i    (fetch_take_exception_branch_o), // Templated
288 
      .execute_waiting_i                (execute_waiting_o),     // Templated
289 
      .du_stall_i                       (du_stall_i),
290 
      .stepping_i                       (stepping_o));           // Templated
291 
 
292 
   /* mor1kx_decode AUTO_TEMPLATE (
293 
    .decode_insn_i                      (insn_fetch_to_decode),
294 
    .decode_op_lsu_atomic_o             (),
295 
    ); */
296 
   mor1kx_decode
297 
     #(
298 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH),
299 
       .OPTION_RESET_PC(OPTION_RESET_PC),
300 
       .OPTION_RF_ADDR_WIDTH(OPTION_RF_ADDR_WIDTH),
301 
       .FEATURE_SYSCALL(FEATURE_SYSCALL),
302 
       .FEATURE_TRAP(FEATURE_TRAP),
303 
       .FEATURE_RANGE(FEATURE_RANGE),
304 
       .FEATURE_MAC(FEATURE_MAC),
305 
       .FEATURE_MULTIPLIER(FEATURE_MULTIPLIER),
306 
       .FEATURE_DIVIDER(FEATURE_DIVIDER),
307 
       .FEATURE_ADDC(FEATURE_ADDC),
308 
       .FEATURE_SRA(FEATURE_SRA),
309 
       .FEATURE_ROR(FEATURE_ROR),
310 
       .FEATURE_EXT(FEATURE_EXT),
311 
       .FEATURE_CMOV(FEATURE_CMOV),
312 
       .FEATURE_FFL1(FEATURE_FFL1),
313 
       .FEATURE_MSYNC(FEATURE_MSYNC),
314 
       .FEATURE_PSYNC(FEATURE_PSYNC),
315 
       .FEATURE_CSYNC(FEATURE_CSYNC),
316 
       .FEATURE_CUST1(FEATURE_CUST1),
317 
       .FEATURE_CUST2(FEATURE_CUST2),
318 
       .FEATURE_CUST3(FEATURE_CUST3),
319 
       .FEATURE_CUST4(FEATURE_CUST4),
320 
       .FEATURE_CUST5(FEATURE_CUST5),
321 
       .FEATURE_CUST6(FEATURE_CUST6),
322 
       .FEATURE_CUST7(FEATURE_CUST7),
323 
       .FEATURE_CUST8(FEATURE_CUST8)
324 
       )
325 
     mor1kx_decode
326 
     (/*AUTOINST*/
327 
      // Outputs
328 
      .decode_opc_alu_o                 (decode_opc_alu_o[`OR1K_ALU_OPC_WIDTH-1:0]),
329 
      .decode_opc_alu_secondary_o       (decode_opc_alu_secondary_o[`OR1K_ALU_OPC_WIDTH-1:0]),
330 
      .decode_imm16_o                   (decode_imm16_o[`OR1K_IMM_WIDTH-1:0]),
331 
      .decode_immediate_o               (decode_immediate_o[OPTION_OPERAND_WIDTH-1:0]),
332 
      .decode_immediate_sel_o           (decode_immediate_sel_o),
333 
      .decode_immjbr_upper_o            (decode_immjbr_upper_o[9:0]),
334 
      .decode_rfd_adr_o                 (decode_rfd_adr_o[OPTION_RF_ADDR_WIDTH-1:0]),
335 
      .decode_rfa_adr_o                 (decode_rfa_adr_o[OPTION_RF_ADDR_WIDTH-1:0]),
336 
      .decode_rfb_adr_o                 (decode_rfb_adr_o[OPTION_RF_ADDR_WIDTH-1:0]),
337 
      .decode_rf_wb_o                   (decode_rf_wb_o),
338 
      .decode_op_jbr_o                  (decode_op_jbr_o),
339 
      .decode_op_jr_o                   (decode_op_jr_o),
340 
      .decode_op_jal_o                  (decode_op_jal_o),
341 
      .decode_op_bf_o                   (decode_op_bf_o),
342 
      .decode_op_bnf_o                  (decode_op_bnf_o),
343 
      .decode_op_brcond_o               (decode_op_brcond_o),
344 
      .decode_op_branch_o               (decode_op_branch_o),
345 
      .decode_op_alu_o                  (decode_op_alu_o),
346 
      .decode_op_lsu_load_o             (decode_op_lsu_load_o),
347 
      .decode_op_lsu_store_o            (decode_op_lsu_store_o),
348 
      .decode_op_lsu_atomic_o           (),                      // Templated
349 
      .decode_lsu_length_o              (decode_lsu_length_o[1:0]),
350 
      .decode_lsu_zext_o                (decode_lsu_zext_o),
351 
      .decode_op_mfspr_o                (decode_op_mfspr_o),
352 
      .decode_op_mtspr_o                (decode_op_mtspr_o),
353 
      .decode_op_rfe_o                  (decode_op_rfe_o),
354 
      .decode_op_setflag_o              (decode_op_setflag_o),
355 
      .decode_op_add_o                  (decode_op_add_o),
356 
      .decode_op_mul_o                  (decode_op_mul_o),
357 
      .decode_op_mul_signed_o           (decode_op_mul_signed_o),
358 
      .decode_op_mul_unsigned_o         (decode_op_mul_unsigned_o),
359 
      .decode_op_div_o                  (decode_op_div_o),
360 
      .decode_op_div_signed_o           (decode_op_div_signed_o),
361 
      .decode_op_div_unsigned_o         (decode_op_div_unsigned_o),
362 
      .decode_op_shift_o                (decode_op_shift_o),
363 
      .decode_op_ffl1_o                 (decode_op_ffl1_o),
364 
      .decode_op_movhi_o                (decode_op_movhi_o),
365 
      .decode_op_ext_o                  (decode_op_ext_o),
366 
      .decode_op_msync_o                (decode_op_msync_o),
367 
      .decode_op_fpu_o                  (decode_op_fpu_o[`OR1K_FPUOP_WIDTH-1:0]),
368 
      .decode_adder_do_sub_o            (decode_adder_do_sub_o),
369 
      .decode_adder_do_carry_o          (decode_adder_do_carry_o),
370 
      .decode_except_illegal_o          (decode_except_illegal_o),
371 
      .decode_except_syscall_o          (decode_except_syscall_o),
372 
      .decode_except_trap_o             (decode_except_trap_o),
373 
      .decode_opc_insn_o                (decode_opc_insn_o[`OR1K_OPCODE_WIDTH-1:0]),
374 
      // Inputs
375 
      .clk                              (clk),
376 
      .rst                              (rst),
377 
      .decode_insn_i                    (insn_fetch_to_decode));         // Templated
378 
 
379 
   /* mor1kx_execute_alu AUTO_TEMPLATE (
380 
    .padv_decode_i                      (padv_decode_o),
381 
    .padv_execute_i                     (padv_execute_o),
382 
    .padv_ctrl_i                        (1'b1),
383 
    .pipeline_flush_i                   (pipeline_flush_o),
384 
    .opc_alu_i                          (decode_opc_alu_o),
385 
    .opc_alu_secondary_i                (decode_opc_alu_secondary_o),
386 
    .imm16_i                            (decode_imm16_o),
387 
    .immediate_i                        (decode_immediate_o),
388 
    .immediate_sel_i                    (decode_immediate_sel_o),
389 
    .decode_valid_i                     (padv_decode_o),
390 
    .decode_immediate_i                 (decode_immediate_o),
391 
    .decode_immediate_sel_i             (decode_immediate_sel_o),
392 
    .decode_op_mul_i                    (decode_op_mul_o),
393 
    .op_alu_i                           (decode_op_alu_o),
394 
    .op_add_i                           (decode_op_add_o),
395 
    .op_mul_i                           (decode_op_mul_o),
396 
    .op_mul_signed_i                    (decode_op_mul_signed_o),
397 
    .op_mul_unsigned_i                  (decode_op_mul_unsigned_o),
398 
    .op_div_i                           (decode_op_div_o),
399 
    .op_div_signed_i                    (decode_op_div_signed_o),
400 
    .op_div_unsigned_i                  (decode_op_div_unsigned_o),
401 
    .op_shift_i                         (decode_op_shift_o),
402 
    .op_ffl1_i                          (decode_op_ffl1_o),
403 
    .op_setflag_i                       (decode_op_setflag_o),
404 
    .op_mtspr_i                         (decode_op_mtspr_o),
405 
    .op_mfspr_i                         (decode_op_mfspr_o),
406 
    .op_movhi_i                         (decode_op_movhi_o),
407 
    .op_ext_i                           (decode_op_ext_o),
408 
    .op_jbr_i                           (decode_op_jbr_o),
409 
    .op_jr_i                            (decode_op_jr_o),
410 
    .op_fpu_i                           (decode_op_fpu_o),
411 
    .fpu_round_mode_i                   (2'b00),
412 
    .immjbr_upper_i                     (decode_immjbr_upper_o),
413 
    .pc_execute_i                       (spr_ppc_o),
414 
    .adder_do_sub_i                     (decode_adder_do_sub_o),
415 
    .adder_do_carry_i                   (decode_adder_do_carry_o),
416 
    .decode_rfa_i                       (rfa_o),
417 
    .decode_rfb_i                       (rfb_o),
418 
    .rfa_i                              (rfa_o),
419 
    .rfb_i                              (rfb_o),
420 
    .flag_i                             (flag_o),
421 
    .carry_i                            (carry_o),
422 
    ); */
423 
   mor1kx_execute_alu
424 
     #(
425 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH),
426 
       .FEATURE_MULTIPLIER(FEATURE_MULTIPLIER),
427 
       .FEATURE_DIVIDER(FEATURE_DIVIDER),
428 
       .FEATURE_ADDC(FEATURE_ADDC),
429 
       .FEATURE_SRA(FEATURE_SRA),
430 
       .FEATURE_ROR(FEATURE_ROR),
431 
       .FEATURE_EXT(FEATURE_EXT),
432 
       .FEATURE_CMOV(FEATURE_CMOV),
433 
       .FEATURE_FFL1(FEATURE_FFL1),
434 
       .FEATURE_CUST1(FEATURE_CUST1),
435 
       .FEATURE_CUST2(FEATURE_CUST2),
436 
       .FEATURE_CUST3(FEATURE_CUST3),
437 
       .FEATURE_CUST4(FEATURE_CUST4),
438 
       .FEATURE_CUST5(FEATURE_CUST5),
439 
       .FEATURE_CUST6(FEATURE_CUST6),
440 
       .FEATURE_CUST7(FEATURE_CUST7),
441 
       .FEATURE_CUST8(FEATURE_CUST8),
442 
       .OPTION_SHIFTER(OPTION_SHIFTER)
443 
       )
444 
     mor1kx_execute_alu
445 
     (/*AUTOINST*/
446 
      // Outputs
447 
      .flag_set_o                       (flag_set_o),
448 
      .flag_clear_o                     (flag_clear_o),
449 
      .carry_set_o                      (carry_set_o),
450 
      .carry_clear_o                    (carry_clear_o),
451 
      .overflow_set_o                   (overflow_set_o),
452 
      .overflow_clear_o                 (overflow_clear_o),
453 
      .fpcsr_o                          (fpcsr_o[`OR1K_FPCSR_WIDTH-1:0]),
454 
      .fpcsr_set_o                      (fpcsr_set_o),
455 
      .alu_result_o                     (alu_result_o[OPTION_OPERAND_WIDTH-1:0]),
456 
      .alu_valid_o                      (alu_valid_o),
457 
      .mul_result_o                     (mul_result_o[OPTION_OPERAND_WIDTH-1:0]),
458 
      .adder_result_o                   (adder_result_o[OPTION_OPERAND_WIDTH-1:0]),
459 
      // Inputs
460 
      .clk                              (clk),
461 
      .rst                              (rst),
462 
      .padv_decode_i                    (padv_decode_o),         // Templated
463 
      .padv_execute_i                   (padv_execute_o),        // Templated
464 
      .padv_ctrl_i                      (1'b1),                  // Templated
465 
      .pipeline_flush_i                 (pipeline_flush_o),      // Templated
466 
      .opc_alu_i                        (decode_opc_alu_o),      // Templated
467 
      .opc_alu_secondary_i              (decode_opc_alu_secondary_o), // Templated
468 
      .imm16_i                          (decode_imm16_o),        // Templated
469 
      .immediate_i                      (decode_immediate_o),    // Templated
470 
      .immediate_sel_i                  (decode_immediate_sel_o), // Templated
471 
      .decode_immediate_i               (decode_immediate_o),    // Templated
472 
      .decode_immediate_sel_i           (decode_immediate_sel_o), // Templated
473 
      .decode_valid_i                   (padv_decode_o),         // Templated
474 
      .decode_op_mul_i                  (decode_op_mul_o),       // Templated
475 
      .op_alu_i                         (decode_op_alu_o),       // Templated
476 
      .op_add_i                         (decode_op_add_o),       // Templated
477 
      .op_mul_i                         (decode_op_mul_o),       // Templated
478 
      .op_mul_signed_i                  (decode_op_mul_signed_o), // Templated
479 
      .op_mul_unsigned_i                (decode_op_mul_unsigned_o), // Templated
480 
      .op_div_i                         (decode_op_div_o),       // Templated
481 
      .op_div_signed_i                  (decode_op_div_signed_o), // Templated
482 
      .op_div_unsigned_i                (decode_op_div_unsigned_o), // Templated
483 
      .op_shift_i                       (decode_op_shift_o),     // Templated
484 
      .op_ffl1_i                        (decode_op_ffl1_o),      // Templated
485 
      .op_setflag_i                     (decode_op_setflag_o),   // Templated
486 
      .op_mtspr_i                       (decode_op_mtspr_o),     // Templated
487 
      .op_mfspr_i                       (decode_op_mfspr_o),     // Templated
488 
      .op_movhi_i                       (decode_op_movhi_o),     // Templated
489 
      .op_ext_i                         (decode_op_ext_o),       // Templated
490 
      .op_fpu_i                         (decode_op_fpu_o),       // Templated
491 
      .fpu_round_mode_i                 (2'b00),                 // Templated
492 
      .op_jbr_i                         (decode_op_jbr_o),       // Templated
493 
      .op_jr_i                          (decode_op_jr_o),        // Templated
494 
      .immjbr_upper_i                   (decode_immjbr_upper_o), // Templated
495 
      .pc_execute_i                     (spr_ppc_o),             // Templated
496 
      .adder_do_sub_i                   (decode_adder_do_sub_o), // Templated
497 
      .adder_do_carry_i                 (decode_adder_do_carry_o), // Templated
498 
      .decode_rfa_i                     (rfa_o),                 // Templated
499 
      .decode_rfb_i                     (rfb_o),                 // Templated
500 
      .rfa_i                            (rfa_o),                 // Templated
501 
      .rfb_i                            (rfb_o),                 // Templated
502 
      .flag_i                           (flag_o),                // Templated
503 
      .carry_i                          (carry_o));              // Templated
504 
 
505 
 
506 
   /* mor1kx_lsu_espresso AUTO_TEMPLATE (
507 
    .padv_fetch_i                       (padv_fetch_o),
508 
    .lsu_adr_i                          (adder_result_o),
509 
    .rfb_i                              (rfb_o),
510 
    .op_lsu_load_i                      (decode_op_lsu_load_o),
511 
    .op_lsu_store_i                     (decode_op_lsu_store_o),
512 
    .lsu_length_i                       (decode_lsu_length_o),
513 
    .lsu_zext_i                         (decode_lsu_zext_o),
514 
    .exception_taken_i                  (exception_taken_o),
515 
    .du_restart_i                       (du_restart_o),
516 
    .stepping_i                         (stepping_o),
517 
    .next_fetch_done_i                  (next_fetch_done_o),
518 
    ); */
519 
   mor1kx_lsu_espresso
520 
     #(
521 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH)
522 
       )
523 
     mor1kx_lsu_espresso
524 
     (/*AUTOINST*/
525 
      // Outputs
526 
      .lsu_result_o                     (lsu_result_o[OPTION_OPERAND_WIDTH-1:0]),
527 
      .lsu_valid_o                      (lsu_valid_o),
528 
      .lsu_except_dbus_o                (lsu_except_dbus_o),
529 
      .lsu_except_align_o               (lsu_except_align_o),
530 
      .dbus_adr_o                       (dbus_adr_o[OPTION_OPERAND_WIDTH-1:0]),
531 
      .dbus_req_o                       (dbus_req_o),
532 
      .dbus_dat_o                       (dbus_dat_o[OPTION_OPERAND_WIDTH-1:0]),
533 
      .dbus_bsel_o                      (dbus_bsel_o[3:0]),
534 
      .dbus_we_o                        (dbus_we_o),
535 
      .dbus_burst_o                     (dbus_burst_o),
536 
      // Inputs
537 
      .clk                              (clk),
538 
      .rst                              (rst),
539 
      .padv_fetch_i                     (padv_fetch_o),          // Templated
540 
      .lsu_adr_i                        (adder_result_o),        // Templated
541 
      .rfb_i                            (rfb_o),                 // Templated
542 
      .op_lsu_load_i                    (decode_op_lsu_load_o),  // Templated
543 
      .op_lsu_store_i                   (decode_op_lsu_store_o), // Templated
544 
      .lsu_length_i                     (decode_lsu_length_o),   // Templated
545 
      .lsu_zext_i                       (decode_lsu_zext_o),     // Templated
546 
      .exception_taken_i                (exception_taken_o),     // Templated
547 
      .du_restart_i                     (du_restart_o),          // Templated
548 
      .stepping_i                       (stepping_o),            // Templated
549 
      .next_fetch_done_i                (next_fetch_done_o),     // Templated
550 
      .dbus_err_i                       (dbus_err_i),
551 
      .dbus_ack_i                       (dbus_ack_i),
552 
      .dbus_dat_i                       (dbus_dat_i[OPTION_OPERAND_WIDTH-1:0]));
553 
 
554 
 
555 
   /* mor1kx_wb_mux_espresso AUTO_TEMPLATE (
556 
    .alu_result_i                       (alu_result_o),
557 
    .lsu_result_i                       (lsu_result_o),
558 
    .spr_i                              (mfspr_dat_o),
559 
    .op_jal_i                           (decode_op_jal_o),
560 
    .op_lsu_load_i                      (decode_op_lsu_load_o),
561 
    .ppc_i                              (spr_ppc_o),
562 
    .op_mfspr_i                         (decode_op_mfspr_o),
563 
    .pc_fetch_next_i                    (pc_fetch_next_o),
564 
    ); */
565 
   mor1kx_wb_mux_espresso
566 
     #(
567 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH)
568 
       )
569 
     mor1kx_wb_mux_espresso
570 
     (/*AUTOINST*/
571 
      // Outputs
572 
      .rf_result_o                      (rf_result_o[OPTION_OPERAND_WIDTH-1:0]),
573 
      // Inputs
574 
      .clk                              (clk),
575 
      .rst                              (rst),
576 
      .alu_result_i                     (alu_result_o),          // Templated
577 
      .lsu_result_i                     (lsu_result_o),          // Templated
578 
      .ppc_i                            (spr_ppc_o),             // Templated
579 
      .pc_fetch_next_i                  (pc_fetch_next_o),       // Templated
580 
      .spr_i                            (mfspr_dat_o),           // Templated
581 
      .op_jal_i                         (decode_op_jal_o),       // Templated
582 
      .op_lsu_load_i                    (decode_op_lsu_load_o),  // Templated
583 
      .op_mfspr_i                       (decode_op_mfspr_o));    // Templated
584 
 
585 
   /* mor1kx_rf_espresso AUTO_TEMPLATE (
586 
    .rf_we_i                            (rf_we_o),
587 
    .rf_re_i                            (fetch_advancing_o),
588 
    .rfd_adr_i                          (decode_rfd_adr_o),
589 
    .rfa_adr_i                          (fetch_rfa_adr_o),
590 
    .rfb_adr_i                          (fetch_rfb_adr_o),
591 
    .result_i                           (rf_result_o),
592 
    ); */
593 
   mor1kx_rf_espresso
594 
     #(
595 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH),
596 
       .OPTION_RF_ADDR_WIDTH(OPTION_RF_ADDR_WIDTH),
597 
       .OPTION_RF_WORDS(OPTION_RF_WORDS)
598 
       )
599 
     mor1kx_rf_espresso
600 
     (/*AUTOINST*/
601 
      // Outputs
602 
      .rfa_o                            (rfa_o[OPTION_OPERAND_WIDTH-1:0]),
603 
      .rfb_o                            (rfb_o[OPTION_OPERAND_WIDTH-1:0]),
604 
      // Inputs
605 
      .clk                              (clk),
606 
      .rst                              (rst),
607 
      .rfd_adr_i                        (decode_rfd_adr_o),      // Templated
608 
      .rfa_adr_i                        (fetch_rfa_adr_o),       // Templated
609 
      .rfb_adr_i                        (fetch_rfb_adr_o),       // Templated
610 
      .rf_we_i                          (rf_we_o),               // Templated
611 
      .rf_re_i                          (fetch_advancing_o),     // Templated
612 
      .result_i                         (rf_result_o));          // Templated
613 
 
614 
 
615 
   /* Debug signals required for the debug monitor */
616 
   function [OPTION_OPERAND_WIDTH-1:0] get_gpr;
617 
      // verilator public
618 
      input [4:0]                   gpr_num;
619 
      begin
620 
         // If we're writing, the value won't be in the GPR yet, so snoop
621 
         // it off the result in line.
622 
         if (rf_we_o)
623 
           get_gpr = rf_result_o;
624 
         else
625 
           get_gpr = mor1kx_rf_espresso.rfa.mem[gpr_num];
626 
      end
627 
   endfunction
628 
 
629 
`ifndef SYNTHESIS
630 
// synthesis translate_off
631 
   task set_gpr;
632 
      // verilator public
633 
      input [4:0] gpr_num;
634 
      input [OPTION_OPERAND_WIDTH-1:0] gpr_value;
635 
      begin
636 
         mor1kx_rf_espresso.rfa.mem[gpr_num] = gpr_value;
637 
         mor1kx_rf_espresso.rfb.mem[gpr_num] = gpr_value;
638 
      end
639 
   endtask
640 
// synthesis translate_on
641 
`endif
642 
 
643 
   /* mor1kx_ctrl_espresso AUTO_TEMPLATE (
644 
    .ctrl_alu_result_i          (alu_result_o),
645 
    .ctrl_rfb_i                 (rfb_o),
646 
    .ctrl_flag_set_i            (flag_set_o),
647 
    .ctrl_flag_clear_i          (flag_clear_o),
648 
    .pc_ctrl_i                  (),
649 
    .pc_fetch_i                 (pc_fetch_o),
650 
    .ctrl_opc_insn_i            (decode_opc_insn_o),
651 
    .ctrl_branch_target_i       (ctrl_branch_target_o),
652 
    .op_lsu_load_i              (decode_op_lsu_load_o),
653 
    .op_lsu_store_i             (decode_op_lsu_store_o),
654 
    .alu_valid_i                (alu_valid_o),
655 
    .lsu_valid_i                (lsu_valid_o),
656 
    .op_jr_i                    (decode_op_jr_o),
657 
    .op_jbr_i                   (decode_op_jbr_o),
658 
    .except_ibus_err_i          (decode_except_ibus_err_o),
659 
    .except_illegal_i           (decode_except_illegal_o),
660 
    .except_syscall_i           (decode_except_syscall_o),
661 
    .except_dbus_i              (lsu_except_dbus_o),
662 
    .except_trap_i              (decode_except_trap_o),
663 
    .except_align_i             (lsu_except_align_o),
664 
    .next_fetch_done_i          (next_fetch_done_o),
665 
    .execute_valid_i            (execute_valid_o),
666 
    .execute_waiting_i          (execute_waiting_o),
667 
    .fetch_branch_taken_i       (fetch_branch_taken_o),
668 
    .rf_wb_i                    (decode_rf_wb_o),
669 
    .fetch_advancing_i          (fetch_advancing_o),
670 
    .carry_set_i                (carry_set_o),
671 
    .carry_clear_i              (carry_clear_o),
672 
    .overflow_set_i             (overflow_set_o),
673 
    .overflow_clear_i           (overflow_clear_o),
674 
    .spr_bus_dat_dc_i           (),
675 
    .spr_bus_ack_dc_i           (),
676 
    .spr_bus_dat_ic_i           (),
677 
    .spr_bus_ack_ic_i           (),
678 
    ); */
679 
   mor1kx_ctrl_espresso
680 
     #(
681 
       .OPTION_OPERAND_WIDTH(OPTION_OPERAND_WIDTH),
682 
       .OPTION_RESET_PC(OPTION_RESET_PC),
683 
       .FEATURE_PIC(FEATURE_PIC),
684 
       .FEATURE_TIMER(FEATURE_TIMER),
685 
       .OPTION_PIC_TRIGGER(OPTION_PIC_TRIGGER),
686 
       .OPTION_PIC_NMI_WIDTH(OPTION_PIC_NMI_WIDTH),
687 
       .FEATURE_DSX(FEATURE_DSX),
688 
       .FEATURE_FASTCONTEXTS(FEATURE_FASTCONTEXTS),
689 
       .FEATURE_OVERFLOW(FEATURE_OVERFLOW),
690 
       .FEATURE_DATACACHE(FEATURE_DATACACHE),
691 
       .OPTION_DCACHE_BLOCK_WIDTH(OPTION_DCACHE_BLOCK_WIDTH),
692 
       .OPTION_DCACHE_SET_WIDTH(OPTION_DCACHE_SET_WIDTH),
693 
       .OPTION_DCACHE_WAYS(OPTION_DCACHE_WAYS),
694 
       .FEATURE_DMMU(FEATURE_DMMU),
695 
       .FEATURE_INSTRUCTIONCACHE(FEATURE_INSTRUCTIONCACHE),
696 
       .OPTION_ICACHE_BLOCK_WIDTH(OPTION_ICACHE_BLOCK_WIDTH),
697 
       .OPTION_ICACHE_SET_WIDTH(OPTION_ICACHE_SET_WIDTH),
698 
       .OPTION_ICACHE_WAYS(OPTION_ICACHE_WAYS),
699 
       .FEATURE_IMMU(FEATURE_IMMU),
700 
       .FEATURE_DEBUGUNIT(FEATURE_DEBUGUNIT),
701 
       .FEATURE_PERFCOUNTERS(FEATURE_PERFCOUNTERS),
702 
       .FEATURE_MAC(FEATURE_MAC),
703 
       .FEATURE_MULTICORE(FEATURE_MULTICORE),
704 
       .FEATURE_SYSCALL(FEATURE_SYSCALL),
705 
       .FEATURE_TRAP(FEATURE_TRAP),
706 
       .FEATURE_RANGE(FEATURE_RANGE)
707 
       )
708 
     mor1kx_ctrl_espresso
709 
       (/*AUTOINST*/
710 
        // Outputs
711 
        .flag_o                         (flag_o),
712 
        .spr_npc_o                      (spr_npc_o[OPTION_OPERAND_WIDTH-1:0]),
713 
        .spr_ppc_o                      (spr_ppc_o[OPTION_OPERAND_WIDTH-1:0]),
714 
        .mfspr_dat_o                    (mfspr_dat_o[OPTION_OPERAND_WIDTH-1:0]),
715 
        .ctrl_mfspr_we_o                (ctrl_mfspr_we_o),
716 
        .carry_o                        (carry_o),
717 
        .pipeline_flush_o               (pipeline_flush_o),
718 
        .padv_fetch_o                   (padv_fetch_o),
719 
        .padv_decode_o                  (padv_decode_o),
720 
        .padv_execute_o                 (padv_execute_o),
721 
        .fetch_take_exception_branch_o  (fetch_take_exception_branch_o),
722 
        .exception_taken_o              (exception_taken_o),
723 
        .execute_waiting_o              (execute_waiting_o),
724 
        .stepping_o                     (stepping_o),
725 
        .du_dat_o                       (du_dat_o[OPTION_OPERAND_WIDTH-1:0]),
726 
        .du_ack_o                       (du_ack_o),
727 
        .du_stall_o                     (du_stall_o),
728 
        .du_restart_pc_o                (du_restart_pc_o[OPTION_OPERAND_WIDTH-1:0]),
729 
        .du_restart_o                   (du_restart_o),
730 
        .spr_bus_addr_o                 (spr_bus_addr_o[15:0]),
731 
        .spr_bus_we_o                   (spr_bus_we_o),
732 
        .spr_bus_stb_o                  (spr_bus_stb_o),
733 
        .spr_bus_dat_o                  (spr_bus_dat_o[OPTION_OPERAND_WIDTH-1:0]),
734 
        .spr_sr_o                       (spr_sr_o[15:0]),
735 
        .ctrl_branch_target_o           (ctrl_branch_target_o[OPTION_OPERAND_WIDTH-1:0]),
736 
        .ctrl_branch_occur_o            (ctrl_branch_occur_o),
737 
        .rf_we_o                        (rf_we_o),
738 
        // Inputs
739 
        .clk                            (clk),
740 
        .rst                            (rst),
741 
        .ctrl_alu_result_i              (alu_result_o),          // Templated
742 
        .ctrl_rfb_i                     (rfb_o),                 // Templated
743 
        .ctrl_flag_set_i                (flag_set_o),            // Templated
744 
        .ctrl_flag_clear_i              (flag_clear_o),          // Templated
745 
        .ctrl_opc_insn_i                (decode_opc_insn_o),     // Templated
746 
        .pc_fetch_i                     (pc_fetch_o),            // Templated
747 
        .fetch_advancing_i              (fetch_advancing_o),     // Templated
748 
        .except_ibus_err_i              (decode_except_ibus_err_o), // Templated
749 
        .except_illegal_i               (decode_except_illegal_o), // Templated
750 
        .except_syscall_i               (decode_except_syscall_o), // Templated
751 
        .except_dbus_i                  (lsu_except_dbus_o),     // Templated
752 
        .except_trap_i                  (decode_except_trap_o),  // Templated
753 
        .except_align_i                 (lsu_except_align_o),    // Templated
754 
        .next_fetch_done_i              (next_fetch_done_o),     // Templated
755 
        .alu_valid_i                    (alu_valid_o),           // Templated
756 
        .lsu_valid_i                    (lsu_valid_o),           // Templated
757 
        .op_lsu_load_i                  (decode_op_lsu_load_o),  // Templated
758 
        .op_lsu_store_i                 (decode_op_lsu_store_o), // Templated
759 
        .op_jr_i                        (decode_op_jr_o),        // Templated
760 
        .op_jbr_i                       (decode_op_jbr_o),       // Templated
761 
        .irq_i                          (irq_i[31:0]),
762 
        .carry_set_i                    (carry_set_o),           // Templated
763 
        .carry_clear_i                  (carry_clear_o),         // Templated
764 
        .overflow_set_i                 (overflow_set_o),        // Templated
765 
        .overflow_clear_i               (overflow_clear_o),      // Templated
766 
        .du_addr_i                      (du_addr_i[15:0]),
767 
        .du_stb_i                       (du_stb_i),
768 
        .du_dat_i                       (du_dat_i[OPTION_OPERAND_WIDTH-1:0]),
769 
        .du_we_i                        (du_we_i),
770 
        .du_stall_i                     (du_stall_i),
771 
        .spr_bus_dat_dc_i               (),                      // Templated
772 
        .spr_bus_ack_dc_i               (),                      // Templated
773 
        .spr_bus_dat_ic_i               (),                      // Templated
774 
        .spr_bus_ack_ic_i               (),                      // Templated
775 
        .spr_bus_dat_dmmu_i             (spr_bus_dat_dmmu_i[OPTION_OPERAND_WIDTH-1:0]),
776 
        .spr_bus_ack_dmmu_i             (spr_bus_ack_dmmu_i),
777 
        .spr_bus_dat_immu_i             (spr_bus_dat_immu_i[OPTION_OPERAND_WIDTH-1:0]),
778 
        .spr_bus_ack_immu_i             (spr_bus_ack_immu_i),
779 
        .spr_bus_dat_mac_i              (spr_bus_dat_mac_i[OPTION_OPERAND_WIDTH-1:0]),
780 
        .spr_bus_ack_mac_i              (spr_bus_ack_mac_i),
781 
        .spr_bus_dat_pmu_i              (spr_bus_dat_pmu_i[OPTION_OPERAND_WIDTH-1:0]),
782 
        .spr_bus_ack_pmu_i              (spr_bus_ack_pmu_i),
783 
        .spr_bus_dat_pcu_i              (spr_bus_dat_pcu_i[OPTION_OPERAND_WIDTH-1:0]),
784 
        .spr_bus_ack_pcu_i              (spr_bus_ack_pcu_i),
785 
        .spr_bus_dat_fpu_i              (spr_bus_dat_fpu_i[OPTION_OPERAND_WIDTH-1:0]),
786 
        .spr_bus_ack_fpu_i              (spr_bus_ack_fpu_i),
787 
        .multicore_coreid_i             (multicore_coreid_i[OPTION_OPERAND_WIDTH-1:0]),
788 
        .rf_wb_i                        (decode_rf_wb_o));       // Templated
789 
 
790 
endmodule // mor1kx_cpu_espresso

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