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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [new_lm32/] [rtl/] [jtag_tap_spartan6.v] - Blame information for rev 48

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Line No. Rev Author Line
1 48 alirezamon 
/*
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 * LatticeMico32
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 * JTAG Test Access Port For Xilinx Sparan-6 Devices
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 *
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 * Copyright (C) 2010 Michael Walle
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 * All rights reserved.
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * 1. Redistributions of source code must retain the above copyright
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 *    notice, this list of conditions and the following disclaimer.
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 * 2. Redistributions in binary form must reproduce the above copyright
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 *    notice, this list of conditions and the following disclaimer in the
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 *    documentation and/or other materials provided with the distribution.
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 * 3. The name of the author may not be used to endorse or promote products
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 *    derived from this software without specific prior written permission.
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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module jtag_tap(
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        output tck,
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        output tdi,
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        input tdo,
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        output shift,
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        output update,
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        output reset
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);
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wire g_shift;
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wire g_update;
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wire sel;
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assign shift = g_shift & sel;
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assign update = g_update & sel;
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BSCAN_SPARTAN6 #(
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        .JTAG_CHAIN(1)
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) bscan (
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        .CAPTURE(),
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        .DRCK(tck),
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        .RESET(reset),
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        .RUNTEST(),
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        .SEL(sel),
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        .SHIFT(g_shift),
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        .TCK(),
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        .TDI(tdi),
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        .TMS(),
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        .UPDATE(g_update),
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        .TDO(tdo)
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);
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endmodule

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