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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [new_lm32/] [rtl/] [lm32_shifter.v] - Blame information for rev 48

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//   ==================================================================
//   >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
//   ------------------------------------------------------------------
//   Copyright (c) 2006-2011 by Lattice Semiconductor Corporation
//   ALL RIGHTS RESERVED
//   ------------------------------------------------------------------
//
//   IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.
//
//   Permission:
//
//      Lattice Semiconductor grants permission to use this code
//      pursuant to the terms of the Lattice Semiconductor Corporation
//      Open Source License Agreement.
//
//   Disclaimer:
//
//      Lattice Semiconductor provides no warranty regarding the use or
//      functionality of this code. It is the user's responsibility to
//      verify the user's design for consistency and functionality through
//      the use of formal verification methods.
//
//   --------------------------------------------------------------------
//
//                  Lattice Semiconductor Corporation
//                  5555 NE Moore Court
//                  Hillsboro, OR 97214
//                  U.S.A
//
//                  TEL: 1-800-Lattice (USA and Canada)
//                         503-286-8001 (other locations)
//
//                  web: http://www.latticesemi.com/
//                  email: techsupport@latticesemi.com
//
//   --------------------------------------------------------------------
//                         FILE DETAILS
// Project          : LatticeMico32
// File             : lm32_shifter.v
// Title            : Barrel shifter
// Dependencies     : lm32_include.v
// Version          : 6.1.17
//                  : Initial Release
// Version          : 7.0SP2, 3.0
//                  : No Change
// Version          : 3.1
//                  : No Change
// =============================================================================
 
`include "lm32_include.v"
 
/////////////////////////////////////////////////////
// Module interface
/////////////////////////////////////////////////////
 
module lm32_shifter (
    // ----- Inputs -------
    clk_i,
    rst_i,
    stall_x,
    direction_x,
    sign_extend_x,
    operand_0_x,
    operand_1_x,
    // ----- Outputs -------
    shifter_result_m
    );
 
/////////////////////////////////////////////////////
// Inputs
/////////////////////////////////////////////////////
 
input clk_i;                                // Clock
input rst_i;                                // Reset
input stall_x;                              // Stall instruction in X stage
input direction_x;                          // Direction to shift
input sign_extend_x;                        // Whether shift is arithmetic (1'b1) or logical (1'b0)
input [`LM32_WORD_RNG] operand_0_x;         // Operand to shift
input [`LM32_WORD_RNG] operand_1_x;         // Operand that specifies how many bits to shift by
 
/////////////////////////////////////////////////////
// Outputs
/////////////////////////////////////////////////////
 
output [`LM32_WORD_RNG] shifter_result_m;   // Result of shift
wire   [`LM32_WORD_RNG] shifter_result_m;
 
/////////////////////////////////////////////////////
// Internal nets and registers
/////////////////////////////////////////////////////
 
reg direction_m;
reg [`LM32_WORD_RNG] left_shift_result;
reg [`LM32_WORD_RNG] right_shift_result;
reg [`LM32_WORD_RNG] left_shift_operand;
wire [`LM32_WORD_RNG] right_shift_operand;
wire fill_value;
wire [`LM32_WORD_RNG] right_shift_in;
 
integer shift_idx_0;
integer shift_idx_1;
 
/////////////////////////////////////////////////////
// Combinational Logic
/////////////////////////////////////////////////////
 
// Select operands - To perform a left shift, we reverse the bits and perform a right shift
always @(*)
begin
    for (shift_idx_0 = 0; shift_idx_0 < `LM32_WORD_WIDTH; shift_idx_0 = shift_idx_0 + 1)
        left_shift_operand[`LM32_WORD_WIDTH-1-shift_idx_0] = operand_0_x[shift_idx_0];
end
assign right_shift_operand = direction_x == `LM32_SHIFT_OP_LEFT ? left_shift_operand : operand_0_x;
 
// Determine fill value for right shift - Sign bit for arithmetic shift, or zero for logical shift
assign fill_value = (sign_extend_x == `TRUE) && (direction_x == `LM32_SHIFT_OP_RIGHT)
                      ? operand_0_x[`LM32_WORD_WIDTH-1]
                      : 1'b0;
 
// Determine bits to shift in for right shift or rotate
assign right_shift_in = {`LM32_WORD_WIDTH{fill_value}};
 
// Reverse bits to get left shift result
always @(*)
begin
    for (shift_idx_1 = 0; shift_idx_1 < `LM32_WORD_WIDTH; shift_idx_1 = shift_idx_1 + 1)
        left_shift_result[`LM32_WORD_WIDTH-1-shift_idx_1] = right_shift_result[shift_idx_1];
end
 
// Select result
assign shifter_result_m = direction_m == `LM32_SHIFT_OP_LEFT ? left_shift_result : right_shift_result;
 
/////////////////////////////////////////////////////
// Sequential Logic
/////////////////////////////////////////////////////
 
// Perform right shift
always @(posedge clk_i `CFG_RESET_SENSITIVITY)
begin
    if (rst_i == `TRUE)
    begin
        right_shift_result <= {`LM32_WORD_WIDTH{1'b0}};
        direction_m <= `FALSE;
    end
    else
    begin
        if (stall_x == `FALSE)
        begin
            right_shift_result <= {right_shift_in, right_shift_operand} >> operand_1_x[`LM32_SHIFT_RNG];
            direction_m <= direction_x;
        end
    end
end
 
endmodule

Line No.	Rev	Author	Line
1	48	alirezamon	`// ==================================================================`
2			`// >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<`
3			`// ------------------------------------------------------------------`
4			`// Copyright (c) 2006-2011 by Lattice Semiconductor Corporation`
5			`// ALL RIGHTS RESERVED`
6			`// ------------------------------------------------------------------`
7			`//`
8			`// IMPORTANT: THIS FILE IS AUTO-GENERATED BY THE LATTICEMICO SYSTEM.`
9			`//`
10			`// Permission:`
11			`//`
12			`// Lattice Semiconductor grants permission to use this code`
13			`// pursuant to the terms of the Lattice Semiconductor Corporation`
14			`// Open Source License Agreement.`
15			`//`
16			`// Disclaimer:`
17			`//`
18			`// Lattice Semiconductor provides no warranty regarding the use or`
19			`// functionality of this code. It is the user's responsibility to`
20			`// verify the user's design for consistency and functionality through`
21			`// the use of formal verification methods.`
22			`//`
23			`// --------------------------------------------------------------------`
24			`//`
25			`// Lattice Semiconductor Corporation`
26			`// 5555 NE Moore Court`
27			`// Hillsboro, OR 97214`
28			`// U.S.A`
29			`//`
30			`// TEL: 1-800-Lattice (USA and Canada)`
31			`// 503-286-8001 (other locations)`
32			`//`
33			`// web: http://www.latticesemi.com/`
34			`// email: techsupport@latticesemi.com`
35			`//`
36			`// --------------------------------------------------------------------`
37			`// FILE DETAILS`
38			`// Project : LatticeMico32`
39			`// File : lm32_shifter.v`
40			`// Title : Barrel shifter`
41			`// Dependencies : lm32_include.v`
42			`// Version : 6.1.17`
43			`// : Initial Release`
44			`// Version : 7.0SP2, 3.0`
45			`// : No Change`
46			`// Version : 3.1`
47			`// : No Change`
48			`// =============================================================================`
49
50			`include "lm32_include.v"
51
52			`/////////////////////////////////////////////////////`
53			`// Module interface`
54			`/////////////////////////////////////////////////////`
55
56			`module lm32_shifter (`
57			`// ----- Inputs -------`
58			`clk_i,`
59			`rst_i,`
60			`stall_x,`
61			`direction_x,`
62			`sign_extend_x,`
63			`operand_0_x,`
64			`operand_1_x,`
65			`// ----- Outputs -------`
66			`shifter_result_m`
67			`);`
68
69			`/////////////////////////////////////////////////////`
70			`// Inputs`
71			`/////////////////////////////////////////////////////`
72
73			`input clk_i; // Clock`
74			`input rst_i; // Reset`
75			`input stall_x; // Stall instruction in X stage`
76			`input direction_x; // Direction to shift`
77			`input sign_extend_x; // Whether shift is arithmetic (1'b1) or logical (1'b0)`
78			input [`LM32_WORD_RNG] operand_0_x; // Operand to shift
79			input [`LM32_WORD_RNG] operand_1_x; // Operand that specifies how many bits to shift by
80
81			`/////////////////////////////////////////////////////`
82			`// Outputs`
83			`/////////////////////////////////////////////////////`
84
85			output [`LM32_WORD_RNG] shifter_result_m; // Result of shift
86			wire [`LM32_WORD_RNG] shifter_result_m;
87
88			`/////////////////////////////////////////////////////`
89			`// Internal nets and registers`
90			`/////////////////////////////////////////////////////`
91
92			`reg direction_m;`
93			reg [`LM32_WORD_RNG] left_shift_result;
94			reg [`LM32_WORD_RNG] right_shift_result;
95			reg [`LM32_WORD_RNG] left_shift_operand;
96			wire [`LM32_WORD_RNG] right_shift_operand;
97			`wire fill_value;`
98			wire [`LM32_WORD_RNG] right_shift_in;
99
100			`integer shift_idx_0;`
101			`integer shift_idx_1;`
102
103			`/////////////////////////////////////////////////////`
104			`// Combinational Logic`
105			`/////////////////////////////////////////////////////`
106
107			`// Select operands - To perform a left shift, we reverse the bits and perform a right shift`
108			`always @(*)`
109			`begin`
110			for (shift_idx_0 = 0; shift_idx_0 < `LM32_WORD_WIDTH; shift_idx_0 = shift_idx_0 + 1)
111			left_shift_operand[`LM32_WORD_WIDTH-1-shift_idx_0] = operand_0_x[shift_idx_0];
112			`end`
113			assign right_shift_operand = direction_x == `LM32_SHIFT_OP_LEFT ? left_shift_operand : operand_0_x;
114
115			`// Determine fill value for right shift - Sign bit for arithmetic shift, or zero for logical shift`
116			assign fill_value = (sign_extend_x == `TRUE) && (direction_x == `LM32_SHIFT_OP_RIGHT)
117			? operand_0_x[`LM32_WORD_WIDTH-1]
118			`: 1'b0;`
119
120			`// Determine bits to shift in for right shift or rotate`
121			assign right_shift_in = {`LM32_WORD_WIDTH{fill_value}};
122
123			`// Reverse bits to get left shift result`
124			`always @(*)`
125			`begin`
126			for (shift_idx_1 = 0; shift_idx_1 < `LM32_WORD_WIDTH; shift_idx_1 = shift_idx_1 + 1)
127			left_shift_result[`LM32_WORD_WIDTH-1-shift_idx_1] = right_shift_result[shift_idx_1];
128			`end`
129
130			`// Select result`
131			assign shifter_result_m = direction_m == `LM32_SHIFT_OP_LEFT ? left_shift_result : right_shift_result;
132
133			`/////////////////////////////////////////////////////`
134			`// Sequential Logic`
135			`/////////////////////////////////////////////////////`
136
137			`// Perform right shift`
138			always @(posedge clk_i `CFG_RESET_SENSITIVITY)
139			`begin`
140			if (rst_i == `TRUE)
141			`begin`
142			right_shift_result <= {`LM32_WORD_WIDTH{1'b0}};
143			direction_m <= `FALSE;
144			`end`
145			`else`
146			`begin`
147			if (stall_x == `FALSE)
148			`begin`
149			right_shift_result <= {right_shift_in, right_shift_operand} >> operand_1_x[`LM32_SHIFT_RNG];
150			`direction_m <= direction_x;`
151			`end`
152			`end`
153			`end`
154
155			`endmodule`

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[/] [an-fpga-implementation-of-low-latency-noc-based-mpsoc/] [trunk/] [mpsoc/] [src_processor/] [new_lm32/] [rtl/] [lm32_shifter.v] - Blame information for rev 48