OpenCores
URL https://opencores.org/ocsvn/ao68000/ao68000/trunk

Subversion Repositories ao68000

[/] [ao68000/] [trunk/] [doc/] [doxygen/] [html/] [classmemory__registers.html] - Blame information for rev 12

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 12 alfik 
<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
2 
<html xmlns="http://www.w3.org/1999/xhtml">
3 
<head>
4 
<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
5 
<title>ao68000: memory_registers Module Reference</title>
6 
<link href="tabs.css" rel="stylesheet" type="text/css"/>
7 
<link href="doxygen.css" rel="stylesheet" type="text/css"/>
8 
</head>
9 
<body>
10 
<!-- Generated by Doxygen 1.7.2 -->
11 
<div class="navigation" id="top">
12 
  <div class="tabs">
13 
    <ul class="tablist">
14 
      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
15 
      <li><a href="modules.html"><span>Modules</span></a></li>
16 
      <li class="current"><a href="annotated.html"><span>Design&#160;Unit&#160;List</span></a></li>
17 
      <li><a href="files.html"><span>Files</span></a></li>
18 
    </ul>
19 
  </div>
20 
  <div class="tabs2">
21 
    <ul class="tablist">
22 
      <li><a href="annotated.html"><span>Class&#160;List</span></a></li>
23 
      <li><a href="hierarchy.html"><span>Design&#160;Unit&#160;Hierarchy</span></a></li>
24 
      <li><a href="functions.html"><span>Design&#160;Unit&#160;Members</span></a></li>
25 
    </ul>
26 
  </div>
27 
</div>
28 
<div class="header">
29 
  <div class="summary">
30 
<a href="#Inputs">Inputs</a> &#124;
31 
<a href="#Outputs">Outputs</a> &#124;
32 
<a href="#Signals">Signals</a> &#124;
33 
<a href="#Module Instances">Module Instances</a> &#124;
34 
<a href="#Always Constructs">Always Constructs</a>  </div>
35 
  <div class="headertitle">
36 
<h1>memory_registers Module Reference</h1>  </div>
37 
</div>
38 
<div class="contents">
39 
<!-- doxytag: class="memory_registers" -->
40 
<p>Contains the microcode ROM and D0-D7, A0-A7 registers.
41 
<a href="#_details">More...</a></p>
42 
<!-- startSectionHeader --><div class="dynheader">
43 
Inheritance diagram for memory_registers:<!-- endSectionHeader --></div>
44 
<!-- startSectionSummary --><!-- endSectionSummary --><!-- startSectionContent --><div class="dyncontent">
45 
 <div class="center">
46 
  <img src="classmemory__registers.png" usemap="#memory_registers_map" alt=""/>
47 
  <map id="memory_registers_map" name="memory_registers_map">
48 
<area href="classao68000.html" alt="ao68000" shape="rect" coords="0,56,112,80"/>
49 
</map>
50 
 </div><!-- endSectionContent --></div>
51 
 
52 
<p><a href="classmemory__registers-members.html">List of all members.</a></p>
53 
<table class="memberdecls">
54 
<tr><td colspan="2"><h2><a name="Always Constructs"></a>
55 
Always Constructs</h2></td></tr>
56 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a09281e3224878c570c81844785844fe0">ALWAYS_29</a>&#160;</td><td class="memItemRight" valign="bottom"><b> ( <b><b><a class="el" href="classmemory__registers.html#a530f92fc2ad12c95eaaf9975ce66328d">clock</a></b> <span class="vhdlchar"> </span></b> , <b><b><a class="el" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a></b> <span class="vhdlchar"> </span></b> )</b></td></tr>
57 
<tr><td colspan="2"><h2><a name="Inputs"></a>
58 
Inputs</h2></td></tr>
59 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a530f92fc2ad12c95eaaf9975ce66328d">clock</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
60 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
61 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a8174a0e183d6dd13598deb339666b7d0">An_address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
62 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a7501990dea3a36c15ab84759b7da292f">An_input</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
63 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a20bd5b67a680ceba6b956beb9fb15d53">An_write_enable</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
64 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a372678f9a4b4a1af40aee2ec0f5df2e7">Dn_address</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
65 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a110868019add533d8fe706364e05eac6">Dn_input</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
66 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#af79f52c0c27beb855e979b6c98f5f116">Dn_write_enable</a> &#160;</td><td class="memItemRight" valign="bottom"></td></tr>
67 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a18f2a2d414fc31a8f91c0de1b2bfe2f4">Dn_size</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
68 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a7e81aeac5571c0bebedbfaad6af7f1e3">micro_pc</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
69 
<tr><td colspan="2"><h2><a name="Outputs"></a>
70 
Outputs</h2></td></tr>
71 
 <tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a37b7137181cefe7ef1383b5978e6b62e">An_output</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
72 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#ae304b6533d7652732511e719aeb898f6">usp</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
73 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#a6956b38010744862b4e3666f9e544dbe">Dn_output</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
74 
<tr><td class="memItemLeft" align="right" valign="top"><a class="el" href="classmemory__registers.html#ad622bf153bdda61958b631dc6c25b033">micro_data</a> &#160;</td><td class="memItemRight" valign="bottom"><b><span class="vhdlchar">[</span><span class="vhdldigit">87</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b>  </td></tr>
75 
<tr><td colspan="2"><h2><a name="Module Instances"></a>
76 
Module Instances</h2></td></tr>
77 
 <tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram::an_ram_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
78 
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram::dn_ram_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
79 
<tr><td class="memItemLeft" align="right" valign="top"><b><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram::micro_rom_inst</a>  </b>&#160;</td><td class="memItemRight" valign="bottom"></td></tr>
80 
<tr><td colspan="2"><h2><a name="Signals"></a>
81 
Signals</h2></td></tr>
82 
 <tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#a7a4f8a1e17b638ec960a63d0713de22d">An_ram_write_enable</a> </td></tr>
83 
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#a454bafa8d74c3f699f05155e2c786b64">An_ram_output</a> </td></tr>
84 
<tr><td class="memItemLeft" align="right" valign="top"><b><span class="vhdlkeyword">wire</span><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classmemory__registers.html#ad26e10bd26667b9f780823058dacda1f">dn_byteena</a> </td></tr>
85 
</table>
86 
<hr/><a name="_details"></a><h2>Detailed Description</h2>
87 
<p>Contains the microcode ROM and D0-D7, A0-A7 registers. </p>
88 
<p>The <a class="el" href="classmemory__registers.html" title="Contains the microcode ROM and D0-D7, A0-A7 registers.">memory_registers</a> module contains:</p>
89 
<ul>
90 
<li>data and address registers (D0-D7, A0-A7) implemented as an on-chip RAM.</li>
91 
<li>the microcode implemented as an on-chip ROM.</li>
92 
</ul>
93 
<p>Currently this module contains <em>altsyncram</em> instantiations from Altera Megafunction/LPM library. </p>
94 
 
95 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02033">2033</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
96 
<hr/><h2>Member Function Documentation</h2>
97 
<a class="anchor" id="a09281e3224878c570c81844785844fe0"></a><!-- doxytag: member="memory_registers::ALWAYS_29" ref="a09281e3224878c570c81844785844fe0" args="clock, reset_n" -->
98 
<div class="memitem">
99 
<div class="memproto">
100 
      <table class="memname">
101 
        <tr>
102 
          <td class="memname"><b><span class="vhdlchar"> </span></b>ALWAYS_29          <td></td>
103 
          <td class="paramtype">(<span class="keywordtype"></span> <b><b><a class="el" href="classmemory__registers.html#a530f92fc2ad12c95eaaf9975ce66328d">clock</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> , </td>
104 
        </tr>
105 
        <tr>
106 
          <td class="paramkey"></td>
107 
          <td></td>
108 
          <td class="paramtype"><span class="keywordtype"></span> <b><b><a class="el" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a></b> <span class="vhdlchar"> </span></b>  <em><span class="vhdlkeyword"></span></em> ) </td>
109 
        </tr>
110 
<code> [Always Construct]</code></td>
111 
        </tr>
112 
      </table>
113 
</div>
114 
<div class="memdoc">
115 
 
116 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02066">2066</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
117 
<div class="fragment"><pre class="fragment">
118 
<a name="l02066"></a>02066 <span class="vhdlkeyword">always</span> @(<span class="vhdlkeyword">posedge</span> <a class="code" href="classmemory__registers.html#a530f92fc2ad12c95eaaf9975ce66328d">clock</a> <span class="vhdlkeyword">or</span> <span class="vhdlkeyword">negedge</span> <a class="code" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a>) <span class="vhdlkeyword">begin</span>
119 
<a name="l02067"></a>02067     <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a> == <span class="vhdllogic">1&#39;b0</span>)                                 <a class="code" href="classmemory__registers.html#ae304b6533d7652732511e719aeb898f6">usp</a> &lt;= <span class="vhdllogic">32&#39;d0</span>;
120 
<a name="l02068"></a>02068     <span class="vhdlkeyword">else</span> <span class="vhdlkeyword">if</span>(<a class="code" href="classmemory__registers.html#a8174a0e183d6dd13598deb339666b7d0">An_address</a> == <span class="vhdllogic">4&#39;b0111</span> &amp;&amp; <a class="code" href="classmemory__registers.html#a20bd5b67a680ceba6b956beb9fb15d53">An_write_enable</a>)   <a class="code" href="classmemory__registers.html#ae304b6533d7652732511e719aeb898f6">usp</a> &lt;= <a class="code" href="classmemory__registers.html#a7501990dea3a36c15ab84759b7da292f">An_input</a>;
121 
<a name="l02069"></a>02069 <span class="vhdlkeyword">end</span>
122 
</pre></div>
123 
</div>
124 
</div>
125 
<hr/><h2>Member Data Documentation</h2>
126 
<a class="anchor" id="a530f92fc2ad12c95eaaf9975ce66328d"></a><!-- doxytag: member="memory_registers::clock" ref="a530f92fc2ad12c95eaaf9975ce66328d" args="" -->
127 
<div class="memitem">
128 
<div class="memproto">
129 
      <table class="memname">
130 
        <tr>
131 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a530f92fc2ad12c95eaaf9975ce66328d">clock</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
132 
        </tr>
133 
      </table>
134 
</div>
135 
<div class="memdoc">
136 
 
137 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02034">2034</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
138 
 
139 
</div>
140 
</div>
141 
<a class="anchor" id="a59a623e9fc522a0198461d262518b47d"></a><!-- doxytag: member="memory_registers::reset_n" ref="a59a623e9fc522a0198461d262518b47d" args="" -->
142 
<div class="memitem">
143 
<div class="memproto">
144 
      <table class="memname">
145 
        <tr>
146 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a59a623e9fc522a0198461d262518b47d">reset_n</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
147 
        </tr>
148 
      </table>
149 
</div>
150 
<div class="memdoc">
151 
 
152 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02035">2035</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
153 
 
154 
</div>
155 
</div>
156 
<a class="anchor" id="a8174a0e183d6dd13598deb339666b7d0"></a><!-- doxytag: member="memory_registers::An_address" ref="a8174a0e183d6dd13598deb339666b7d0" args="" -->
157 
<div class="memitem">
158 
<div class="memproto">
159 
      <table class="memname">
160 
        <tr>
161 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a8174a0e183d6dd13598deb339666b7d0">An_address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">3</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
162 
        </tr>
163 
      </table>
164 
</div>
165 
<div class="memdoc">
166 
 
167 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02038">2038</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
168 
 
169 
</div>
170 
</div>
171 
<a class="anchor" id="a7501990dea3a36c15ab84759b7da292f"></a><!-- doxytag: member="memory_registers::An_input" ref="a7501990dea3a36c15ab84759b7da292f" args="" -->
172 
<div class="memitem">
173 
<div class="memproto">
174 
      <table class="memname">
175 
        <tr>
176 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a7501990dea3a36c15ab84759b7da292f">An_input</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
177 
        </tr>
178 
      </table>
179 
</div>
180 
<div class="memdoc">
181 
 
182 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02039">2039</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
183 
 
184 
</div>
185 
</div>
186 
<a class="anchor" id="a20bd5b67a680ceba6b956beb9fb15d53"></a><!-- doxytag: member="memory_registers::An_write_enable" ref="a20bd5b67a680ceba6b956beb9fb15d53" args="" -->
187 
<div class="memitem">
188 
<div class="memproto">
189 
      <table class="memname">
190 
        <tr>
191 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a20bd5b67a680ceba6b956beb9fb15d53">An_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
192 
        </tr>
193 
      </table>
194 
</div>
195 
<div class="memdoc">
196 
 
197 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02040">2040</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
198 
 
199 
</div>
200 
</div>
201 
<a class="anchor" id="a37b7137181cefe7ef1383b5978e6b62e"></a><!-- doxytag: member="memory_registers::An_output" ref="a37b7137181cefe7ef1383b5978e6b62e" args="" -->
202 
<div class="memitem">
203 
<div class="memproto">
204 
      <table class="memname">
205 
        <tr>
206 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a37b7137181cefe7ef1383b5978e6b62e">An_output</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
207 
        </tr>
208 
      </table>
209 
</div>
210 
<div class="memdoc">
211 
 
212 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02041">2041</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
213 
 
214 
</div>
215 
</div>
216 
<a class="anchor" id="ae304b6533d7652732511e719aeb898f6"></a><!-- doxytag: member="memory_registers::usp" ref="ae304b6533d7652732511e719aeb898f6" args="" -->
217 
<div class="memitem">
218 
<div class="memproto">
219 
      <table class="memname">
220 
        <tr>
221 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#ae304b6533d7652732511e719aeb898f6">usp</a></span> <b><span class="vhdlkeyword">reg</span><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
222 
        </tr>
223 
      </table>
224 
</div>
225 
<div class="memdoc">
226 
 
227 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02043">2043</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
228 
 
229 
</div>
230 
</div>
231 
<a class="anchor" id="a372678f9a4b4a1af40aee2ec0f5df2e7"></a><!-- doxytag: member="memory_registers::Dn_address" ref="a372678f9a4b4a1af40aee2ec0f5df2e7" args="" -->
232 
<div class="memitem">
233 
<div class="memproto">
234 
      <table class="memname">
235 
        <tr>
236 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a372678f9a4b4a1af40aee2ec0f5df2e7">Dn_address</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">2</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
237 
        </tr>
238 
      </table>
239 
</div>
240 
<div class="memdoc">
241 
 
242 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02045">2045</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
243 
 
244 
</div>
245 
</div>
246 
<a class="anchor" id="a110868019add533d8fe706364e05eac6"></a><!-- doxytag: member="memory_registers::Dn_input" ref="a110868019add533d8fe706364e05eac6" args="" -->
247 
<div class="memitem">
248 
<div class="memproto">
249 
      <table class="memname">
250 
        <tr>
251 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a110868019add533d8fe706364e05eac6">Dn_input</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
252 
        </tr>
253 
      </table>
254 
</div>
255 
<div class="memdoc">
256 
 
257 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02046">2046</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
258 
 
259 
</div>
260 
</div>
261 
<a class="anchor" id="af79f52c0c27beb855e979b6c98f5f116"></a><!-- doxytag: member="memory_registers::Dn_write_enable" ref="af79f52c0c27beb855e979b6c98f5f116" args="" -->
262 
<div class="memitem">
263 
<div class="memproto">
264 
      <table class="memname">
265 
        <tr>
266 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#af79f52c0c27beb855e979b6c98f5f116">Dn_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
267 
        </tr>
268 
      </table>
269 
</div>
270 
<div class="memdoc">
271 
 
272 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02047">2047</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
273 
 
274 
</div>
275 
</div>
276 
<a class="anchor" id="a18f2a2d414fc31a8f91c0de1b2bfe2f4"></a><!-- doxytag: member="memory_registers::Dn_size" ref="a18f2a2d414fc31a8f91c0de1b2bfe2f4" args="" -->
277 
<div class="memitem">
278 
<div class="memproto">
279 
      <table class="memname">
280 
        <tr>
281 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a18f2a2d414fc31a8f91c0de1b2bfe2f4">Dn_size</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">1</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
282 
        </tr>
283 
      </table>
284 
</div>
285 
<div class="memdoc">
286 
 
287 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02049">2049</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
288 
 
289 
</div>
290 
</div>
291 
<a class="anchor" id="a6956b38010744862b4e3666f9e544dbe"></a><!-- doxytag: member="memory_registers::Dn_output" ref="a6956b38010744862b4e3666f9e544dbe" args="" -->
292 
<div class="memitem">
293 
<div class="memproto">
294 
      <table class="memname">
295 
        <tr>
296 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a6956b38010744862b4e3666f9e544dbe">Dn_output</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">31</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
297 
        </tr>
298 
      </table>
299 
</div>
300 
<div class="memdoc">
301 
 
302 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02050">2050</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
303 
 
304 
</div>
305 
</div>
306 
<a class="anchor" id="a7e81aeac5571c0bebedbfaad6af7f1e3"></a><!-- doxytag: member="memory_registers::micro_pc" ref="a7e81aeac5571c0bebedbfaad6af7f1e3" args="" -->
307 
<div class="memitem">
308 
<div class="memproto">
309 
      <table class="memname">
310 
        <tr>
311 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a7e81aeac5571c0bebedbfaad6af7f1e3">micro_pc</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">8</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Input]</code></td>
312 
        </tr>
313 
      </table>
314 
</div>
315 
<div class="memdoc">
316 
 
317 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02052">2052</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
318 
 
319 
</div>
320 
</div>
321 
<a class="anchor" id="ad622bf153bdda61958b631dc6c25b033"></a><!-- doxytag: member="memory_registers::micro_data" ref="ad622bf153bdda61958b631dc6c25b033" args="" -->
322 
<div class="memitem">
323 
<div class="memproto">
324 
      <table class="memname">
325 
        <tr>
326 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#ad622bf153bdda61958b631dc6c25b033">micro_data</a></span> <b><span class="vhdlchar">[</span><span class="vhdldigit">87</span><span class="vhdlchar">:</span><span class="vhdldigit">0</span><span class="vhdlchar">]</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Output]</code></td>
327 
        </tr>
328 
      </table>
329 
</div>
330 
<div class="memdoc">
331 
 
332 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02053">2053</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
333 
 
334 
</div>
335 
</div>
336 
<a class="anchor" id="a7a4f8a1e17b638ec960a63d0713de22d"></a><!-- doxytag: member="memory_registers::An_ram_write_enable" ref="a7a4f8a1e17b638ec960a63d0713de22d" args="wire" -->
337 
<div class="memitem">
338 
<div class="memproto">
339 
      <table class="memname">
340 
        <tr>
341 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a7a4f8a1e17b638ec960a63d0713de22d">An_ram_write_enable</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire]</code></td>
342 
        </tr>
343 
      </table>
344 
</div>
345 
<div class="memdoc">
346 
 
347 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02056">2056</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
348 
 
349 
</div>
350 
</div>
351 
<a class="anchor" id="a454bafa8d74c3f699f05155e2c786b64"></a><!-- doxytag: member="memory_registers::An_ram_output" ref="a454bafa8d74c3f699f05155e2c786b64" args="wire[31:0]" -->
352 
<div class="memitem">
353 
<div class="memproto">
354 
      <table class="memname">
355 
        <tr>
356 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a454bafa8d74c3f699f05155e2c786b64">An_ram_output</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[31:0]]</code></td>
357 
        </tr>
358 
      </table>
359 
</div>
360 
<div class="memdoc">
361 
 
362 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02058">2058</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
363 
 
364 
</div>
365 
</div>
366 
<a class="anchor" id="ad26e10bd26667b9f780823058dacda1f"></a><!-- doxytag: member="memory_registers::dn_byteena" ref="ad26e10bd26667b9f780823058dacda1f" args="wire[3:0]" -->
367 
<div class="memitem">
368 
<div class="memproto">
369 
      <table class="memname">
370 
        <tr>
371 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#ad26e10bd26667b9f780823058dacda1f">dn_byteena</a></span> <b><span class="vhdlchar"> </span></b> <code> [wire[3:0]]</code></td>
372 
        </tr>
373 
      </table>
374 
</div>
375 
<div class="memdoc">
376 
 
377 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02061">2061</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
378 
 
379 
</div>
380 
</div>
381 
<a class="anchor" id="afc54073a43b749eb1f1376c4b31cd1e3"></a><!-- doxytag: member="memory_registers::altsyncram" ref="afc54073a43b749eb1f1376c4b31cd1e3" args="" -->
382 
<div class="memitem">
383 
<div class="memproto">
384 
      <table class="memname">
385 
        <tr>
386 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#afc54073a43b749eb1f1376c4b31cd1e3">altsyncram</a></span> <b><span class="vhdlchar">micro_rom_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
387 
        </tr>
388 
      </table>
389 
</div>
390 
<div class="memdoc">
391 
 
392 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02104">2104</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
393 
 
394 
</div>
395 
</div>
396 
<a class="anchor" id="a5b0f1fb5a259a06899ac6ac3b52835e0"></a><!-- doxytag: member="memory_registers::altsyncram" ref="a5b0f1fb5a259a06899ac6ac3b52835e0" args="" -->
397 
<div class="memitem">
398 
<div class="memproto">
399 
      <table class="memname">
400 
        <tr>
401 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a5b0f1fb5a259a06899ac6ac3b52835e0">altsyncram</a></span> <b><span class="vhdlchar">dn_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
402 
        </tr>
403 
      </table>
404 
</div>
405 
<div class="memdoc">
406 
 
407 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02088">2088</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
408 
 
409 
</div>
410 
</div>
411 
<a class="anchor" id="a892186b1bfe856b1ddaf1d8b3a448f50"></a><!-- doxytag: member="memory_registers::altsyncram" ref="a892186b1bfe856b1ddaf1d8b3a448f50" args="" -->
412 
<div class="memitem">
413 
<div class="memproto">
414 
      <table class="memname">
415 
        <tr>
416 
          <td class="memname"><span class="stringliteral"><a class="el" href="classmemory__registers.html#a892186b1bfe856b1ddaf1d8b3a448f50">altsyncram</a></span> <b><span class="vhdlchar">an_ram_inst</span><span class="vhdlchar"> </span></b> <b><span class="vhdlchar"> </span></b> <code> [Module Instance]</code></td>
417 
        </tr>
418 
      </table>
419 
</div>
420 
<div class="memdoc">
421 
 
422 
<p>Definition at line <a class="el" href="ao68000_8v_source.html#l02072">2072</a> of file <a class="el" href="ao68000_8v_source.html">ao68000.v</a>.</p>
423 
 
424 
</div>
425 
</div>
426 
<hr/>The documentation for this class was generated from the following file:<ul>
427 
<li><a class="el" href="ao68000_8v_source.html">ao68000.v</a></li>
428 
</ul>
429 
</div>
430 
<hr class="footer"/><address class="footer"><small>Generated on Sat Dec 11 2010 13:21:13 for ao68000 by&#160;
431 
<a href="http://www.doxygen.org/index.html">
432 
<img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.2 </small></address>
433 
</body>
434 
</html>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.