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[/] [aor3000/] [trunk/] [sim/] [aoR3000/] [main_linux.cpp] - Blame information for rev 2

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1 2 alfik
/*
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 * This file is subject to the terms and conditions of the BSD License. See
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 * the file "LICENSE" in the main directory of this archive for more details.
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 *
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 * Copyright (C) 2014 Aleksander Osman
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 */
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#include <cstdio>
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#include <cstdlib>
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#include <sys/mman.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include "VaoR3000.h"
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#include "VaoR3000_aoR3000.h"
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#include "VaoR3000_pipeline_rf.h"
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#include "VaoR3000_pipeline_if.h"
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#include "VaoR3000_pipeline_mem.h"
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#include "VaoR3000_block_muldiv.h"
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#include "VaoR3000_memory_tlb_ram.h"
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#include "VaoR3000_block_cp0.h"
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#include "VaoR3000_pipeline_exe.h"
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#include "VaoR3000_model_true_dual_ram__W32_WB4.h"
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#include "VaoR3000_model_simple_dual_ram__W20_WB5.h"
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#include "verilated.h"
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#include "verilated_vcd_c.h"
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#include "shared_mem.h"
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//------------------------------------------------------------------------------
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volatile shared_mem_t *shared_ptr = NULL;
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//------------------------------------------------------------------------------
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void usleep_or_finish() {
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    if(shared_ptr->test_finished) {
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        printf("Finishing.\n");
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        exit(0);
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    }
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    usleep(1);
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}
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//128MB
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#define MAX_MEMORY   0x08000000
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#define RESET_VECTOR 0x1FC00000
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//------------------------------------------------------------------------------
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int main(int argc, char **argv) {
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    //map shared memory
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    int fd = open("./../tester/shared_mem.dat", O_RDWR, S_IRUSR | S_IWUSR);
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    if(fd == -1) {
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        perror("open() failed for shared_mem.dat");
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        return -1;
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    }
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    shared_ptr = (shared_mem_t *)mmap(NULL, sizeof(shared_mem_t), PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
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    if(shared_ptr == MAP_FAILED) {
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        perror("mmap() failed");
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        close(fd);
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        return -2;
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    }
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    //--------------------------------------------------------------------------
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    Verilated::commandArgs(argc, argv);
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    Verilated::traceEverOn(true);
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    VerilatedVcdC* tracer = new VerilatedVcdC;
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    VaoR3000 *top = new VaoR3000();
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    top->trace (tracer, 99);
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    //tracer->rolloverMB(1000000);
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    tracer->open("aoR3000.vcd");
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    bool dump_enabled = false;
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    //reset
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    vluint64_t halfcycle = 0;
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    top->clk = 0; top->rst_n = 1; top->eval(); if(dump_enabled) { tracer->dump(halfcycle); } halfcycle++;
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    top->clk = 0; top->rst_n = 0; top->eval(); if(dump_enabled) { tracer->dump(halfcycle); } halfcycle++;
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    top->rst_n = 1;
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    printf("Waiting for initialize..."); fflush(stdout);
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    while(shared_ptr->proc_ao.initialize_do == false) usleep_or_finish();
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    shared_ptr->proc_ao.initialize_do = false;
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    printf("done\n");
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    //--------------------------------------------------------------------------
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    uint32 event_counter = 0;
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    struct read_t {
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        uint32 count;
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        uint32 byteenable;
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        uint32 address;
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    };
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    read_t read[5];
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    uint32 read_list_count = sizeof(read) / sizeof(read_t);
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    memset(read, 0, sizeof(read));
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    bool   stall_wait = false;
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    bool   stall_state = false;
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    bool   is_exception_waiting = false;
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    while(!Verilated::gotFinish()) {
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        //---------------------------------------------------------------------- avalon master
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        top->avm_waitrequest   = 0;
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        top->avm_readdatavalid = 0;
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        top->avm_readdata      = 0;
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        if(top->avm_read) {
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            bool found = false;
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            for(uint32 i=0; i<read_list_count; i++) {
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                if(read[i].count == 0) {
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                    read[i].address    = top->avm_address & 0xFFFFFFFC;
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                    read[i].byteenable = top->avm_byteenable;
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                    read[i].count      = top->avm_burstcount;
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                    found = true;
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                    break;
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                }
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            }
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            if(found == false) {
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                printf("[aoR3000]: read fatal error: too many reads.\n");
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                exit(-1);
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            }
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        }
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        else if(read[0].count > 0) {
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            top->avm_readdatavalid = 1;
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            if(read[0].address < MAX_MEMORY) {
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                top->avm_readdata = shared_ptr->mem.ints[read[0].address/4];
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            }
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            else if(read[0].address >= RESET_VECTOR && read[0].address < RESET_VECTOR + sizeof(shared_ptr->reset_vector)) {
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                top->avm_readdata = shared_ptr->reset_vector[(read[0].address - RESET_VECTOR)/4];
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            }
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            else {
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                shared_ptr->proc_ao.read_address    = read[0].address & 0xFFFFFFFC;
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                shared_ptr->proc_ao.read_byteenable = read[0].byteenable;
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                shared_ptr->proc_ao.read_do         = true;
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                while(shared_ptr->proc_ao.read_do) usleep_or_finish();
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                top->avm_readdata = shared_ptr->proc_ao.read_data;
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            }
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            read[0].address += 4;
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            read[0].count--;
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163
            if(read[0].count == 0) {
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                memmove(&read[0], &read[1], sizeof(read) - sizeof(read_t));
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            }
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        }
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168
        //----------------------------------------------------------------------
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        if(stall_state == true) stall_state = ((top->v->pipeline_mem_inst->__PVT__mem_stall & 1) == 0)? false : true;
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        uint32 cmd = top->v->pipeline_mem_inst->__PVT__mem_cmd & 0x7F;
173
 
174
        bool stall_start = cmd != 0   && stall_state == true;
175
        bool stall_end   = stall_wait && stall_state == false;
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        uint32 was_instruction = ((cmd != 0) && stall_state == false) || stall_end;
178
        uint32 was_pc          = top->v->pipeline_mem_inst->__PVT__mem_pc_plus4;
179
 
180
        if(stall_start) {
181
            stall_wait = true;
182
        }
183
        else if(stall_end) {
184
            stall_wait = false;
185
        }
186
 
187
        if(stall_state == false) stall_state = ((top->v->pipeline_mem_inst->__PVT__mem_stall & 1) == 0)? false : true;
188
 
189
        //----------------------------------------------------------------------
190
 
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        bool dump_enabled = false; //event_counter > 40565500;
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        //---------------------------------------------------------------------- interrupt
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        bool irq2_enable = ((was_instruction && stall_end == false && (event_counter + 1) == shared_ptr->irq2_at_event)) || ((event_counter + 1) > shared_ptr->irq2_at_event);
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        bool irq3_enable = ((was_instruction && stall_end == false && (event_counter + 1) == shared_ptr->irq3_at_event)) || ((event_counter + 1) > shared_ptr->irq3_at_event);
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        top->interrupt_vector = ((irq2_enable)? 1 : 0) | ((irq3_enable)? 2 : 0);
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        if(dump_enabled) {
200
            printf("[%d]: ena2: %d ena3: %d cmd: %d at2: %d at3: %d stall_state: %d stall_start: %d stall_end: %d\n",
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                event_counter, (uint32)irq2_enable, (uint32)irq3_enable, cmd, shared_ptr->irq2_at_event, shared_ptr->irq3_at_event, stall_state, (uint32)stall_start, (uint32)stall_end);
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            fflush(stdout);
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        }
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        //---------------------------------------------------------------------- clock
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        top->clk = 0;
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        top->eval();
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209
        if(dump_enabled) tracer->dump(halfcycle);
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        halfcycle++;
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        top->clk = 1;
213
        top->eval();
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        if(dump_enabled) tracer->dump(halfcycle);
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        halfcycle++;
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        tracer->flush();
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        //----------------------------------------------------------------------
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        if(top->avm_write) {
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            if(top->avm_burstcount != 1) {
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                printf("[avalon master error]: top->avm_burstcount(%d) != 1\n", top->avm_burstcount);
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                exit(-1);
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            }
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            uint32 mask = 0;
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            uint32 byteena = top->avm_byteenable;
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            for(uint32 i=0; i<4; i++) {
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                if(byteena & 1) mask |= (0xFF << (i*8));
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                byteena >>= 1;
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            }
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            shared_ptr->proc_ao.write_address    = top->avm_address & 0xFFFFFFFC;
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            shared_ptr->proc_ao.write_byteenable = top->avm_byteenable;
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            shared_ptr->proc_ao.write_data       = top->avm_writedata & mask;
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            shared_ptr->proc_ao.write_do         = true;
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            while(shared_ptr->proc_ao.write_do) usleep_or_finish();
240
        }
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        uint32 is_exception = (top->v->pipeline_if_inst->__PVT__exc_waiting & 1);
243
 
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        //interrupt after stalled instruction ignored
245
 
246
        if((is_exception && was_instruction && (event_counter > 0 || halfcycle >= (4*2))) || was_instruction) {
247
 
248
            if(dump_enabled) { printf("inc: %d, exception: %d\n", event_counter, is_exception); fflush(stdout); }
249
 
250
            shared_ptr->proc_ao.report.counter = event_counter;
251
 
252
            if(shared_ptr->check_at_event == event_counter) {
253
                shared_ptr->proc_ao.check_do = true;
254
 
255
                while(shared_ptr->proc_ao.check_do) usleep_or_finish();
256
            }
257
 
258
            event_counter++;
259
        }
260
 
261
        is_exception_waiting = is_exception;
262
    }
263
 
264
    top->final();
265
    delete top;
266
    return 0;
267
}
268
 
269
//------------------------------------------------------------------------------
270
 
271
/*
272
module aoR3000(
273
    input               clk,
274
    input               rst_n,
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276
    //
277
    input       [5:0]   interrupt_vector,
278
 
279
    //
280
    output      [31:0]  avm_address,
281
    output      [31:0]  avm_writedata,
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    output      [3:0]   avm_byteenable,
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    output      [2:0]   avm_burstcount,
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    output              avm_write,
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    output              avm_read,
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    input               avm_waitrequest,
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    input               avm_readdatavalid,
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    input       [31:0]  avm_readdata
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);
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*/
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//------------------------------------------------------------------------------

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