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[/] [aor3000/] [trunk/] [syn/] [soc/] [soc.qsf] - Blame information for rev 2

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1 2 alfik
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2014 Altera Corporation. All rights reserved.
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, the Altera Quartus II License Agreement,
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# the Altera MegaCore Function License Agreement, or other
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# applicable license agreement, including, without limitation,
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# that your use is for the sole purpose of programming logic
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# devices manufactured by Altera and sold by Altera or its
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# authorized distributors.  Please refer to the applicable
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# agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 64-Bit
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# Version 14.0.0 Build 200 06/17/2014 SJ Web Edition
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# Date created = 20:14:12  August 09, 2014
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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#               soc_assignment_defaults.qdf
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#    If this file doesn't exist, see file:
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#               assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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#    file is updated automatically by the Quartus II software
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#    and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone IV E"
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set_global_assignment -name DEVICE EP4CE115F29C7
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set_global_assignment -name TOP_LEVEL_ENTITY soc
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 14.0
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:14:12  AUGUST 09, 2014"
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set_global_assignment -name LAST_QUARTUS_VERSION 14.0
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
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set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
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set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
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set_global_assignment -name QIP_FILE pll/pll.qip
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set_global_assignment -name QIP_FILE system/synthesis/system.qip
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set_global_assignment -name VERILOG_FILE soc.v
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to CLOCK_50
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set_location_assignment PIN_Y2 -to CLOCK_50
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_BA[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQM[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_RAS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CAS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CKE
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CLK
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_WE_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_CS_N
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[12]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[13]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[14]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[15]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[16]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[17]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[18]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[19]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[20]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[21]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[22]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[23]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[24]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[25]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[26]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[27]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[28]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[29]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[30]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_DQ[31]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[0]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[1]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[2]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[3]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[4]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[5]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[6]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[7]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[8]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[9]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[10]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[11]
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set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DRAM_ADDR[12]
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set_location_assignment PIN_U1 -to DRAM_DQ[31]
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set_location_assignment PIN_U4 -to DRAM_DQ[30]
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set_location_assignment PIN_T3 -to DRAM_DQ[29]
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set_location_assignment PIN_R3 -to DRAM_DQ[28]
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set_location_assignment PIN_R2 -to DRAM_DQ[27]
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set_location_assignment PIN_R1 -to DRAM_DQ[26]
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set_location_assignment PIN_R7 -to DRAM_DQ[25]
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set_location_assignment PIN_U5 -to DRAM_DQ[24]
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set_location_assignment PIN_M8 -to DRAM_DQ[16]
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set_location_assignment PIN_L8 -to DRAM_DQ[17]
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set_location_assignment PIN_P2 -to DRAM_DQ[18]
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set_location_assignment PIN_N3 -to DRAM_DQ[19]
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set_location_assignment PIN_N4 -to DRAM_DQ[20]
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set_location_assignment PIN_M4 -to DRAM_DQ[21]
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set_location_assignment PIN_M7 -to DRAM_DQ[22]
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set_location_assignment PIN_L7 -to DRAM_DQ[23]
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set_location_assignment PIN_Y3 -to DRAM_DQ[8]
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set_location_assignment PIN_Y4 -to DRAM_DQ[9]
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set_location_assignment PIN_AB1 -to DRAM_DQ[10]
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set_location_assignment PIN_AA3 -to DRAM_DQ[11]
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set_location_assignment PIN_AB2 -to DRAM_DQ[12]
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set_location_assignment PIN_AC1 -to DRAM_DQ[13]
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set_location_assignment PIN_AB3 -to DRAM_DQ[14]
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set_location_assignment PIN_AC2 -to DRAM_DQ[15]
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set_location_assignment PIN_W3 -to DRAM_DQ[0]
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set_location_assignment PIN_W2 -to DRAM_DQ[1]
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set_location_assignment PIN_V4 -to DRAM_DQ[2]
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set_location_assignment PIN_W1 -to DRAM_DQ[3]
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set_location_assignment PIN_V3 -to DRAM_DQ[4]
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set_location_assignment PIN_V2 -to DRAM_DQ[5]
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set_location_assignment PIN_V1 -to DRAM_DQ[6]
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set_location_assignment PIN_U3 -to DRAM_DQ[7]
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set_location_assignment PIN_W4 -to DRAM_DQM[1]
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set_location_assignment PIN_K8 -to DRAM_DQM[2]
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set_location_assignment PIN_U2 -to DRAM_DQM[0]
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set_location_assignment PIN_N8 -to DRAM_DQM[3]
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set_location_assignment PIN_U6 -to DRAM_RAS_N
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set_location_assignment PIN_V7 -to DRAM_CAS_N
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set_location_assignment PIN_AA6 -to DRAM_CKE
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set_location_assignment PIN_V6 -to DRAM_WE_N
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set_location_assignment PIN_T4 -to DRAM_CS_N
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set_location_assignment PIN_U7 -to DRAM_BA[0]
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set_location_assignment PIN_R4 -to DRAM_BA[1]
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set_location_assignment PIN_Y7 -to DRAM_ADDR[12]
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set_location_assignment PIN_AA5 -to DRAM_ADDR[11]
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set_location_assignment PIN_R5 -to DRAM_ADDR[10]
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set_location_assignment PIN_Y6 -to DRAM_ADDR[9]
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set_location_assignment PIN_Y5 -to DRAM_ADDR[8]
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set_location_assignment PIN_AA7 -to DRAM_ADDR[7]
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set_location_assignment PIN_W7 -to DRAM_ADDR[6]
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set_location_assignment PIN_W8 -to DRAM_ADDR[5]
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set_location_assignment PIN_V5 -to DRAM_ADDR[4]
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set_location_assignment PIN_R6 -to DRAM_ADDR[0]
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set_location_assignment PIN_V8 -to DRAM_ADDR[1]
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set_location_assignment PIN_U8 -to DRAM_ADDR[2]
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set_location_assignment PIN_P1 -to DRAM_ADDR[3]
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set_location_assignment PIN_AE5 -to DRAM_CLK
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name SDC_FILE soc.sdc
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set_global_assignment -name CDF_FILE output_files/Chain2.cdf
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set_global_assignment -name ENABLE_SIGNALTAP OFF
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set_global_assignment -name USE_SIGNALTAP_FILE output_files/debug_1.stp
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set_global_assignment -name SIGNALTAP_FILE output_files/debug_1.stp
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

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