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[/] [apb_mstr/] [trunk/] [src/] [base/] [axi2apb_ctrl.v] - Blame information for rev 12

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1 12 eyalhoc
<##//////////////////////////////////////////////////////////////////
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////                                                             ////
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////  Author: Eyal Hochberg                                      ////
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////          eyal@provartec.com                                 ////
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////                                                             ////
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////  Downloaded from: http://www.opencores.org                  ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2010 Provartec LTD                            ////
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//// www.provartec.com                                           ////
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//// info@provartec.com                                          ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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//// This source file is free software; you can redistribute it  ////
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//// and/or modify it under the terms of the GNU Lesser General  ////
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//// Public License as published by the Free Software Foundation.////
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////                                                             ////
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//// This source is distributed in the hope that it will be      ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied  ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR     ////
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//// PURPOSE.  See the GNU Lesser General Public License for more////
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//// details. http://www.gnu.org/licenses/lgpl.html              ////
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////                                                             ////
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//////////////////////////////////////////////////////////////////##>
29 2 eyalhoc
 
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INCLUDE def_axi2apb.txt
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OUTFILE PREFIX_ctrl.v
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33 5 eyalhoc
module  PREFIX_ctrl (PORTS);
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   input              clk;
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   input              reset;
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   input              finish_wr;
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   input              finish_rd;
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   input              cmd_empty;
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   input              cmd_read;
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   input              WVALID;
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   output                     psel;
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   output                     penable;
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   output                     pwrite;
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   input                      pready;
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   wire                       wstart;
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   wire                       rstart;
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   reg                        busy;
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   reg                        psel;
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   reg                        penable;
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   reg                        pwrite;
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   wire                       pack;
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   wire                       cmd_ready;
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   assign                     cmd_ready = (~busy) & (~cmd_empty);
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   assign                     wstart = cmd_ready & (~cmd_read) & (~psel) & WVALID;
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   assign                     rstart = cmd_ready & cmd_read & (~psel);
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   assign             pack = psel & penable & pready;
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   always @(posedge clk or posedge reset)
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     if (reset)
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       busy <= #FFD 1'b0;
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     else if (psel)
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       busy <= #FFD 1'b1;
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     else if (finish_rd | finish_wr)
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       busy <= #FFD 1'b0;
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   always @(posedge clk or posedge reset)
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     if (reset)
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       psel <= #FFD 1'b0;
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     else if (pack)
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       psel <= #FFD 1'b0;
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     else if (wstart | rstart)
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       psel <= #FFD 1'b1;
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   always @(posedge clk or posedge reset)
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     if (reset)
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       penable <= #FFD 1'b0;
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     else if (pack)
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       penable <= #FFD 1'b0;
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     else if (psel)
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       penable <= #FFD 1'b1;
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   always @(posedge clk or posedge reset)
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     if (reset)
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       pwrite  <= #FFD 1'b0;
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     else if (pack)
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       pwrite  <= #FFD 1'b0;
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     else if (wstart)
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       pwrite  <= #FFD 1'b1;
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endmodule
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