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[/] [astron_sim_transceiver/] [trunk/] [README.md] - Blame information for rev 3

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## Copyright
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Copyright 2020
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ASTRON (Netherlands Institute for Radio Astronomy) 
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P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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    http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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## About this core
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This is fast behavioural simulation model of a gigabit trancseiver; a
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serializer and the corresponding deserializer.
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These source files can work in any environment, however it is recommended to
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use the RadioHDL tool to easily generate project files for e.g. Modelsim,
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Quartus and Vivado (see 'About hdllib.cfg and the RadioHDL tool').
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## Test bench(es)
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A self-checking test bench is included.
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## Dependencies
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This core has the following dependencies:
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https://opencores.org/projects/common_pkg
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## Source files
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The source files are listed hdllib.cfg.
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## More information about this core
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Each source file comes with a header containing more information.
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## About hdllib.cfg and the RadioHDL tool
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The hdllib.cfg file is included in all ASTRONs cores and is a config file that
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is detected by the RadioHDL development tool (also on OpenCores).
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The source files are in order of dependency. However, some or all files could
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also be standalone.
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The section 'test_bench_files' can list test benches, but also simulation-only
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source files that are not test benches.

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