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[/] [avr_hp/] [trunk/] [rtl/] [CommonPacks/] [SynthCtrlPack.vhd] - Blame information for rev 2

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-- *****************************************************************************************
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-- AVR synthesis control package
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-- Version 1.32 (Special version for the JTAG OCD)
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-- Modified 14.07.2005
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-- Designed by Ruslan Lepetenok
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-- *****************************************************************************************
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library IEEE;
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use IEEE.std_logic_1164.all;
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use IEEE.std_logic_arith.all;
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package SynthCtrlPack is
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-- Register file
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constant CResetRegFile        : boolean := TRUE;
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-- Static RAM Controller
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constant CWaitStIns           : boolean := FALSE;
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-- External multiplexer size
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constant CExtMuxInSize        : positive := 16;
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-- Top
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constant CImplServModule      : boolean := FALSE;
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constant CImplTmrCnt          : boolean := TRUE;
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constant CImplPORTA           : boolean := TRUE;
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constant CImplPORTB           : boolean := TRUE;
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constant CImplUART            : boolean := TRUE;
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constant CImplClockSw         : boolean := FALSE;
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-- Reset generator
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constant CSecondClockUsed     : boolean := FALSE;
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-- Only for ASICs
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constant CSynchLatchUsed      : boolean := FALSE;
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-- Memeory parameters(for the designs without external memory)
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constant CPRAMSize : positive := 4*1024; -- Size of program memory(in bytes)
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constant CDRAMSize : positive := 2*1024; -- Size of data memory(in bytes)
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constant CUseAltera          : boolean := TRUE;
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-- Special modules
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constant CImplWDTUI          : boolean := FALSE;
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constant CImplTC16BUI        : boolean := FALSE;
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constant CImplSMBusMod       : boolean := TRUE;
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constant CImplHDQ16UI        : boolean := FALSE;
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constant CImplIdentifier     : boolean := FALSE;
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constant CPMSynth            : boolean := TRUE;
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end SynthCtrlPack;

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