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[/] [axi4_tlm_bfm/] [trunk/] [rtl/] [quartus-synthesis/] [stp.vhd] - Blame information for rev 17

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1 9 daniel.kho
-- megafunction wizard: %SignalTap II Logic Analyzer%
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-- GENERATION: STANDARD
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-- VERSION: WM1.0
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-- MODULE: sld_signaltap 
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-- ============================================================
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-- File Name: stp.vhd
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-- Megafunction Name(s):
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--                      sld_signaltap
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--
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-- Simulation Library Files(s):
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--                      
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-- ============================================================
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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--
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-- 12.1 Build 177 11/07/2012 SJ Full Version
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-- ************************************************************
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--Copyright (C) 1991-2012 Altera Corporation
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--Your use of Altera Corporation's design tools, logic functions 
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--and other software and tools, and its AMPP partner logic 
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--functions, and any output files from any of the foregoing 
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--(including device programming or simulation files), and any 
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--associated documentation or information are expressly subject 
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--to the terms and conditions of the Altera Program License 
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--Subscription Agreement, Altera MegaCore Function License 
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--Agreement, or other applicable license agreement, including, 
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--without limitation, that your use is for the sole purpose of 
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--programming logic devices manufactured by Altera and sold by 
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--Altera or its authorized distributors.  Please refer to the 
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--applicable agreement for further details.
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LIBRARY ieee;
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USE ieee.std_logic_1164.all;
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LIBRARY altera_mf;
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USE altera_mf.all;
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ENTITY stp IS
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        PORT
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        (
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                acq_clk         : IN STD_LOGIC ;
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                acq_data_in             : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
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                acq_trigger_in          : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
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                trigger_in              : IN STD_LOGIC
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        );
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END stp;
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ARCHITECTURE SYN OF stp IS
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        COMPONENT sld_signaltap
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        GENERIC (
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                sld_advanced_trigger_entity             : STRING;
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                sld_data_bits           : NATURAL;
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                sld_data_bit_cntr_bits          : NATURAL;
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                sld_enable_advanced_trigger             : NATURAL;
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                sld_mem_address_bits            : NATURAL;
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                sld_node_crc_bits               : NATURAL;
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                sld_node_crc_hiword             : NATURAL;
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                sld_node_crc_loword             : NATURAL;
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                sld_node_info           : NATURAL;
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                sld_ram_block_type              : STRING;
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                sld_sample_depth                : NATURAL;
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                sld_storage_qualifier_gap_record                : NATURAL;
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                sld_storage_qualifier_mode              : STRING;
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                sld_trigger_bits                : NATURAL;
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                sld_trigger_in_enabled          : NATURAL;
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                sld_trigger_level               : NATURAL;
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                sld_trigger_level_pipeline              : NATURAL;
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                lpm_type                : STRING
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        );
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        PORT (
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                        acq_clk : IN STD_LOGIC ;
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                        acq_data_in     : IN STD_LOGIC_VECTOR (127 DOWNTO 0);
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                        acq_trigger_in  : IN STD_LOGIC_VECTOR (0 DOWNTO 0);
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                        trigger_in      : IN STD_LOGIC
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        );
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        END COMPONENT;
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BEGIN
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        sld_signaltap_component : sld_signaltap
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        GENERIC MAP (
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                sld_advanced_trigger_entity => "basic,1,",
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                sld_data_bits => 128,
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                sld_data_bit_cntr_bits => 8,
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                sld_enable_advanced_trigger => 0,
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                sld_mem_address_bits => 12,
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                sld_node_crc_bits => 32,
97 17 daniel.kho
                sld_node_crc_hiword => 7854,
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                sld_node_crc_loword => 42699,
99 9 daniel.kho
                sld_node_info => 1076736,
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                sld_ram_block_type => "Auto",
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                sld_sample_depth => 4096,
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                sld_storage_qualifier_gap_record => 0,
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                sld_storage_qualifier_mode => "OFF",
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                sld_trigger_bits => 1,
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                sld_trigger_in_enabled => 1,
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                sld_trigger_level => 1,
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                sld_trigger_level_pipeline => 1,
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                lpm_type => "sld_signaltap"
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        )
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        PORT MAP (
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                acq_clk => acq_clk,
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                acq_data_in => acq_data_in,
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                acq_trigger_in => acq_trigger_in,
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                trigger_in => trigger_in
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        );
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END SYN;
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-- ============================================================
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-- CNX file retrieval info
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-- ============================================================
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-- Retrieval info: PRIVATE: DATA_WIDTH_SPIN STRING ""
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-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
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-- Retrieval info: PRIVATE: RAM_TYPE_COMBO STRING "Auto"
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-- Retrieval info: PRIVATE: SAMPLE_DEPTH_COMBO STRING "4 K"
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-- Retrieval info: PRIVATE: SLD_TRIGGER_OUT_ENABLED NUMERIC "0"
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-- Retrieval info: PRIVATE: TRIGGER_LEVELS_COMBO STRING "1"
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-- Retrieval info: PRIVATE: TRIGGER_WIDTH_SPIN STRING ""
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-- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
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-- Retrieval info: CONSTANT: SLD_ADVANCED_TRIGGER_ENTITY STRING "basic,1,"
133 17 daniel.kho
-- Retrieval info: CONSTANT: SLD_DATA_BITS NUMERIC "128"
134 9 daniel.kho
-- Retrieval info: CONSTANT: SLD_DATA_BIT_CNTR_BITS NUMERIC "8"
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-- Retrieval info: CONSTANT: SLD_ENABLE_ADVANCED_TRIGGER NUMERIC "0"
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-- Retrieval info: CONSTANT: SLD_MEM_ADDRESS_BITS NUMERIC "12"
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-- Retrieval info: CONSTANT: SLD_NODE_CRC_BITS NUMERIC "32"
138 17 daniel.kho
-- Retrieval info: CONSTANT: SLD_NODE_CRC_HIWORD NUMERIC "7854"
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-- Retrieval info: CONSTANT: SLD_NODE_CRC_LOWORD NUMERIC "42699"
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-- Retrieval info: CONSTANT: SLD_NODE_INFO NUMERIC "1076736"
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-- Retrieval info: CONSTANT: SLD_RAM_BLOCK_TYPE STRING "Auto"
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-- Retrieval info: CONSTANT: SLD_SAMPLE_DEPTH NUMERIC "4096"
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-- Retrieval info: CONSTANT: SLD_STORAGE_QUALIFIER_GAP_RECORD NUMERIC "0"
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-- Retrieval info: CONSTANT: SLD_STORAGE_QUALIFIER_MODE STRING "OFF"
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-- Retrieval info: CONSTANT: SLD_TRIGGER_BITS NUMERIC "1"
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-- Retrieval info: CONSTANT: SLD_TRIGGER_IN_ENABLED NUMERIC "1"
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-- Retrieval info: CONSTANT: SLD_TRIGGER_LEVEL NUMERIC "1"
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-- Retrieval info: CONSTANT: SLD_TRIGGER_LEVEL_PIPELINE NUMERIC "1"
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-- Retrieval info: USED_PORT: acq_clk 0 0 0 0 INPUT NODEFVAL "acq_clk"
150 17 daniel.kho
-- Retrieval info: USED_PORT: acq_data_in 0 0 128 0 INPUT NODEFVAL "acq_data_in[127..0]"
151 9 daniel.kho
-- Retrieval info: USED_PORT: acq_trigger_in 0 0 1 0 INPUT NODEFVAL "acq_trigger_in[0..0]"
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-- Retrieval info: USED_PORT: trigger_in 0 0 0 0 INPUT NODEFVAL "trigger_in"
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-- Retrieval info: CONNECT: @acq_clk 0 0 0 0 acq_clk 0 0 0 0
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-- Retrieval info: CONNECT: @acq_data_in 0 0 128 0 acq_data_in 0 0 128 0
155 9 daniel.kho
-- Retrieval info: CONNECT: @acq_trigger_in 0 0 1 0 acq_trigger_in 0 0 1 0
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-- Retrieval info: CONNECT: @trigger_in 0 0 0 0 trigger_in 0 0 0 0
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-- Retrieval info: GEN_FILE: TYPE_NORMAL stp.vhd TRUE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL stp.inc FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL stp.cmp FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL stp.bsf FALSE
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-- Retrieval info: GEN_FILE: TYPE_NORMAL stp_inst.vhd FALSE

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