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[/] [c0or1k/] [trunk/] [include/] [l4/] [arch/] [arm/] [v5/] [cpu.h] - Blame information for rev 2

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/*
 * Cpu specific features
 * defined upon the base architecture.
 *
 * Copyright (C) 2010 B Labs Ltd.
 * Written by Bahadir Balban
 */
 
#ifndef __V5_CPU_H__
#define __V5_CPU_H__
 
#include INC_SUBARCH(mmu_ops.h)
 
static inline void cpu_startup(void)
{
 
}
 
static inline int smp_get_cpuid()
{
        return 0;
}
 
#endif /* __V5_CPU_H__ */

Line No.	Rev	Author	Line
1	2	drasko	`/*`
2			`* Cpu specific features`
3			`* defined upon the base architecture.`
4			`*`
5			`* Copyright (C) 2010 B Labs Ltd.`
6			`* Written by Bahadir Balban`
7			`*/`
8
9			`#ifndef __V5_CPU_H__`
10			`#define __V5_CPU_H__`
11
12			`#include INC_SUBARCH(mmu_ops.h)`
13
14			`static inline void cpu_startup(void)`
15			`{`
16
17			`}`
18
19			`static inline int smp_get_cpuid()`
20			`{`
21			`return 0;`
22			`}`
23
24			`#endif /* __V5_CPU_H__ */`

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[/] [c0or1k/] [trunk/] [include/] [l4/] [arch/] [arm/] [v5/] [cpu.h] - Blame information for rev 2