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[/] [c0or1k/] [trunk/] [include/] [l4/] [arch/] [arm/] [v5/] [mmu_ops.h] - Blame information for rev 2

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Line No. Rev Author Line
1 2 drasko
#ifndef __MMU__OPS__H__
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#define __MMU__OPS__H__
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/*
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 * Prototypes for low level mmu operations
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 *
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 * Copyright (C) 2005 Bahadir Balban
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 *
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 */
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void arm_set_ttb(unsigned int);
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void arm_set_domain(unsigned int);
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unsigned int arm_get_domain(void);
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void arm_enable_mmu(void);
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void arm_enable_icache(void);
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void arm_enable_dcache(void);
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void arm_enable_wbuffer(void);
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void arm_enable_high_vectors(void);
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void arm_invalidate_cache(void);
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void arm_invalidate_icache(void);
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void arm_invalidate_dcache(void);
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void arm_clean_dcache(void);
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void arm_clean_invalidate_dcache(void);
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void arm_clean_invalidate_cache(void);
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void arm_drain_writebuffer(void);
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void arm_invalidate_tlb(void);
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void arm_invalidate_itlb(void);
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void arm_invalidate_dtlb(void);
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static inline void arm_enable_caches(void)
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{
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        arm_enable_icache();
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        arm_enable_dcache();
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}
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static inline void dmb(void)
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{
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        /* This is the closest to its meaning */
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        arm_drain_writebuffer();
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}
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static inline void dsb(void)
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{
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        /* No op */
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}
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static inline void isb(void)
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{
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        /* No op */
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}
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#endif /* __MMU__OPS__H__ */

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