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drasko |
/*
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* OMAP3XXX Interrupt Controller Defines
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*
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* Copyright 2010 B Labs Ltd.
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*/
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#ifndef __OMAP3_INTC_H__
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#define __OMAP3_INTC_H__
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#include INC_ARCH(io.h)
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#define OMAP3_INTC_SYSCONFIG (0x00000010) /* RW */
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#define OMAP3_INTC_SYSSTATUS (0x00000014) /* RO */
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#define OMAP3_INTC_SIR_IRQ (0x00000040) /* RO */
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#define OMAP3_INTC_SIR_FIQ (0x00000044) /* RO */
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#define OMAP3_INTC_CONTROL (0x00000048) /* RW */
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#define OMAP3_INTC_PROT (0x0000004C) /* RW - Protection */
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#define OMAP3_INTC_IDLE (0x00000050) /* RW */
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#define OMAP3_INTC_IRQ_PRIO (0x00000060) /* RW - IRQ Priority */
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#define OMAP3_INTC_FIQ_PRIO (0x00000064) /* RW - FIQ Priority */
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#define OMAP3_INTC_THREASHOLD (0x00000068) /* RW */
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#define OMAP3_INTC_ITR (0x00000080) /* RO - Raw Interrupt Status*/
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#define OMAP3_INTC_MIR (0x00000084) /* RW - Masked Int Status */
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#define OMAP3_INTC_MIR_CLR (0x00000088) /* WO - Clear Mask*/
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#define OMAP3_INTC_MIR_SET (0x0000008C) /* WO - Set Mask*/
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#define OMAP3_INTC_ISR_SET (0x00000090) /* RW - Software Int Set */
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#define OMAP3_INTC_ISR_CLR (0x00000094) /* WO */
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#define OMAP3_INTC_IRQ_PEND (0x00000098) /* RO */
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#define OMAP3_INTC_FIQ_PEND (0x0000009C) /* RO */
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#define OMAP3_INTC_ILR (0x00000100) /* RW */
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/* Reset Bits */
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#define OMAP_INTC_SOFTRESET (1 << 1)
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static inline unsigned int omap3_intc_get_ilr(unsigned long base,
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unsigned int irq)
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{
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return read((base + OMAP3_INTC_ILR + (irq * 4)));
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}
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static inline void omap3_intc_set_ilr(unsigned long base, unsigned int irq,
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unsigned int val)
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{
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write(val, (base + OMAP3_INTC_ILR + (irq * 4)));
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}
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/* Set clear Interrupt masks */
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static inline
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void omap3_intc_set_irq_status(unsigned long base, unsigned int reg,
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unsigned int irq)
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{
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unsigned int val = 0;
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unsigned int offset = (irq >> 5); /* Same as dividing by 32 */
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irq -= (offset * 32);
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val = read((base + reg + (0x20 * offset)));
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val |= (1 << irq);
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write(val, (base + reg + (0x20 * offset)));
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}
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void omap3_intc_reset(unsigned long base);
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void omap3_intc_init(void);
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void omap3_intc_eoi_irq(l4id_t irq);
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void omap3_intc_mask_irq(l4id_t irq);
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void omap3_intc_unmask_irq(l4id_t irq);
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void omap3_intc_ack_irq(l4id_t irq);
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void omap3_intc_ack_and_mask(l4id_t irq);
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l4id_t omap3_intc_read_irq(void *data);
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#endif /* !__OMAP3_INTC_H__ */
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