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drasko |
/*
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* Userspace thread control block
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*
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* Copyright (C) 2007-2009 Bahadir Bilgehan Balban
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*/
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#ifndef __GLUE_ARM_MESSAGE_H__
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#define __GLUE_ARM_MESSAGE_H__
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/*
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* Here's a summary of how ARM registers are used during IPC:
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*
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* System registers:
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* r0 - r2: Passed as arguments to ipc() call. They are the registers
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* the microkernel will read and they have system-wide meaning.
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*
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* Primary message registers:
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* r3 - r8: These 6 registers are the primary message registers MR0-MR6.
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* Their format is application-specific, i.e. the microkernel imposes no
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* format restrictions on them.
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*
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* TODO: The only exception is that, for ANYTHREAD receivers the predefined
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* MR_SENDER is touched by the kernel to indicate the sender. This register
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* is among the primary MRs and it may be better fit to put it into one of
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* the system registers.
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*
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* l4lib registers: (MR_TAG, MR_SENDER, MR_RETURN)
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* Some of the primary message registers are used by the l4lib convenience
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* library for operations necessary on most or all common ipcs. For example
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* every ipc has a tag that specifies the ipc reason. Also send/receive
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* operations require a return value. Threads that are open to receive from
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* all threads require the sender id. These values are passed in predefined
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* primary message registers, but the microkernel has no knowledge about them.
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*
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* System call registers: L4SYS_ARG0 to ARG4.(See syslib.h for definitions)
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* Finally the rest of the primary message registers are available for
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* implementing system call arguments. For example the POSIX services use
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* these arguments to pass posix system call information.
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*
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* Secondary Message Registers:
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* These are non-real registers and are present in the UTCB memory region.
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* Both real and non-real message registers have a location in the UTCB, but
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* non-real ones are copied only if the FULL IPC flag is set.
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*
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* The big picture:
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*
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* r0 System register
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* r1 System register
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* r2 System register
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* r3 Primary MR0 MR_RETURN, MR_TAG Present in UTCB, Short IPC
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* r4 Primary MR1 MR_SENDER Present in UTCB, Short IPC
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* r5 Primary MR2 L4SYS_ARG0 Present in UTCB, Short IPC
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* r6 Primary MR3 L4SYS_ARG1 Present in UTCB, Short IPC
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* r7 Primary MR4 L4SYS_ARG2 Present in UTCB, Short IPC
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* r8 Primary MR5 L4SYS_ARG3 Present in UTCB, Short IPC
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* x Secondary MR6 Present in UTCB, Full IPC only
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* x Secondary MR64 Present in UTCB, Full IPC only
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*
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* Complicated for you? Suggest a simpler design and it shall be implemented!
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*/
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#define MR_REST ((UTCB_SIZE >> 2) - MR_TOTAL - 4) /* -4 is for fields on utcb */
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#define MR_TOTAL 6
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#define MR_TAG 0 /* Contains the purpose of message */
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#define MR_SENDER 1 /* For anythread receivers to discover sender */
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#define MR_RETURN 0 /* Contains the posix return value. */
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/* These define the mr start - end range that isn't used by userspace syslib */
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#define MR_UNUSED_START 2 /* The first mr that's not used by syslib.h */
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#define MR_UNUSED_TOTAL (MR_TOTAL - MR_UNUSED_START)
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#define MR_USABLE_TOTAL MR_UNUSED_TOTAL
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/* These are defined so that we don't hard-code register names */
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#define MR0_REGISTER r3
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#define MR_RETURN_REGISTER r3
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#define TASK_NOTIFY_SLOTS 8
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#define TASK_NOTIFY_MAXVALUE 255
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/* Primaries aren't used for memcopy. Those ops use this as a parameter */
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#define L4_UTCB_FULL_BUFFER_SIZE (MR_REST * sizeof(int))
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#include INC_GLUE(memlayout.h)
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#if !defined (__ASSEMBLY__)
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struct utcb {
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u32 mr[MR_TOTAL]; /* MRs that are mapped to real registers */
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u32 saved_tag; /* Saved tag field for stacked ipcs */
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u32 saved_sender; /* Saved sender field for stacked ipcs */
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u8 notify[TASK_NOTIFY_SLOTS]; /* Irq notification slots */
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u32 mr_rest[MR_REST]; /* Complete the utcb for up to 64 words */
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};
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#endif
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#endif /* __GLUE_ARM_MESSAGE_H__ */
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