OpenCores
URL https://opencores.org/ocsvn/c0or1k/c0or1k/trunk

Subversion Repositories c0or1k

[/] [c0or1k/] [trunk/] [include/] [l4/] [glue/] [arm/] [smp.h] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 drasko
/*
2
 * Copyright 2010 B Labs Ltd.
3
 *
4
 * Authors: Prem Mallappa, Bahadir Balban
5
 *
6
 * SMP support
7
 */
8
#ifndef __GLUE_ARM_SMP_H__
9
#define __GLUE_ARM_SMP_H__
10
 
11
#include INC_ARCH(scu.h)
12
 
13
struct cpuinfo {
14
        u32 ncpus;
15
        u32 flags;
16
        volatile u32 cpu_spinning;
17
        void (*send_ipi)(int cpu, int ipi_cmd);
18
        void (*smp_spin)(void);
19
        void (*smp_finish)(void);
20
 
21
} __attribute__ ((__packed__));
22
 
23
extern struct cpuinfo cpuinfo;
24
 
25
#if defined(CONFIG_SMP)
26
 
27
void smp_attach(void);
28
void smp_start_cores(void);
29
 
30
#else
31
static inline void smp_attach(void) {}
32
static inline void smp_start_cores(void) {}
33
#endif
34
 
35
void init_smp(void);
36
void arch_smp_spin(void);
37
void smp_send_ipi(unsigned int cpumask, int ipi_num);
38
void platform_smp_init(int ncpus);
39
int  platform_smp_start(int cpu, void (*start)(int));
40
void secondary_init_platform(void);
41
 
42
extern unsigned long secondary_run_signal;
43
 
44
#define CPUID_TO_MASK(cpu)      (1 << (cpu))
45
 
46
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.