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[/] [c0or1k/] [trunk/] [src/] [platform/] [eb/] [irq.c] - Blame information for rev 2

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/*
 * Support for generic irq handling using platform irq controller (PL190)
 *
 * Copyright (C) 2007 Bahadir Balban
 */
#include <l4/drivers/irq/gic/gic.h>
#include INC_PLAT(irq.h)
#include <l4/platform/realview/irq.h>
#include <l4/generic/irq.h>
 
extern struct gic_data gic_data[IRQ_CHIPS_MAX];
 
#if defined (CONFIG_CPU_ARM11MPCORE) || defined (CONFIG_CPU_CORTEXA9)
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
        [0] = {
                .name = "CoreTile GIC",
                .level = 0,
                .cascade = IRQ_NIL,
                .start = 0,
                .end = IRQS_MAX,
                .data = &gic_data[0],
                .ops = {
                        .init = gic_dummy_init,
                        .read_irq = gic_read_irq,
                        .ack_and_mask = gic_ack_and_mask,
                        .unmask = gic_unmask_irq
                },
        },
#if 0
        [1] = {
                .name = "EB GIC",
                .level = 1,
                .cascade = IRQ_NIL,
                .start = EB_GIC_IRQ_OFFSET,
                .end = EB_GIC_IRQ_OFFSET + IRQS_MAX,
                .data = &gic_data[1],
                .ops = {
                        .init = gic_dummy_init,
                        .read_irq = gic_read_irq,
                        .ack_and_mask = gic_ack_and_mask,
                        .unmask = gic_unmask_irq,
                },
        },
#endif
};
#else
struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
        [0] = {
                .name = "EB GIC",
                .level = 0,
                .cascade = IRQ_NIL,
                .start = 0,
                .end = EB_GIC_IRQ_OFFSET + IRQS_MAX,
                .data = &gic_data[1],
                .ops = {
                        .init = gic_dummy_init,
                        .read_irq = gic_read_irq,
                        .ack_and_mask = gic_ack_and_mask,
                        .unmask = gic_unmask_irq,
                },
        },
};
#endif
 
struct irq_desc irq_desc_array[IRQS_MAX] = {
        [IRQ_TIMER0] = {
                .name = "Timer0",
                .chip = &irq_chip_array[0],
                .handler = platform_timer_handler,
        },
        [IRQ_TIMER1] = {
                .name = "Timer1",
                .chip = &irq_chip_array[0],
                .handler = platform_timer_user_handler,
        },
        [IRQ_KEYBOARD0] = {
                .name = "Keyboard",
                .chip = &irq_chip_array[0],
                .handler = platform_keyboard_user_handler,
        },
        [IRQ_MOUSE0] = {
                .name = "Mouse",
                .chip = &irq_chip_array[0],
                .handler = platform_mouse_user_handler,
        },
};
 

Line No.	Rev	Author	Line
1	2	drasko	`/*`
2			`* Support for generic irq handling using platform irq controller (PL190)`
3			`*`
4			`* Copyright (C) 2007 Bahadir Balban`
5			`*/`
6			`#include <l4/drivers/irq/gic/gic.h>`
7			`#include INC_PLAT(irq.h)`
8			`#include <l4/platform/realview/irq.h>`
9			`#include <l4/generic/irq.h>`
10
11			`extern struct gic_data gic_data[IRQ_CHIPS_MAX];`
12
13			`#if defined (CONFIG_CPU_ARM11MPCORE) \|\| defined (CONFIG_CPU_CORTEXA9)`
14			`struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {`
15			`[0] = {`
16			`.name = "CoreTile GIC",`
17			`.level = 0,`
18			`.cascade = IRQ_NIL,`
19			`.start = 0,`
20			`.end = IRQS_MAX,`
21			`.data = &gic_data[0],`
22			`.ops = {`
23			`.init = gic_dummy_init,`
24			`.read_irq = gic_read_irq,`
25			`.ack_and_mask = gic_ack_and_mask,`
26			`.unmask = gic_unmask_irq`
27			`},`
28			`},`
29			`#if 0`
30			`[1] = {`
31			`.name = "EB GIC",`
32			`.level = 1,`
33			`.cascade = IRQ_NIL,`
34			`.start = EB_GIC_IRQ_OFFSET,`
35			`.end = EB_GIC_IRQ_OFFSET + IRQS_MAX,`
36			`.data = &gic_data[1],`
37			`.ops = {`
38			`.init = gic_dummy_init,`
39			`.read_irq = gic_read_irq,`
40			`.ack_and_mask = gic_ack_and_mask,`
41			`.unmask = gic_unmask_irq,`
42			`},`
43			`},`
44			`#endif`
45			`};`
46			`#else`
47			`struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {`
48			`[0] = {`
49			`.name = "EB GIC",`
50			`.level = 0,`
51			`.cascade = IRQ_NIL,`
52			`.start = 0,`
53			`.end = EB_GIC_IRQ_OFFSET + IRQS_MAX,`
54			`.data = &gic_data[1],`
55			`.ops = {`
56			`.init = gic_dummy_init,`
57			`.read_irq = gic_read_irq,`
58			`.ack_and_mask = gic_ack_and_mask,`
59			`.unmask = gic_unmask_irq,`
60			`},`
61			`},`
62			`};`
63			`#endif`
64
65			`struct irq_desc irq_desc_array[IRQS_MAX] = {`
66			`[IRQ_TIMER0] = {`
67			`.name = "Timer0",`
68			`.chip = &irq_chip_array[0],`
69			`.handler = platform_timer_handler,`
70			`},`
71			`[IRQ_TIMER1] = {`
72			`.name = "Timer1",`
73			`.chip = &irq_chip_array[0],`
74			`.handler = platform_timer_user_handler,`
75			`},`
76			`[IRQ_KEYBOARD0] = {`
77			`.name = "Keyboard",`
78			`.chip = &irq_chip_array[0],`
79			`.handler = platform_keyboard_user_handler,`
80			`},`
81			`[IRQ_MOUSE0] = {`
82			`.name = "Mouse",`
83			`.chip = &irq_chip_array[0],`
84			`.handler = platform_mouse_user_handler,`
85			`},`
86			`};`
87

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[/] [c0or1k/] [trunk/] [src/] [platform/] [eb/] [irq.c] - Blame information for rev 2