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[/] [c0or1k/] [trunk/] [src/] [platform/] [pb926/] [irq.c] - Blame information for rev 2

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Line No. Rev Author Line
1 2 drasko
/*
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 * Support for generic irq handling using platform irq controller (PL190)
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 *
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 * Copyright (C) 2007 Bahadir Balban
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 */
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#include <l4/generic/platform.h>
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#include <l4/generic/irq.h>
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#include <l4/generic/time.h>
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#include INC_PLAT(irq.h)
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#include INC_PLAT(platform.h)
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#include INC_PLAT(timer.h)
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#include INC_ARCH(exception.h)
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#include <l4/lib/bit.h>
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#include <l4/drivers/irq/pl190/pl190_vic.h>
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struct irq_chip irq_chip_array[IRQ_CHIPS_MAX] = {
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        [0] = {
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                .name = "Vectored irq controller",
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                .level = 0,
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                .cascade = IRQ_SIC,
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                .start = VIC_CHIP_OFFSET,
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                .end = VIC_CHIP_OFFSET + VIC_IRQS_MAX,
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                .ops = {
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                        .init = pl190_vic_init,
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                        .read_irq = pl190_read_irq,
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                        .ack_and_mask = pl190_mask_irq,
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                        .unmask = pl190_unmask_irq,
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                },
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        },
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        [1] = {
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                .name = "Secondary irq controller",
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                .level = 1,
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                .cascade = IRQ_NIL,
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                .start = SIC_CHIP_OFFSET,
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                .end = SIC_CHIP_OFFSET + SIC_IRQS_MAX,
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                .ops = {
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                        .init = pl190_sic_init,
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                        .read_irq = pl190_sic_read_irq,
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                        .ack_and_mask = pl190_sic_mask_irq,
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                        .unmask = pl190_sic_unmask_irq,
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                },
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        },
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};
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static int platform_timer_handler(struct irq_desc *desc)
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{
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        /*
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         * Microkernel is using just TIMER0,
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         * so we call handler with TIMER01 index
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         */
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        timer_irq_clear(PLATFORM_TIMER0_VBASE);
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        return do_timer_irq();
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}
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/*
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 * Timer handler for userspace
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 */
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static int platform_timer_user_handler(struct irq_desc *desc)
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{
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        /* Ack the device irq */
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        timer_irq_clear(PLATFORM_TIMER1_VBASE);
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        /* Notify the userspace */
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        irq_thread_notify(desc);
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        return 0;
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}
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/*
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 * Keyboard handler for userspace
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 */
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#define PL050_KMICR             0x00
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#define PL050_KMI_RXINTR        (1 << 0x4)
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static int platform_keyboard_user_handler(struct irq_desc *desc)
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{
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        /*
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         * Disable rx keyboard interrupt.
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         * User will enable this
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         */
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        clrbit((unsigned int *)PLATFORM_KEYBOARD0_VBASE + PL050_KMICR,
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               PL050_KMI_RXINTR);
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        irq_thread_notify(desc);
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        return 0;
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}
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/*
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 * Mouse handler for userspace
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 */
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static int platform_mouse_user_handler(struct irq_desc *desc)
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{
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        /*
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         * Disable rx mouse interrupt.
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         * User will enable this
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         */
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        clrbit((unsigned int *)PLATFORM_MOUSE0_VBASE + PL050_KMICR,
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               PL050_KMI_RXINTR);
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        irq_thread_notify(desc);
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        return 0;
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}
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/*
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 * Built-in irq handlers initialised at compile time.
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 * Else register with register_irq()
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 */
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struct irq_desc irq_desc_array[IRQS_MAX] = {
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        [IRQ_TIMER0] = {
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                .name = "Timer0",
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                .chip = &irq_chip_array[0],
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                .handler = platform_timer_handler,
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        },
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        [IRQ_TIMER1] = {
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                .name = "Timer1",
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                .chip = &irq_chip_array[0],
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                .handler = platform_timer_user_handler,
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        },
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        [IRQ_KEYBOARD0] = {
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                .name = "Keyboard",
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                .chip = &irq_chip_array[1],
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                .handler = platform_keyboard_user_handler,
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        },
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        [IRQ_MOUSE0] = {
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                .name = "Mouse",
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                .chip = &irq_chip_array[1],
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                .handler = platform_mouse_user_handler,
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        },
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};
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