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joaocarlos |
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CLEFIA Pipeline
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Instituto Superior Técnico de Lisboa
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----------------------------------------------------------------------------
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Engineers:
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Ricardo Chaves
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João Carlos Nunes Bittencourt
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----------------------------------------------------------------------------
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Description : CLEFIA Pipeline Implementation for 256 bit key expansion
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----------------------------------------------------------------------------
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Version : 3.0
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----------------------------------------------------------------------------
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Directory Hierarchy :
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----------------------------------------------------------------------------
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- doc : documentation files such as papers, book chapters and
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official standards from third parties developers.
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- rtl : RTL HDL source code.
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- sim : testbench, simulation scripts and waveforms.
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- sys : system algorithms and others implementations.
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----------------------------------------------------------------------------
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Design Structure and Versioning (To be done) :
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----------------------------------------------------------------------------
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- rtl/pipeline : architecture for 256 bit key expansion and ciphering
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----------------------------------------------------------------------------
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Waveforms and simulation scripts :
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----------------------------------------------------------------------------
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Waveforms are stored in waveforms directory in project folder.
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----------------------------------------------------------------------------
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Run the project :
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----------------------------------------------------------------------------
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To run and simulate the projects you should open the proper file located
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in FPGA folder with your Xilinx ISE. Then check if all files where
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recognized. If not, check first if file exist, otherwise fill a report
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to the design team.
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----------------------------------------------------------------------------
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Copyright 2013. All Right Reserved.
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