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[/] [crcahb/] [trunk/] [rtl/] [bit_reversal.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 julioameri
`define size ((DATA_SIZE/4) * (2 ** (type - 1)))
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module bit_reversal
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#(
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        parameter DATA_SIZE = 32
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)
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(
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        //OUTPUTS
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        output [DATA_SIZE - 1 : 0] data_out,
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        //INPUTS
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        input  [DATA_SIZE - 1 : 0] data_in,
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        input  [1 : 0] rev_type
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);
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//Bit reversing types
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localparam NO_REVERSE = 2'b00;
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localparam BYTE       = 2'b01;
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localparam HALF_WORD  = 2'b10;
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localparam WORD       = 2'b11;
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localparam TYPES = 4;
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wire [DATA_SIZE - 1 : 0] data_reversed[0 : 3];
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assign data_reversed[NO_REVERSE] = data_in; //bit order not affected
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generate
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        genvar i, type;
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        for(type = 1 ; type < TYPES; type = type + 1)
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                for(i = 0; i < DATA_SIZE; i = i + 1)
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                        begin
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                                if(i < `size)
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                                        assign data_reversed[type][i] = data_in[`size*((i/`size) + 1) - 1 - i];
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                                else
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                                        assign data_reversed[type][i] = data_in[`size*((i/`size) + 1) - 1 - (i%(`size*(i/`size)))];
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                        end
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endgenerate
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//Output Mux
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assign data_out = data_reversed[rev_type];
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endmodule

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