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`include "../bench/timescale.v"

// this moduel do a decrypt group

module group_decrypt(

                          input                    clk

                        , input                    rst

                        , input                    en

                        , input                    dec

                        , input                    init

                        , input         [ 8*8-1:0] ck

                        , input         [56*8-1:0] kk

                        , input         [ 8*8-1:0] group

                        , input         [   4-1:0] bytes

                        , output  reg              valid

                        , output  reg   [ 8*8-1:0] ogroup

                        , output  reg   [   4-1:0] obytes

                );

        reg init_d;

        wire [8*8-1:0] sc_cb;

        wire [8*8-1:0] ib;

        reg  [8*8-1:0] sc_cb_d;

        reg  [8*8-1:0] bco_d;

        wire  [8*8-1:0] bco;

        always @(posedge clk)

                begin

                if(en)

                begin

                        sc_cb_d<=sc_cb;

                        bco_d<=bco;

                end

                end

stream_cypher stream_cypher(

                    .clk   (clk)

                  , .rst   (rst)

                  , .en    (en)

                  , .init  (init)

                  , .ck    (ck)

                  , .sb    (group)

                  , .cb    (sc_cb)

                  );

assign ib=init?sc_cb_d:group^sc_cb;

block_decypher block_decypher(

                          .kk (kk)

                        , .ib (ib)

                        , .bd (bco)

                        );

endmodule