Subversion Repositories dblclockfft

////////////////////////////////////////////////////////////////////////////////

//

// Filename:    butterfly.cpp

//

// Project:     A General Purpose Pipelined FFT Implementation

//

// Purpose:     Builds one of two butterflies: either a butterfly implementation

//              using hardware optimized multiplies, or one that uses a logic

//      soft-multiply.

//

// Creator:     Dan Gisselquist, Ph.D.

//              Gisselquist Technology, LLC

//

////////////////////////////////////////////////////////////////////////////////

//

// Copyright (C) 2015-2018, Gisselquist Technology, LLC

//

// This file is part of the general purpose pipelined FFT project.

//

// The pipelined FFT project is free software (firmware): you can redistribute

// it and/or modify it under the terms of the GNU Lesser General Public License

// as published by the Free Software Foundation, either version 3 of the

// License, or (at your option) any later version.

//

// The pipelined FFT project is distributed in the hope that it will be useful,

// but WITHOUT ANY WARRANTY; without even the implied warranty of

// MERCHANTIBILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser

// General Public License for more details.

//

// You should have received a copy of the GNU Lesser General Public License

// along with this program.  (It's in the $(ROOT)/doc directory.  Run make

// with no target there if the PDF file isn't present.)  If not, see

// <http://www.gnu.org/licenses/> for a copy.

//

// License:     LGPL, v3, as defined and found on www.gnu.org,

//              http://www.gnu.org/licenses/lgpl.html

//

//

////////////////////////////////////////////////////////////////////////////////

//

//

#define _CRT_SECURE_NO_WARNINGS   //  ms vs 2012 doesn't like fopen

#include <stdio.h>

#include <stdlib.h>

#ifdef _MSC_VER //  added for ms vs compatibility

#include <io.h>

#include <direct.h>

#define _USE_MATH_DEFINES

#define R_OK    4       /* Test for read permission.  */

#define W_OK    2       /* Test for write permission.  */

#define X_OK    0       /* !!!!!! execute permission - unsupported in windows*/

#define F_OK    0       /* Test for existence.  */

#if _MSC_VER <= 1700

int lstat(const char *filename, struct stat *buf) { return 1; };

#define S_ISDIR(A)      0

#else

#define lstat   _stat

#define S_ISDIR _S_IFDIR

#endif

#define mkdir(A,B)      _mkdir(A)

#define access _access

#else

// And for G++/Linux environment

#include <unistd.h>     // Defines the R_OK/W_OK/etc. macros

#include <sys/stat.h>

#endif

#include <string.h>

#include <string>

#include <math.h>

#include <ctype.h>

#include <assert.h>

#include "defaults.h"

#include "legal.h"

#include "rounding.h"

#include "fftlib.h"

#include "bldstage.h"

#include "bitreverse.h"

#include "softmpy.h"

#include "butterfly.h"

void    build_butterfly(const char *fname, int xtracbits, ROUND_T rounding,

                        int     ckpce, const bool async_reset) {

        FILE    *fp = fopen(fname, "w");

        if (NULL == fp) {

                fprintf(stderr, "Could not open \'%s\' for writing\n", fname);

                perror("O/S Err was:");

                return;

        }

        const   char    *rnd_string;

        if (rounding == RND_TRUNCATE)

                rnd_string = "truncate";

        else if (rounding == RND_FROMZERO)

                rnd_string = "roundfromzero";

        else if (rounding == RND_HALFUP)

                rnd_string = "roundhalfup";

        else

                rnd_string = "convround";

        //if (ckpce >= 3)

                //ckpce = 3;

        if (ckpce <= 1)

                ckpce = 1;

        std::string     resetw("i_reset");

        if (async_reset)

                resetw = std::string("i_areset_n");

        fprintf(fp,

SLASHLINE

"//\n"

"// Filename:\tbutterfly.v\n"

"//\n"

"// Project:\t%s\n"

"//\n"

"// Purpose:\tThis routine caculates a butterfly for a decimation\n"

"//             in frequency version of an FFT.  Specifically, given\n"

"//     complex Left and Right values together with a coefficient, the output\n"

"//     of this routine is given by:\n"

"//\n"

"//             L' = L + R\n"

"//             R' = (L - R)*C\n"

"//\n"

"//     The rest of the junk below handles timing (mostly), to make certain\n"

"//     that L' and R' reach the output at the same clock.  Further, just to\n"

"//     make certain that is the case, an 'aux' input exists.  This aux value\n"

"//     will come out of this routine synchronized to the values it came in\n"

"//     with.  (i.e., both L', R', and aux all have the same delay.)  Hence,\n"

"//     a caller of this routine may set aux on the first input with valid\n"

"//     data, and then wait to see aux set on the output to know when to find\n"

"//     the first output with valid data.\n"

"//\n"

"//     All bits are preserved until the very last clock, where any more bits\n"

"//     than OWIDTH will be quietly discarded.\n"

"//\n"

"//     This design features no overflow checking.\n"

"//\n"

"// Notes:\n"

"//     CORDIC:\n"

"//             Much as we might like, we can't use a cordic here.\n"

"//             The goal is to accomplish an FFT, as defined, and a\n"

"//             CORDIC places a scale factor onto the data.  Removing\n"

"//             the scale factor would cost two multiplies, which\n"

"//             is precisely what we are trying to avoid.\n"

"//\n"

"//\n"

"//     3-MULTIPLIES:\n"

"//             It should also be possible to do this with three multiplies\n"

"//             and an extra two addition cycles.\n"

"//\n"

"//             We want\n"

"//                     R+I = (a + jb) * (c + jd)\n"

"//                     R+I = (ac-bd) + j(ad+bc)\n"

"//             We multiply\n"

"//                     P1 = ac\n"

"//                     P2 = bd\n"

"//                     P3 = (a+b)(c+d)\n"

"//             Then\n"

"//                     R+I=(P1-P2)+j(P3-P2-P1)\n"

"//\n"

"//             WIDTHS:\n"

"//             On multiplying an X width number by an\n"

"//             Y width number, X>Y, the result should be (X+Y)\n"

"//             bits, right?\n"

"//             -2^(X-1) <= a <= 2^(X-1) - 1\n"

"//             -2^(Y-1) <= b <= 2^(Y-1) - 1\n"

"//             (2^(Y-1)-1)*(-2^(X-1)) <= ab <= 2^(X-1)2^(Y-1)\n"

"//             -2^(X+Y-2)+2^(X-1) <= ab <= 2^(X+Y-2) <= 2^(X+Y-1) - 1\n"

"//             -2^(X+Y-1) <= ab <= 2^(X+Y-1)-1\n"

"//             YUP!  But just barely.  Do this and you'll really want\n"

"//             to drop a bit, although you will risk overflow in so\n"

"//             doing.\n"

"//\n"

"//     20150602 -- The sync logic lines have been completely redone.  The\n"

"//             synchronization lines no longer go through the FIFO with the\n"

"//             left hand sum, but are kept out of memory.  This allows the\n"

"//             butterfly to use more optimal memory resources, while also\n"

"//             guaranteeing that the sync lines can be properly reset upon\n"

"//             any reset signal.\n"

"//\n"

"//\n%s"

"//\n", prjname, creator);

        fprintf(fp, "%s", cpyleft);

        fprintf(fp, "//\n//\n`default_nettype\tnone\n//\n");

        fprintf(fp,

"module\tbutterfly(i_clk, %s, i_ce, i_coef, i_left, i_right, i_aux,\n"

                "\t\to_left, o_right, o_aux);\n"

        "\t// Public changeable parameters ...\n", resetw.c_str());

        fprintf(fp,

        "\tparameter IWIDTH=%d,", TST_BUTTERFLY_IWIDTH);

#ifdef  TST_BUTTERFLY_CWIDTH

        fprintf(fp, "CWIDTH=%d,", TST_BUTTERFLY_CWIDTH);

#else

        fprintf(fp, "CWIDTH=IWIDTH+%d,", xtracbits);

#endif

#ifdef  TST_BUTTERFLY_OWIDTH

        fprintf(fp, "OWIDTH=%d;\n", TST_BUTTERFLY_OWIDTH);

        // OWIDTH = TST_BUTTERFLY_OWIDTH;

#else

        fprintf(fp, "OWIDTH=IWIDTH+1;\n");

#endif

        fprintf(fp, "\tparameter\tSHIFT=0;\n");

        fprintf(fp,

        "\t// The number of clocks per each i_ce.  The actual number can be\n"

        "\t// more, but the algorithm depends upon at least this many for\n"

        "\t// extra internal processing.\n"

        "\tparameter    CKPCE=%d;\n", ckpce);

        fprintf(fp,

        "\t//\n"

        "\t// Local/derived parameters that are calculated from the above\n"

        "\t// params.  Apart from algorithmic changes below, these should not\n"

        "\t// be adjusted\n"

        "\t//\n"

        "\t// The first step is to calculate how many clocks it takes our\n"

        "\t// multiply to come back with an answer within.  The time in the\n"

        "\t// multiply depends upon the input value with the fewest number of\n"

        "\t// bits--to keep the pipeline depth short.  So, let's find the\n"

        "\t// fewest number of bits here.\n"

        "\tlocalparam MXMPYBITS = \n"

                "\t\t((IWIDTH+2)>(CWIDTH+1)) ? (CWIDTH+1) : (IWIDTH + 2);\n"

        "\t//\n"

        "\t// Given this \"fewest\" number of bits, we can calculate the\n"

        "\t// number of clocks the multiply itself will take.\n"

        "\tlocalparam   MPYDELAY=((MXMPYBITS+1)/2)+2;\n"

        "\t//\n"

        "\t// In an environment when CKPCE > 1, the multiply delay isn\'t\n"

        "\t// necessarily the delay felt by this algorithm--measured in\n"

        "\t// i_ce\'s.  In particular, if the multiply can operate with more\n"

        "\t// operations per clock, it can appear to finish \"faster\".\n"

        "\t// Since most of the logic in this core operates on the slower\n"

        "\t// clock, we'll need to map that speed into the number of slower\n"

        "\t// clock ticks that it takes.\n"

        "\tlocalparam   LCLDELAY = (CKPCE == 1) ? MPYDELAY\n"

                "\t\t: (CKPCE == 2) ? (MPYDELAY/2+2)\n"

                "\t\t: (MPYDELAY/3 + 2);\n"

        "\tlocalparam   LGDELAY = (MPYDELAY>64) ? 7\n"

                        "\t\t\t: (MPYDELAY > 32) ? 6\n"

                        "\t\t\t: (MPYDELAY > 16) ? 5\n"

                        "\t\t\t: (MPYDELAY >  8) ? 4\n"

                        "\t\t\t: (MPYDELAY >  4) ? 3\n"

                        "\t\t\t: 2;\n"

        "\tlocalparam   AUXLEN=(LCLDELAY+3);\n"

        "\tlocalparam   MPYREMAINDER = MPYDELAY - CKPCE*(MPYDELAY/CKPCE);\n"

"\n\n");

        fprintf(fp,

        "\tinput\twire\ti_clk, %s, i_ce;\n"

        "\tinput\twire\t[(2*CWIDTH-1):0] i_coef;\n"

        "\tinput\twire\t[(2*IWIDTH-1):0] i_left, i_right;\n"

        "\tinput\twire\ti_aux;\n"

        "\toutput\twire [(2*OWIDTH-1):0] o_left, o_right;\n"

        "\toutput\treg\to_aux;\n\n", resetw.c_str());

        if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

        "\tlocalparam   F_LGDEPTH = (AUXLEN > 64) ? 7\n"

                        "\t\t\t: (AUXLEN > 32) ? 6\n"

                        "\t\t\t: (AUXLEN > 16) ? 5\n"

                        "\t\t\t: (AUXLEN >  8) ? 4\n"

                        "\t\t\t: (AUXLEN >  4) ? 3 : 2;\n"

"\n"

        "\tlocalparam   F_DEPTH = AUXLEN;\n"

        "\tlocalparam   [F_LGDEPTH-1:0] F_D = F_DEPTH[F_LGDEPTH-1:0]-1;\n"

"\n"

        "\treg  signed  [IWIDTH-1:0]    f_dlyleft_r  [0:F_DEPTH-1];\n"

        "\treg  signed  [IWIDTH-1:0]    f_dlyleft_i  [0:F_DEPTH-1];\n"

        "\treg  signed  [IWIDTH-1:0]    f_dlyright_r [0:F_DEPTH-1];\n"

        "\treg  signed  [IWIDTH-1:0]    f_dlyright_i [0:F_DEPTH-1];\n"

        "\treg  signed  [CWIDTH-1:0]    f_dlycoeff_r [0:F_DEPTH-1];\n"

        "\treg  signed  [CWIDTH-1:0]    f_dlycoeff_i [0:F_DEPTH-1];\n"

        "\treg  signed  [F_DEPTH-1:0]   f_dlyaux;\n"

"\n"

        "\twire signed  [IWIDTH:0]              f_predifr, f_predifi;\n"

        "\twire signed  [IWIDTH+CWIDTH+3-1:0]   f_predifrx, f_predifix;\n"

        "\twire signed  [CWIDTH:0]              f_sumcoef;\n"

        "\twire signed  [IWIDTH+1:0]            f_sumdiff;\n"

        "\twire signed  [IWIDTH:0]              f_sumr, f_sumi;\n"

        "\twire signed  [IWIDTH+CWIDTH+3-1:0]   f_sumrx, f_sumix;\n"

        "\twire signed  [IWIDTH:0]              f_difr, f_difi;\n"

        "\twire signed  [IWIDTH+CWIDTH+3-1:0]   f_difrx, f_difix;\n"

        "\twire signed  [IWIDTH+CWIDTH+3-1:0]   f_widecoeff_r, f_widecoeff_i;\n"

"\n"

        "\twire [(CWIDTH):0]    fp_one_ic, fp_two_ic, fp_three_ic, f_p3c_in;\n"

        "\twire [(IWIDTH+1):0]  fp_one_id, fp_two_id, fp_three_id, f_p3d_in;\n"

"`endif\n\n");

        fprintf(fp,

        "\treg\t[(2*IWIDTH-1):0]\tr_left, r_right;\n"

        "\treg\t[(2*CWIDTH-1):0]\tr_coef, r_coef_2;\n"

        "\twire\tsigned\t[(IWIDTH-1):0]\tr_left_r, r_left_i, r_right_r, r_right_i;\n"

        "\tassign\tr_left_r  = r_left[ (2*IWIDTH-1):(IWIDTH)];\n"

        "\tassign\tr_left_i  = r_left[ (IWIDTH-1):0];\n"

        "\tassign\tr_right_r = r_right[(2*IWIDTH-1):(IWIDTH)];\n"

        "\tassign\tr_right_i = r_right[(IWIDTH-1):0];\n"

"\n"

        "\treg\tsigned\t[(IWIDTH):0]\tr_sum_r, r_sum_i, r_dif_r, r_dif_i;\n"

"\n"

        "\treg  [(LGDELAY-1):0] fifo_addr;\n"

        "\twire [(LGDELAY-1):0] fifo_read_addr;\n"

        "\tassign\tfifo_read_addr = fifo_addr - LCLDELAY[(LGDELAY-1):0];\n"

        "\treg  [(2*IWIDTH+1):0]        fifo_left [ 0:((1<<LGDELAY)-1)];\n"

"\n");

        fprintf(fp,

        "\t// Set up the input to the multiply\n"

        "\talways @(posedge i_clk)\n"

        "\tif (i_ce)\n"

        "\tbegin\n"

                "\t\t// One clock just latches the inputs\n"

                "\t\tr_left <= i_left;  // No change in # of bits\n"

                "\t\tr_right <= i_right;\n"

                "\t\tr_coef  <= i_coef;\n"

                "\t\t// Next clock adds/subtracts\n"

                "\t\tr_sum_r <= r_left_r + r_right_r; // Now IWIDTH+1 bits\n"

                "\t\tr_sum_i <= r_left_i + r_right_i;\n"

                "\t\tr_dif_r <= r_left_r - r_right_r;\n"

                "\t\tr_dif_i <= r_left_i - r_right_i;\n"

                "\t\t// Other inputs are simply delayed on second clock\n"

                "\t\tr_coef_2<= r_coef;\n"

        "\tend\n"

"\n");

        fprintf(fp,

        "\t// Don\'t forget to record the even side, since it doesn\'t need\n"

        "\t// to be multiplied, but yet we still need the results in sync\n"

        "\t// with the answer when it is ready.\n"

        "\tinitial fifo_addr = 0;\n");

        if (async_reset)

                fprintf(fp, "\talways @(posedge i_clk, negedge i_areset_n)\n\tif (!i_areset_n)\n");

        else

                fprintf(fp, "\talways @(posedge i_clk)\n\tif (i_reset)\n");

        fprintf(fp,

                        "\t\tfifo_addr <= 0;\n"

                "\telse if (i_ce)\n"

                        "\t\t// Need to delay the sum side--nothing else happens\n"

                        "\t\t// to it, but it needs to stay synchronized with the\n"

                        "\t\t// right side.\n"

                        "\t\tfifo_addr <= fifo_addr + 1;\n"

"\n"

        "\talways @(posedge i_clk)\n"

        "\tif (i_ce)\n"

                "\t\tfifo_left[fifo_addr] <= { r_sum_r, r_sum_i };\n"

"\n"

        "\twire\tsigned\t[(CWIDTH-1):0] ir_coef_r, ir_coef_i;\n"

        "\tassign\tir_coef_r = r_coef_2[(2*CWIDTH-1):CWIDTH];\n"

        "\tassign\tir_coef_i = r_coef_2[(CWIDTH-1):0];\n"

        "\twire\tsigned\t[((IWIDTH+2)+(CWIDTH+1)-1):0]\tp_one, p_two, p_three;\n"

"\n"

"\n");

        fprintf(fp,

        "\t// Multiply output is always a width of the sum of the widths of\n"

        "\t// the two inputs.  ALWAYS.  This is independent of the number of\n"

        "\t// bits in p_one, p_two, or p_three.  These values needed to\n"

        "\t// accumulate a bit (or two) each.  However, this approach to a\n"

        "\t// three multiply complex multiply cannot increase the total\n"

        "\t// number of bits in our final output.  We\'ll take care of\n"

        "\t// dropping back down to the proper width, OWIDTH, in our routine\n"

        "\t// below.\n"

"\n"

"\n");

        fprintf(fp,

        "\t// We accomplish here \"Karatsuba\" multiplication.  That is,\n"

        "\t// by doing three multiplies we accomplish the work of four.\n"

        "\t// Let\'s prove to ourselves that this works ... We wish to\n"

        "\t// multiply: (a+jb) * (c+jd), where a+jb is given by\n"

        "\t//\ta + jb = r_dif_r + j r_dif_i, and\n"

        "\t//\tc + jd = ir_coef_r + j ir_coef_i.\n"

        "\t// We do this by calculating the intermediate products P1, P2,\n"

        "\t// and P3 as\n"

        "\t//\tP1 = ac\n"

        "\t//\tP2 = bd\n"

        "\t//\tP3 = (a + b) * (c + d)\n"

        "\t// and then complete our final answer with\n"

        "\t//\tac - bd = P1 - P2 (this checks)\n"

        "\t//\tad + bc = P3 - P2 - P1\n"

        "\t//\t        = (ac + bc + ad + bd) - bd - ac\n"

        "\t//\t        = bc + ad (this checks)\n"

"\n"

"\n");

        fprintf(fp,

        "\t// This should really be based upon an IF, such as in\n"

        "\t// if (IWIDTH < CWIDTH) then ...\n"

        "\t// However, this is the only (other) way I know to do it.\n"

        "\tgenerate if (CKPCE <= 1)\n"

        "\tbegin\n"

"\n"

                "\t\twire\t[(CWIDTH):0]\tp3c_in;\n"

                "\t\twire\t[(IWIDTH+1):0]\tp3d_in;\n"

                "\t\tassign\tp3c_in = ir_coef_i + ir_coef_r;\n"

                "\t\tassign\tp3d_in = r_dif_r + r_dif_i;\n"

                "\n"

                "\t\t// We need to pad these first two multiplies by an extra\n"

                "\t\t// bit just to keep them aligned with the third,\n"

                "\t\t// simpler, multiply.\n"

                "\t\tlongbimpy #(CWIDTH+1,IWIDTH+2) p1(i_clk, i_ce,\n"

                                "\t\t\t\t{ir_coef_r[CWIDTH-1],ir_coef_r},\n"

                                "\t\t\t\t{r_dif_r[IWIDTH],r_dif_r}, p_one");

                if (formal_property_flag) fprintf(fp,

"\n`ifdef\tFORMAL\n"

                                "\t\t\t\t, fp_one_ic, fp_one_id\n"

"`endif\n"

                        "\t\t\t");

                fprintf(fp, ");\n"

                "\t\tlongbimpy #(CWIDTH+1,IWIDTH+2) p2(i_clk, i_ce,\n"

                                "\t\t\t\t{ir_coef_i[CWIDTH-1],ir_coef_i},\n"

                                "\t\t\t\t{r_dif_i[IWIDTH],r_dif_i}, p_two");

                if (formal_property_flag) fprintf(fp,

"\n`ifdef\tFORMAL\n"

                                "\t\t\t\t, fp_two_ic, fp_two_id\n"

"`endif\n"

                        "\t\t\t");

                fprintf(fp, ");\n"

                "\t\tlongbimpy #(CWIDTH+1,IWIDTH+2) p3(i_clk, i_ce,\n"

                        "\t\t\t\tp3c_in, p3d_in, p_three");

                if (formal_property_flag) fprintf(fp,

"\n`ifdef\tFORMAL\n"

                                "\t\t\t\t, fp_three_ic, fp_three_id\n"

"`endif\n"

                        "\t\t\t");

                fprintf(fp, ");\n"

"\n");

        ///////////////////////////////////////////

        ///

        ///     Two clocks per CE, so CE, no-ce, CE, no-ce, etc

        ///

        fprintf(fp,

        "\tend else if (CKPCE == 2)\n"

        "\tbegin : CKPCE_TWO\n"

                "\t\t// Coefficient multiply inputs\n"

                "\t\treg                [2*(CWIDTH)-1:0]        mpy_pipe_c;\n"

                "\t\t// Data multiply inputs\n"

                "\t\treg                [2*(IWIDTH+1)-1:0]      mpy_pipe_d;\n"

                "\t\twire       signed  [(CWIDTH-1):0]  mpy_pipe_vc;\n"

                "\t\twire       signed  [(IWIDTH):0]    mpy_pipe_vd;\n"

                "\t\t//\n"

                "\t\treg        signed  [(CWIDTH+1)-1:0]        mpy_cof_sum;\n"

                "\t\treg        signed  [(IWIDTH+2)-1:0]        mpy_dif_sum;\n"

"\n"

                "\t\tassign     mpy_pipe_vc =  mpy_pipe_c[2*(CWIDTH)-1:CWIDTH];\n"

                "\t\tassign     mpy_pipe_vd =  mpy_pipe_d[2*(IWIDTH+1)-1:IWIDTH+1];\n"

"\n"

                "\t\treg                        mpy_pipe_v;\n"

                "\t\treg                        ce_phase;\n"

"\n"

                "\t\treg        signed  [(CWIDTH+IWIDTH+3)-1:0] mpy_pipe_out;\n"

                "\t\treg        signed [IWIDTH+CWIDTH+3-1:0]    longmpy;\n"

"\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                "\t\twire       [CWIDTH:0]      f_past_ic;\n"

                "\t\twire       [IWIDTH+1:0]    f_past_id;\n"

                "\t\twire       [CWIDTH:0]      f_past_mux_ic;\n"

                "\t\twire       [IWIDTH+1:0]    f_past_mux_id;\n"

"\n"

                "\t\treg        [CWIDTH:0]      f_rpone_ic, f_rptwo_ic, f_rpthree_ic,\n"

                                        "\t\t\t\t\tf_rp2one_ic, f_rp2two_ic, f_rp2three_ic;\n"

                "\t\treg        [IWIDTH+1:0]    f_rpone_id, f_rptwo_id, f_rpthree_id,\n"

                                        "\t\t\t\t\tf_rp2one_id, f_rp2two_id, f_rp2three_id;\n"

"`endif\n\n");

                fprintf(fp,

"\n"

                "\t\tinitial    ce_phase = 1'b0;\n"

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (i_reset)\n"

                        "\t\t\tce_phase <= 1'b0;\n"

                "\t\telse if (i_ce)\n"

                        "\t\t\tce_phase <= 1'b1;\n"

                "\t\telse\n"

                        "\t\t\tce_phase <= 1'b0;\n"

"\n"

                "\t\talways @(*)\n"

                        "\t\t\tmpy_pipe_v = (i_ce)||(ce_phase);\n"

"\n"

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (ce_phase)\n"

                "\t\tbegin\n"

                        "\t\t\tmpy_pipe_c[2*CWIDTH-1:0] <=\n"

                                "\t\t\t\t\t{ ir_coef_r, ir_coef_i };\n"

                        "\t\t\tmpy_pipe_d[2*(IWIDTH+1)-1:0] <=\n"

                                "\t\t\t\t\t{ r_dif_r, r_dif_i };\n"

"\n"

                        "\t\t\tmpy_cof_sum  <= ir_coef_i + ir_coef_r;\n"

                        "\t\t\tmpy_dif_sum <= r_dif_r + r_dif_i;\n"

"\n"

                "\t\tend else if (i_ce)\n"

                "\t\tbegin\n"

                        "\t\t\tmpy_pipe_c[2*(CWIDTH)-1:0] <= {\n"

                                "\t\t\t\tmpy_pipe_c[(CWIDTH)-1:0], {(CWIDTH){1'b0}} };\n"

                        "\t\t\tmpy_pipe_d[2*(IWIDTH+1)-1:0] <= {\n"

                                "\t\t\t\tmpy_pipe_d[(IWIDTH+1)-1:0], {(IWIDTH+1){1'b0}} };\n"

                "\t\tend\n"

"\n");

        fprintf(fp,

                "\t\tlongbimpy #(CWIDTH+1,IWIDTH+2) mpy0(i_clk, mpy_pipe_v,\n"

                        "\t\t\t\tmpy_cof_sum, mpy_dif_sum, longmpy\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\t\t, f_past_ic, f_past_id\n"

"`endif\n");

        fprintf(fp,"\t\t\t);\n"

"\n");

        fprintf(fp,

                "\t\tlongbimpy #(CWIDTH+1,IWIDTH+2) mpy1(i_clk, mpy_pipe_v,\n"

                        "\t\t\t\t{ mpy_pipe_vc[CWIDTH-1], mpy_pipe_vc },\n"

                        "\t\t\t\t{ mpy_pipe_vd[IWIDTH  ], mpy_pipe_vd },\n"

                        "\t\t\t\tmpy_pipe_out\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\t\t, f_past_mux_ic, f_past_mux_id\n"

"`endif\n");

        fprintf(fp,"\t\t\t);\n"

"\n");

        fprintf(fp,

                "\t\treg\tsigned\t[((IWIDTH+2)+(CWIDTH+1)-1):0]\n"

                        "\t\t\t\t\trp_one, rp_two, rp_three,\n"

                        "\t\t\t\t\trp2_one, rp2_two, rp2_three;\n"

"\n"

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (((i_ce)&&(!MPYDELAY[0]))\n"

                "\t\t\t||((ce_phase)&&(MPYDELAY[0])))\n"

                "\t\tbegin\n"

                        "\t\t\trp_one <= mpy_pipe_out;\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\tf_rpone_ic <= f_past_mux_ic;\n"

                        "\t\t\tf_rpone_id <= f_past_mux_id;\n"

"`endif\n");

                fprintf(fp,

                "\t\tend\n\n");

                fprintf(fp,

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (((i_ce)&&(MPYDELAY[0]))\n"

                "\t\t\t||((ce_phase)&&(!MPYDELAY[0])))\n"

                "\t\tbegin\n"

                        "\t\t\trp_two <= mpy_pipe_out;\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\tf_rptwo_ic <= f_past_mux_ic;\n"

                        "\t\t\tf_rptwo_id <= f_past_mux_id;\n"

"`endif\n");

                fprintf(fp,

                "\t\tend\n\n");

                fprintf(fp,

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (i_ce)\n"

                "\t\tbegin\n"

                        "\t\t\trp_three <= longmpy;\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\tf_rpthree_ic <= f_past_ic;\n"

                        "\t\t\tf_rpthree_id <= f_past_id;\n"

"`endif\n");

                fprintf(fp,

                "\t\tend\n"

"\n\n");

                fprintf(fp,

                "\t\t// Our outputs *MUST* be set on a clock where i_ce is\n"

                "\t\t// true for the following logic to work.  Make that\n"

                "\t\t// happen here.\n"

                "\t\talways @(posedge i_clk)\n"

                "\t\tif (i_ce)\n"

                "\t\tbegin\n"

                        "\t\t\trp2_one<= rp_one;\n"

                        "\t\t\trp2_two <= rp_two;\n"

                        "\t\t\trp2_three<= rp_three;\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                        "\t\t\tf_rp2one_ic <= f_rpone_ic;\n"

                        "\t\t\tf_rp2one_id <= f_rpone_id;\n"

"\n"

                        "\t\t\tf_rp2two_ic <= f_rptwo_ic;\n"

                        "\t\t\tf_rp2two_id <= f_rptwo_id;\n"

"\n"

                        "\t\t\tf_rp2three_ic <= f_rpthree_ic;\n"

                        "\t\t\tf_rp2three_id <= f_rpthree_id;\n"

"`endif\n");

                fprintf(fp,

                "\t\tend\n"

"\n"

                "\t\tassign     p_one   = rp2_one;\n"

                "\t\tassign     p_two   = (!MPYDELAY[0])? rp2_two  : rp_two;\n"

                "\t\tassign     p_three = ( MPYDELAY[0])? rp_three : rp2_three;\n"

"\n"

                "\t\t// verilator lint_off UNUSED\n"

                "\t\twire\t[2*(IWIDTH+CWIDTH+3)-1:0]\tunused;\n"

                "\t\tassign\tunused = { rp2_two, rp2_three };\n"

                "\t\t// verilator lint_on  UNUSED\n"

"\n");

                if (formal_property_flag) fprintf(fp,

"`ifdef FORMAL\n"

                "\t\tassign fp_one_ic = f_rp2one_ic;\n"

                "\t\tassign fp_one_id = f_rp2one_id;\n"

"\n"

                "\t\tassign fp_two_ic = (!MPYDELAY[0])? f_rp2two_ic : f_rptwo_ic;\n"

                "\t\tassign fp_two_id = (!MPYDELAY[0])? f_rp2two_id : f_rptwo_id;\n"

"\n"

                "\t\tassign fp_three_ic= (MPYDELAY[0])? f_rpthree_ic : f_rp2three_ic;\n"

                "\t\tassign fp_three_id= (MPYDELAY[0])? f_rpthree_id : f_rp2three_id;\n"

"`endif\n\n");

        /////////////////////////

        ///

        ///     Three clock per CE, so CE, no-ce, no-ce*, CE

        ///

        fprintf(fp,

"\tend else if (CKPCE <= 3)\n\tbegin : CKPCE_THREE\n");

        fprintf(fp,

        "\t\t// Coefficient multiply inputs\n"

        "\t\treg\t\t[3*(CWIDTH+1)-1:0]\tmpy_pipe_c;\n"

        "\t\t// Data multiply inputs\n"

        "\t\treg\t\t[3*(IWIDTH+2)-1:0]\tmpy_pipe_d;\n"

        "\t\twire\tsigned       [(CWIDTH):0]    mpy_pipe_vc;\n"

        "\t\twire\tsigned       [(IWIDTH+1):0]  mpy_pipe_vd;\n"

        "\n"

        "\t\tassign\tmpy_pipe_vc =  mpy_pipe_c[3*(CWIDTH+1)-1:2*(CWIDTH+1)];\n"

        "\t\tassign\tmpy_pipe_vd =  mpy_pipe_d[3*(IWIDTH+2)-1:2*(IWIDTH+2)];\n"

        "\n"

        "\t\treg\t\t\tmpy_pipe_v;\n"