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[/] [esoc/] [trunk/] [Sources/] [altera/] [esoc_port_mac/] [esoc_port_mac.cmp] - Blame information for rev 42

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1 42 lmaarsen
-- Generated by Triple Speed Ethernet 8.1 [Altera, IP Toolbench 1.3.0 Build 163]
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-- ************************************************************
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-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
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-- ************************************************************
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-- Copyright (C) 1991-2013 Altera Corporation
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-- Any megafunction design, and related net list (encrypted or decrypted),
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-- support information, device programming or simulation file, and any other
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-- associated documentation or information provided by Altera or a partner
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-- under Altera's Megafunction Partnership Program may be used only to
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-- program PLD devices (but not masked PLD devices) from Altera.  Any other
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-- use of such megafunction design, net list, support information, device
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-- programming or simulation file, or any other related documentation or
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-- information is prohibited for any other purpose, including, but not
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-- limited to modification, reverse engineering, de-compiling, or use with
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-- any other silicon devices, unless such use is explicitly licensed under
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-- a separate agreement with Altera or a megafunction partner.  Title to
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-- the intellectual property, including patents, copyrights, trademarks,
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-- trade secrets, or maskworks, embodied in any such megafunction design,
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-- net list, support information, device programming or simulation file, or
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-- any other related documentation or information provided by Altera or a
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-- megafunction partner, remains with Altera, the megafunction partner, or
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-- their respective licensors.  No other licenses, including any licenses
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-- needed under any third party's intellectual property, are provided herein.
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component esoc_port_mac
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        PORT (
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                ff_tx_crc_fwd   : IN STD_LOGIC;
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                ff_tx_data      : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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                ff_tx_eop       : IN STD_LOGIC;
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                ff_tx_err       : IN STD_LOGIC;
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                ff_tx_mod       : IN STD_LOGIC_VECTOR (1 DOWNTO 0);
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                ff_tx_sop       : IN STD_LOGIC;
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                ff_tx_wren      : IN STD_LOGIC;
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                ff_tx_clk       : IN STD_LOGIC;
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                ff_rx_rdy       : IN STD_LOGIC;
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                ff_rx_clk       : IN STD_LOGIC;
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                address : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
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                read    : IN STD_LOGIC;
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                writedata       : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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                write   : IN STD_LOGIC;
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                clk     : IN STD_LOGIC;
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                reset   : IN STD_LOGIC;
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                rgmii_in        : IN STD_LOGIC_VECTOR (3 DOWNTO 0);
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                rx_control      : IN STD_LOGIC;
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                tx_clk  : IN STD_LOGIC;
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                rx_clk  : IN STD_LOGIC;
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                set_10  : IN STD_LOGIC;
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                set_1000        : IN STD_LOGIC;
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                xon_gen : IN STD_LOGIC;
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                xoff_gen        : IN STD_LOGIC;
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                magic_sleep_n   : IN STD_LOGIC;
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                mdio_in : IN STD_LOGIC;
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                ff_tx_rdy       : OUT STD_LOGIC;
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                ff_rx_data      : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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                ff_rx_dval      : OUT STD_LOGIC;
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                ff_rx_eop       : OUT STD_LOGIC;
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                ff_rx_mod       : OUT STD_LOGIC_VECTOR (1 DOWNTO 0);
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                ff_rx_sop       : OUT STD_LOGIC;
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                rx_err  : OUT STD_LOGIC_VECTOR (5 DOWNTO 0);
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                rx_err_stat     : OUT STD_LOGIC_VECTOR (17 DOWNTO 0);
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                rx_frm_type     : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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                ff_rx_dsav      : OUT STD_LOGIC;
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                readdata        : OUT STD_LOGIC_VECTOR (31 DOWNTO 0);
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                waitrequest     : OUT STD_LOGIC;
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                rgmii_out       : OUT STD_LOGIC_VECTOR (3 DOWNTO 0);
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                tx_control      : OUT STD_LOGIC;
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                ena_10  : OUT STD_LOGIC;
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                eth_mode        : OUT STD_LOGIC;
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                ff_tx_septy     : OUT STD_LOGIC;
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                tx_ff_uflow     : OUT STD_LOGIC;
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                ff_rx_a_full    : OUT STD_LOGIC;
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                ff_rx_a_empty   : OUT STD_LOGIC;
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                ff_tx_a_full    : OUT STD_LOGIC;
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                ff_tx_a_empty   : OUT STD_LOGIC;
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                magic_wakeup    : OUT STD_LOGIC;
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                mdio_out        : OUT STD_LOGIC;
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                mdio_oen        : OUT STD_LOGIC;
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                mdc     : OUT STD_LOGIC
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        );
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end component;

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