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[/] [esoc/] [trunk/] [Sources/] [altera/] [esoc_port_mac/] [testbench/] [esoc_port_mac/] [run_esoc_port_mac_tb.tcl] - Blame information for rev 42

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1 42 lmaarsen
# Copyright (C) 1991-2008 Altera Corporation
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# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
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# support information,  device programming or simulation file,  and any other
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# associated  documentation or information  provided by  Altera  or a partner
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# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
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# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
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# other  use  of such  megafunction  design,  netlist,  support  information,
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# device programming or simulation file,  or any other  related documentation
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# or information  is prohibited  for  any  other purpose,  including, but not
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# limited to  modification,  reverse engineering,  de-compiling, or use  with
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# any other  silicon devices,  unless such use is  explicitly  licensed under
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# a separate agreement with  Altera  or a megafunction partner.  Title to the
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# intellectual property,  including patents,  copyrights,  trademarks,  trade
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# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
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# support  information,  device programming or simulation file,  or any other
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# related documentation or information provided by  Altera  or a megafunction
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# partner, remains with Altera, the megafunction partner, or their respective
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# licensors. No other licenses, including any licenses needed under any third
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# party's intellectual property, are provided herein.
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global env ;
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if [regexp {ModelSim ALTERA} [vsim -version]] {
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        ;# Using OEM Version?s ModelSIM .ini file (modelsim.ini at ModelSIM Altera installation directory)
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} else {
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        # Using non-OEM Version, compile all of the libraries
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        vlib lpm
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        vmap lpm lpm
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        vcom -93 -work lpm $env(QUARTUS_ROOTDIR)/eda/sim_lib/220pack.vhd
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        vcom -93 -work lpm $env(QUARTUS_ROOTDIR)/eda/sim_lib/220model.vhd
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        vlib altera_mf
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        vmap altera_mf altera_mf
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        vcom -93 -work altera_mf $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf_components.vhd
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        vcom -93 -work altera_mf $env(QUARTUS_ROOTDIR)/eda/sim_lib/altera_mf.vhd
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        vlib sgate
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        vmap sgate sgate
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        vcom -93 -work sgate $env(QUARTUS_ROOTDIR)/eda/sim_lib/sgate_pack.vhd
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        vcom -93 -work sgate $env(QUARTUS_ROOTDIR)/eda/sim_lib/sgate.vhd
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}
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# Create the work library
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vlib work
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# Now compile the VHDL files one by one 
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vcom -work work -93 ../../esoc_port_mac.vho
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vcom -work work -93 ../model/*.vhd
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vcom -work work -93 *.vhd
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# Now run the simulation 
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vsim\
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-novopt\
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-t ps\
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-GTB_RXFRAMES="0"\
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-GTB_MACINSERT_ADDR="false"\
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-GTB_PROMIS_ENA="true"\
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tb
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set NumericStdNoWarnings 1
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set StdArithNoWarnings 1
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onbreak { resume }
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do esoc_port_mac_wave.do
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run -all
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