OpenCores
URL https://opencores.org/ocsvn/fluid_core_2/fluid_core_2/trunk

Subversion Repositories fluid_core_2

[/] [fluid_core_2/] [trunk/] [rtl/] [Programming.v] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 azmathmoos
//////////////////////////////////////////////////////////////////////
2
////                                                              ////
3
//// Copyright (C) 2014-2015 Azmath Moosa                         ////
4
////                                                              ////
5
//// This source file may be used and distributed without         ////
6
//// restriction provided that this copyright statement is not    ////
7
//// removed from the file and that any derivative work contains  ////
8
//// the original copyright notice and the associated disclaimer. ////
9
////                                                              ////
10
//// This source file is free software; you can redistribute it   ////
11
//// and/or modify it under the terms of the GNU Lesser General   ////
12
//// Public License as published by the Free Software Foundation; ////
13
//// either version 3 of the License, or (at your option) any     ////
14
//// later version.                                               ////
15
////                                                              ////
16
//// This source is distributed in the hope that it will be       ////
17
//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
18
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
19
//// PURPOSE.  See the GNU Lesser General Public License for more ////
20
//// details.                                                     ////
21
////                                                              ////
22
//// You should have received a copy of the GNU Lesser General    ////
23
//// Public License along with this source; if not, download it   ////
24
//// from http://www.opencores.org/lgpl.shtml                     ////
25
////                                                              ////
26
//////////////////////////////////////////////////////////////////////
27
`timescale 1ns / 1ps
28
 
29
`define dR0 5'b0000
30
`define dR1 5'b0001
31
`define dR2 5'b0010
32
`define dR3 5'b0011
33
`define dR4 5'b0100
34
`define dR5 5'b0101
35
`define dR6 5'b0110
36
`define dR7 5'b0111
37
 
38
`define R0 3'b000
39
`define R1 3'b001
40
`define R2 3'b010
41
`define R3 3'b011
42
`define R4 3'b100
43
`define R5 3'b101
44
`define R6 3'b110
45
`define R7 3'b111
46
 
47
`define iNone_RRR 'd0
48
`define iADD_RRR 'd1
49
`define iADD_RRI 'd2
50
`define iSUB_RRR 'd3
51
`define iSUB_RRI 'd4
52
`define iADC_RRR 'd5
53
`define iADC_RRI 'd6
54
`define iSBC_RRR 'd7
55
`define iSBC_RRI 'd8
56
`define iAND_RRR 'd9
57
`define iAND_RRI 'd10
58
`define iOR_RRR 'd11
59
`define iOR_RRI 'd12
60
`define iXOR_RRR 'd13
61
`define iXOR_RRI 'd14
62
`define iBranch_RRR 'd15
63
`define iBranch_RRI 'd16
64
`define iBranch_RI 'd17
65
`define iLoad_RRR 'd18
66
`define iLoad_RRI 'd19
67
`define iLoad_RI 'd20
68
`define iStore_sRR 'd21
69
`define iStore_sRI 'd22
70
`define iAddVector_RI 'd23
71
`define iAdduOP_RI 'd24
72
`define iAdduOP_RRI 'd25

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.