URL https://opencores.org/ocsvn/fpga-cf/fpga-cf/trunk

Subversion Repositories fpga-cf

[/] [fpga-cf/] [trunk/] [hdl/] [sha1/] [sim.do] - Blame information for rev 2

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quit -sim
vlib work
 
 
vlog ./dffhr.v
vlog ./sha1_round.v
vlog ./sha1_exec.v
vlog ./port_sha1.v
vlog ./port_sha1_tb.v
 
vsim -voptargs=+acc port_sha1_tb
 
add wave -hex /port_sha1_tb/*
add wave -hex /port_sha1_tb/DUT/*
 
run 2000ns

Line No.	Rev	Author	Line
1	2	peteralieb	`quit -sim`
2			`vlib work`
3
4
5			`vlog ./dffhr.v`
6			`vlog ./sha1_round.v`
7			`vlog ./sha1_exec.v`
8			`vlog ./port_sha1.v`
9			`vlog ./port_sha1_tb.v`
10
11			`vsim -voptargs=+acc port_sha1_tb`
12
13			`add wave -hex /port_sha1_tb/*`
14			`add wave -hex /port_sha1_tb/DUT/*`
15
16			`run 2000ns`

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Subversion Repositories fpga-cf

[/] [fpga-cf/] [trunk/] [hdl/] [sha1/] [sim.do] - Blame information for rev 2