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peteralieb |
# PATLPP assembler functions
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pc = 0
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def INITCODE():
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pc = 0
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print '''
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module microcodesrc
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(
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input wire [8:0] addr,
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output reg [66:0] code
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);
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always @(addr)
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begin
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case (addr)
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// code: { <jmp,rst>
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// | <in_rdy,out_rdy,aeof,asof>
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// | | <predmode>
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// | | | <pred: fcs,eof,sof,equ,dst,src>
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// | | | | <High Byte Reg En>
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// | | | | | <Output Byte Select>
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// | | | | | | <Outport_reg_en, Inport_eg_en>
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// | | | | | | | <Data Mux Select>
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// | | | | | | | | <Op 0 Select>
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// | | | | | | | | | <Op 1 Select>
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// | | | | | | | | | | <Register Address>
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// | | | | | | | | | | | <Register Write Enables>
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// | | | | | | | | | | | | <FCS Add, FCS Clear>
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// | | | | | | | | | | | | | <sr1ie,sr2ie,sr1oe,sr2oe>
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// | | | | | | | | | | | | | | <Flag Register>
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// | | | | | | | | | | | | | | | <Compare Mode>
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// | | | | | | | | | | | | | | | | <ALU Op>
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// | | | | | | | | | | | | | | | | | <Byte Constant>
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// | | | | | | | | | | | | | | | | | | <Word Constant> }'''
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def ENDCODE():
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print '''
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default: code <= 0;
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endcase
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end
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endmodule'''
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def IN(dest, cond=None, flags=None):
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global pc
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"Input data from a port into the processor"
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if flags == None:
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flagss = "None"
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elif not isinstance(flags, list):
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flagss = str(flags)
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else:
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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inst = Instruction("IN(" + str(dest) + ", Cond=" + str(cond) + ", Flags=" + flagss + ")")
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# Source Processing
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inst.data_mux_s = 3
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inst.input_rdy = True
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# Predicate Mode Processing
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if (cond == None):
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inst.pred_mode = 0
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elif (isinstance(cond, WHEN)):
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inst.pred_mode = 0
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elif (isinstance(cond, UNTIL)):
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inst.pred_mode = 1
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elif (isinstance(cond, IF)):
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inst.pred_mode = 2
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# Predicates
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inst.pred_src = True
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inst.processCond(cond)
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inst.processFlags(flags)
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# Destination Processing
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if isinstance(dest, R):
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inst.reg_addr = dest.address
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inst.reg_wen = 0
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if dest.low: inst.reg_wen += 1
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if dest.high: inst.reg_wen += 2
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elif isinstance(dest, SR):
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if dest.sr_num == 1: inst.sr1_in_en = True
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elif dest.sr_num == 2: inst.sr2_in_en = True
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elif isinstance(dest, HBR):
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inst.highbyte_reg_en = True
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elif isinstance(dest, OPR):
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inst.outport_reg_en = True
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else:
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print("Bad Destination")
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return 0;
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print inst
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pc += 1
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def OUT(source, cond=None, flags=None):
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global pc
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if flags == None:
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flagss = "None"
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elif not isinstance(flags, list):
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flagss = str(flags)
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else:
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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inst = Instruction("OUT(" + str(source) + ", Cond=" + str(cond) + ", Flags=" + flagss + ")")
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# Destination Processing
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inst.output_byte_s = 0
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inst.output_rdy = True
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# Predicate Mode Processing
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if (cond == None):
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inst.pred_mode = 0
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elif (isinstance(cond, WHEN)):
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inst.pred_mode = 0
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elif (isinstance(cond, UNTIL)):
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inst.pred_mode = 1
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elif (isinstance(cond, IF)):
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inst.pred_mode = 2
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# Predicates
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inst.pred_dst = True
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inst.processCond(cond)
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inst.processFlags(flags)
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# Source Processing
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if isinstance(source, C):
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inst.data_mux_s = 0
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inst.const_word = source.value
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elif isinstance(source, CS):
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inst.data_mux_s = 1
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if source.high_byte_s:
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inst.output_byte_s = 1
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elif isinstance(source, R):
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inst.data_mux_s = 2
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inst.reg_addr = source.address
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if source.high_byte_s:
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inst.output_byte_s = 1
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elif isinstance(source, SR):
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inst.data_mux_s = 4
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if source.sr_num == 1:
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inst.sr1_out_en = True
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if source.sr_num == 2:
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inst.sr2_out_en = True
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print inst
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pc += 1
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| 138 |
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def BYP(cond=None, flags=None):
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global pc
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if flags == None:
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flagss = "None"
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elif not isinstance(flags, list):
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flagss = str(flags)
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else:
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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inst = Instruction("BYP(Cond=" + str(cond) + ", Flags=" + flagss + ")")
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inst.output_rdy = True
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inst.input_rdy = True
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inst.data_mux_s = 3
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| 150 |
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# Predicate Mode Processing
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if (cond == None):
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inst.pred_mode = 0
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elif (isinstance(cond, WHEN)):
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inst.pred_mode = 0
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elif (isinstance(cond, UNTIL)):
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inst.pred_mode = 1
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elif (isinstance(cond, IF)):
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inst.pred_mode = 2
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inst.pred_src = True
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inst.pred_dst = True
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# Predicates
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inst.processCond(cond)
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inst.processFlags(flags)
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print inst
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pc += 1
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def CSA(source):
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global pc
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inst = Instruction("CSA(" + str(source) + ")") # + ", Cond=" + str(cond) + ", Flags=" + str((flags.count > 0)) + ")")
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inst.fcs_add = True
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if isinstance(source, C):
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inst.data_mux_s = 0
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inst.const_word = source.value
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elif isinstance(source, CS):
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inst.data_mux_s = 1
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if source.high_byte_s:
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inst.output_byte_s = 1
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elif isinstance(source, R):
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inst.data_mux_s = 2
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inst.reg_addr = source.address
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elif isinstance(source, P):
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inst.data_mux_s = 3
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inst.input_rdy = True
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inst.pred_mode = 0
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inst.pred_src = True
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if isinstance(source.address, int):
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inst.const_byte = dest.address
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inst.pa_s = 0
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elif isinstance(source.address, R):
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inst.pa_s = 1
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inst.reg_addr = source.address.address
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| 192 |
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else:
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print "Bad Source"
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return 0
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elif isinstance(source, SR):
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inst.data_mux_s = 4
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| 197 |
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if source.sr_num == 1:
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inst.sr1_out_en = True
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| 199 |
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if source.sr_num == 2:
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inst.sr2_out_en = True
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print inst
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pc += 1
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| 203 |
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| 204 |
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def CSC():
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| 205 |
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global pc
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inst = Instruction("CSC()")
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inst.fcs_clr = True
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| 208 |
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print inst
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pc += 1
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| 210 |
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| 211 |
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def JMP(loc, cond=None, flags=None):
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| 212 |
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global pc
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| 213 |
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if flags == None:
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| 214 |
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flagss = "None"
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| 215 |
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elif not isinstance(flags, list):
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| 216 |
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flagss = str(flags)
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| 217 |
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else:
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| 218 |
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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| 219 |
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inst = Instruction("JMP(" + str(loc) + ", Cond=" + str(cond) + ", Flags=" + flagss + ")")
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| 220 |
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if not isinstance(loc, int):
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| 221 |
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if loc not in globals().keys():
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| 222 |
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print("Bad Location")
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| 223 |
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print "Loc: ", loc, ", globals().items(): ", globals().items()
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| 224 |
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return 0
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| 225 |
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loc = globals[loc]
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| 226 |
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inst.const_byte = loc
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| 227 |
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inst.jump = True
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| 228 |
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# Predicate Mode Processing
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| 229 |
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if (cond == None):
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| 230 |
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inst.pred_mode = 0
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| 231 |
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elif (isinstance(cond, WHEN)):
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| 232 |
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inst.pred_mode = 0
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| 233 |
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elif (isinstance(cond, UNTIL)):
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| 234 |
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inst.pred_mode = 1
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| 235 |
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elif (isinstance(cond, IF)):
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| 236 |
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inst.pred_mode = 2
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| 237 |
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# Predicates
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| 238 |
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inst.processCond(cond)
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| 239 |
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inst.processFlags(flags)
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| 240 |
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print inst
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| 241 |
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pc += 1
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| 242 |
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| 243 |
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def RST(cond=None, flags=None):
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| 244 |
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global pc
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| 245 |
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if flags == None:
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| 246 |
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flagss = "None"
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| 247 |
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elif not isinstance(flags, list):
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| 248 |
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flagss = str(flags)
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| 249 |
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else:
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| 250 |
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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| 251 |
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inst = Instruction("RST(Cond=" + str(cond) + ", Flags=" + flagss + ")")
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| 252 |
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inst.reset = True
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| 253 |
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if (cond == None):
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| 254 |
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inst.pred_mode = 0
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| 255 |
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elif (isinstance(cond, WHEN)):
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| 256 |
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inst.pred_mode = 0
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| 257 |
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elif (isinstance(cond, UNTIL)):
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| 258 |
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inst.pred_mode = 1
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| 259 |
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elif (isinstance(cond, IF)):
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| 260 |
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inst.pred_mode = 2
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| 261 |
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# Predicates
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| 262 |
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inst.processCond(cond)
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| 263 |
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inst.processFlags(flags)
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| 264 |
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print inst
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| 265 |
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pc += 1
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| 266 |
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| 267 |
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def ADD(op0, op1, dest, cond=None, flags=None):
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| 268 |
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global pc
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| 269 |
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if flags == None:
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| 270 |
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flagss = "None"
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| 271 |
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elif not isinstance(flags, list):
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| 272 |
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flagss = str(flags)
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| 273 |
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else:
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| 274 |
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flagss = "[" + ", ".join(map(str, flags)) + "]"
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| 275 |
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inst = Instruction("ADD(" + str(op0) + ", " + str(op1) + ", " + str(dest) + ", Cond=" + str(cond) + "Flags=" + flagss + ")")
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| 276 |
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inst.alu_op = 0
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| 277 |
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inst.data_mux_s = 5
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| 278 |
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# Source 0 Processing
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| 279 |
|
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if isinstance(op0, C):
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| 280 |
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inst.op0_mux_s = 0
|
| 281 |
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inst.const_word = op0.value
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| 282 |
|
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elif isinstance(op0, P):
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| 283 |
|
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inst.op0_mux_s = 1
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| 284 |
|
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inst.const_byte = op0.address
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| 285 |
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elif isinstance(op0, FR):
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| 286 |
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inst.op0_mux_s = 2
|
| 287 |
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elif isinstance(op0, R):
|
| 288 |
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inst.op0_mux_s = 3
|
| 289 |
|
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inst.reg_addr = op0.address
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| 290 |
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# Source 1 Processing
|
| 291 |
|
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if isinstance(op1, C):
|
| 292 |
|
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inst.op1_mux_s = 0
|
| 293 |
|
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inst.const_word = op1.value
|
| 294 |
|
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elif isinstance(op1, R):
|
| 295 |
|
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inst.op1_mux_s = 1
|
| 296 |
|
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inst.reg_addr = op1.address
|
| 297 |
|
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# Destination Processing
|
| 298 |
|
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if isinstance(dest, R):
|
| 299 |
|
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inst.reg_addr = dest.address
|
| 300 |
|
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inst.reg_wen = 0
|
| 301 |
|
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if dest.low: inst.reg_wen += 1
|
| 302 |
|
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if dest.high: inst.reg_wen += 2
|
| 303 |
|
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elif isinstance(dest, SR):
|
| 304 |
|
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if dest.sr_num == 1: inst.sr1_in_en = True
|
| 305 |
|
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elif dest.sr_num == 2: inst.sr2_in_en = True
|
| 306 |
|
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else:
|
| 307 |
|
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print("Bad Destination")
|
| 308 |
|
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return 0;
|
| 309 |
|
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# Predicates
|
| 310 |
|
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inst.processCond(cond)
|
| 311 |
|
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inst.processFlags(flags)
|
| 312 |
|
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print inst
|
| 313 |
|
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pc += 1
|
| 314 |
|
|
|
| 315 |
|
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def SUB(op0, op1, dest, cond=None, flags=None):
|
| 316 |
|
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global pc
|
| 317 |
|
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if flags == None:
|
| 318 |
|
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flagss = "None"
|
| 319 |
|
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elif not isinstance(flags, list):
|
| 320 |
|
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flagss = str(flags)
|
| 321 |
|
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else:
|
| 322 |
|
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flagss = "[" + ", ".join(map(str, flags)) + "]"
|
| 323 |
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inst = Instruction("SUB(" + str(op0) + ", " + str(op1) + ", " + str(dest) + ", Cond=" + str(cond) + "Flags=" + flagss + ")")
|
| 324 |
|
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inst.alu_op = 1
|
| 325 |
|
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inst.data_mux_s = 5
|
| 326 |
|
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# Source 0 Processing
|
| 327 |
|
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if isinstance(op0, C):
|
| 328 |
|
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inst.op0_mux_s = 0
|
| 329 |
|
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inst.const_word = op0.value
|
| 330 |
|
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elif isinstance(op0, P):
|
| 331 |
|
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inst.op0_mux_s = 1
|
| 332 |
|
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inst.const_byte = op0.address
|
| 333 |
|
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elif isinstance(op0, FR):
|
| 334 |
|
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inst.op0_mux_s = 2
|
| 335 |
|
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elif isinstance(op0, R):
|
| 336 |
|
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inst.op0_mux_s = 3
|
| 337 |
|
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inst.reg_addr = op0.address
|
| 338 |
|
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# Source 1 Processing
|
| 339 |
|
|
if isinstance(op1, C):
|
| 340 |
|
|
inst.op1_mux_s = 0
|
| 341 |
|
|
inst.const_word = op1.value
|
| 342 |
|
|
elif isinstance(op1, R):
|
| 343 |
|
|
inst.op1_mux_s = 1
|
| 344 |
|
|
inst.reg_addr = op1.address
|
| 345 |
|
|
# Destination Processing
|
| 346 |
|
|
if isinstance(dest, R):
|
| 347 |
|
|
inst.reg_addr = dest.address
|
| 348 |
|
|
inst.reg_wen = 0
|
| 349 |
|
|
if dest.low: inst.reg_wen += 1
|
| 350 |
|
|
if dest.high: inst.reg_wen += 2
|
| 351 |
|
|
elif isinstance(dest, SR):
|
| 352 |
|
|
if dest.sr_num == 1: inst.sr1_in_en = True
|
| 353 |
|
|
elif dest.sr_num == 2: inst.sr2_in_en = True
|
| 354 |
|
|
else:
|
| 355 |
|
|
print("Bad Destination")
|
| 356 |
|
|
return 0;
|
| 357 |
|
|
# Predicates
|
| 358 |
|
|
inst.processCond(cond)
|
| 359 |
|
|
inst.processFlags(flags)
|
| 360 |
|
|
print inst
|
| 361 |
|
|
pc += 1
|
| 362 |
|
|
|
| 363 |
|
|
def MOV(source, dest, cond=None, flags=None):
|
| 364 |
|
|
global pc
|
| 365 |
|
|
if flags == None:
|
| 366 |
|
|
flagss = "None"
|
| 367 |
|
|
elif not isinstance(flags, list):
|
| 368 |
|
|
flagss = str(flags)
|
| 369 |
|
|
else:
|
| 370 |
|
|
flagss = "[" + ", ".join(map(str, flags)) + "]"
|
| 371 |
|
|
inst = Instruction("MOV(" + str(source) + "," + str(dest) + ", Cond=" + str(cond) + ", Flags=" + flagss + ")")
|
| 372 |
|
|
# Source Processing
|
| 373 |
|
|
if isinstance(source, C):
|
| 374 |
|
|
inst.data_mux_s = 0
|
| 375 |
|
|
inst.const_word = source.value
|
| 376 |
|
|
elif isinstance(source, CS):
|
| 377 |
|
|
inst.data_mux_s = 1
|
| 378 |
|
|
elif isinstance(source, R):
|
| 379 |
|
|
inst.data_mux_s = 2
|
| 380 |
|
|
inst.reg_addr = source.address
|
| 381 |
|
|
elif isinstance(source, SR):
|
| 382 |
|
|
inst.data_mux_s = 4
|
| 383 |
|
|
if source.sr_num == 1:
|
| 384 |
|
|
inst.sr1_out_en = True
|
| 385 |
|
|
if source.sr_num == 2:
|
| 386 |
|
|
inst.sr2_out_en = True
|
| 387 |
|
|
elif isinstance(source, FR):
|
| 388 |
|
|
inst.data_mux_s = 6
|
| 389 |
|
|
# Destination Processing
|
| 390 |
|
|
if isinstance(dest, R):
|
| 391 |
|
|
inst.reg_addr = dest.address
|
| 392 |
|
|
inst.reg_wen = 0
|
| 393 |
|
|
if dest.low: inst.reg_wen += 1
|
| 394 |
|
|
if dest.high: inst.reg_wen += 2
|
| 395 |
|
|
elif isinstance(dest, SR):
|
| 396 |
|
|
if dest.sr_num == 1: inst.sr1_in_en = True
|
| 397 |
|
|
elif dest.sr_num == 2: inst.sr2_in_en = True
|
| 398 |
|
|
elif isinstance(dest, OPR):
|
| 399 |
|
|
inst.outport_reg_en = True
|
| 400 |
|
|
elif isinstance(dest, IPR):
|
| 401 |
|
|
inst.inport_reg_en = True
|
| 402 |
|
|
else:
|
| 403 |
|
|
print("Bad Destination")
|
| 404 |
|
|
return 0;
|
| 405 |
|
|
# Predicates
|
| 406 |
|
|
inst.processCond(cond)
|
| 407 |
|
|
inst.processFlags(flags)
|
| 408 |
|
|
print inst
|
| 409 |
|
|
pc += 1
|
| 410 |
|
|
|
| 411 |
|
|
def LAB(label):
|
| 412 |
|
|
return
|
| 413 |
|
|
|
| 414 |
|
|
def MAN(inst):
|
| 415 |
|
|
global pc
|
| 416 |
|
|
print inst
|
| 417 |
|
|
pc += 1
|
| 418 |
|
|
|
| 419 |
|
|
class AEOF:
|
| 420 |
|
|
def __str__(self): return "<AEOF>"
|
| 421 |
|
|
|
| 422 |
|
|
class ASOF:
|
| 423 |
|
|
def __str__(self): return "<ASOF>"
|
| 424 |
|
|
|
| 425 |
|
|
class EOF:
|
| 426 |
|
|
def __str__(self): return "<EOF>"
|
| 427 |
|
|
|
| 428 |
|
|
class SOF:
|
| 429 |
|
|
def __str__(self): return "<SOF>"
|
| 430 |
|
|
|
| 431 |
|
|
class EQU:
|
| 432 |
|
|
op0 = None
|
| 433 |
|
|
op1 = None
|
| 434 |
|
|
bytewide = False
|
| 435 |
|
|
|
| 436 |
|
|
def __init__(self, op0, op1, bytewide=False):
|
| 437 |
|
|
self.op0 = op0
|
| 438 |
|
|
self.op1 = op1
|
| 439 |
|
|
self.bytewide = bytewide
|
| 440 |
|
|
|
| 441 |
|
|
def __str__(self): return "<" + str(self.op0) + "==" + str(self.op1) + ", Bytewide: " + str(self.bytewide) + ">"
|
| 442 |
|
|
|
| 443 |
|
|
class NEQ:
|
| 444 |
|
|
op0 = None
|
| 445 |
|
|
op1 = None
|
| 446 |
|
|
bytewide = False
|
| 447 |
|
|
|
| 448 |
|
|
def __init__(self, op0, op1, bytewide=False):
|
| 449 |
|
|
self.op0 = op0
|
| 450 |
|
|
self.op1 = op1
|
| 451 |
|
|
self.bytewide = bytewide
|
| 452 |
|
|
|
| 453 |
|
|
def __str__(self): return "<" + str(self.op0) + "!=" + str(self.op1) + ", Bytewide: " + str(self.bytewide) + ">"
|
| 454 |
|
|
|
| 455 |
|
|
class DST:
|
| 456 |
|
|
def __str__(self): return "DST"
|
| 457 |
|
|
|
| 458 |
|
|
class SRC:
|
| 459 |
|
|
def __str__(self): return "SRC"
|
| 460 |
|
|
|
| 461 |
|
|
class FCS:
|
| 462 |
|
|
def __str__(self): return "FCS"
|
| 463 |
|
|
|
| 464 |
|
|
class IF:
|
| 465 |
|
|
preds = None
|
| 466 |
|
|
|
| 467 |
|
|
def __init__(self, preds=None):
|
| 468 |
|
|
self.preds = preds
|
| 469 |
|
|
|
| 470 |
|
|
def __str__(self):
|
| 471 |
|
|
if self.preds == None:
|
| 472 |
|
|
preds = "None"
|
| 473 |
|
|
elif not isinstance(self.preds, list):
|
| 474 |
|
|
preds = str(self.preds)
|
| 475 |
|
|
else:
|
| 476 |
|
|
preds = ", ".join(map(str, self.preds))
|
| 477 |
|
|
return "<IF: pred=[" + preds + "]>"
|
| 478 |
|
|
|
| 479 |
|
|
class WHEN:
|
| 480 |
|
|
preds = None
|
| 481 |
|
|
|
| 482 |
|
|
def __init__(self, preds=None):
|
| 483 |
|
|
self.preds = preds
|
| 484 |
|
|
|
| 485 |
|
|
def __str__(self):
|
| 486 |
|
|
if self.preds == None:
|
| 487 |
|
|
preds = "None"
|
| 488 |
|
|
elif not isinstance(self.preds, list):
|
| 489 |
|
|
preds = str(self.preds)
|
| 490 |
|
|
else:
|
| 491 |
|
|
preds = ", ".join(map(str, self.preds))
|
| 492 |
|
|
return "<WHEN: pred=[" + preds + "]>"
|
| 493 |
|
|
|
| 494 |
|
|
class UNTIL:
|
| 495 |
|
|
preds = None
|
| 496 |
|
|
|
| 497 |
|
|
def __init__(self, preds=None):
|
| 498 |
|
|
self.preds = preds
|
| 499 |
|
|
|
| 500 |
|
|
def __str__(self):
|
| 501 |
|
|
if self.preds == None:
|
| 502 |
|
|
preds = "None"
|
| 503 |
|
|
elif not isinstance(self.preds, list):
|
| 504 |
|
|
preds = str(self.preds)
|
| 505 |
|
|
else:
|
| 506 |
|
|
preds = ", ".join(map(str, self.preds))
|
| 507 |
|
|
return "<UNTIL: pred=[" + preds + "]>"
|
| 508 |
|
|
|
| 509 |
|
|
class P:
|
| 510 |
|
|
|
| 511 |
|
|
def __str__(self):
|
| 512 |
|
|
return "<Port>"
|
| 513 |
|
|
|
| 514 |
|
|
class R:
|
| 515 |
|
|
address = 0
|
| 516 |
|
|
high = True
|
| 517 |
|
|
low = True
|
| 518 |
|
|
high_byte_s = False
|
| 519 |
|
|
|
| 520 |
|
|
def __init__(self, addr, high=True, low=True, hbs=False):
|
| 521 |
|
|
self.address = addr
|
| 522 |
|
|
self.high = high
|
| 523 |
|
|
self.low = low
|
| 524 |
|
|
self.high_byte_s = hbs
|
| 525 |
|
|
|
| 526 |
|
|
def __str__(self):
|
| 527 |
|
|
return "<Register: address=%d, high=%s, low=%s, high_byte_s=%s>" % (self.address, self.high, self.low, self.high_byte_s)
|
| 528 |
|
|
|
| 529 |
|
|
class C:
|
| 530 |
|
|
value = 0
|
| 531 |
|
|
|
| 532 |
|
|
def __init__(self, value):
|
| 533 |
|
|
self.value = value
|
| 534 |
|
|
|
| 535 |
|
|
def __str__(self):
|
| 536 |
|
|
return "<Constant: value=%d>" % self.value
|
| 537 |
|
|
|
| 538 |
|
|
class SR:
|
| 539 |
|
|
sr_num = 1
|
| 540 |
|
|
|
| 541 |
|
|
def __init__(self, sr_num):
|
| 542 |
|
|
self.sr_num = sr_num
|
| 543 |
|
|
|
| 544 |
|
|
def __str__(self):
|
| 545 |
|
|
return "<Shif Register: sr_num=%d>" % self.sr_num
|
| 546 |
|
|
|
| 547 |
|
|
class CS:
|
| 548 |
|
|
high_byte_s = False
|
| 549 |
|
|
|
| 550 |
|
|
def __init__(self, hbs=False):
|
| 551 |
|
|
self.high_byte_s = hbs
|
| 552 |
|
|
|
| 553 |
|
|
def __str__(self):
|
| 554 |
|
|
return "<Checksum: high_byte_s=%s>" % (self.high_byte_s)
|
| 555 |
|
|
|
| 556 |
|
|
class FR:
|
| 557 |
|
|
|
| 558 |
|
|
def __str__(self):
|
| 559 |
|
|
return "<Flag Register>"
|
| 560 |
|
|
|
| 561 |
|
|
class HBR:
|
| 562 |
|
|
|
| 563 |
|
|
def __str__(self):
|
| 564 |
|
|
return "<High Byte Register>"
|
| 565 |
|
|
|
| 566 |
|
|
class OPR:
|
| 567 |
|
|
|
| 568 |
|
|
def __str__(self):
|
| 569 |
|
|
return "<Output Port Register>"
|
| 570 |
|
|
|
| 571 |
|
|
class IPR:
|
| 572 |
|
|
|
| 573 |
|
|
def __str__(self):
|
| 574 |
|
|
return "<Input Port Register>"
|
| 575 |
|
|
|
| 576 |
|
|
class Instruction:
|
| 577 |
|
|
jump = False
|
| 578 |
|
|
reset = False
|
| 579 |
|
|
|
| 580 |
|
|
input_rdy = False
|
| 581 |
|
|
output_rdy = False
|
| 582 |
|
|
sof_out = False
|
| 583 |
|
|
eof_out = False
|
| 584 |
|
|
|
| 585 |
|
|
pred_mode = 0 # 0: when, 1: until, 2: if
|
| 586 |
|
|
pred_fcs = False
|
| 587 |
|
|
pred_eof = False
|
| 588 |
|
|
pred_sof = False
|
| 589 |
|
|
pred_cmp = False
|
| 590 |
|
|
pred_dst = False
|
| 591 |
|
|
pred_src = False
|
| 592 |
|
|
|
| 593 |
|
|
highbyte_reg_en = False
|
| 594 |
|
|
output_byte_s = 0
|
| 595 |
|
|
|
| 596 |
|
|
outport_reg_en = 0
|
| 597 |
|
|
inport_reg_en = 0
|
| 598 |
|
|
|
| 599 |
|
|
data_mux_s = 0
|
| 600 |
|
|
op0_mux_s = 0
|
| 601 |
|
|
op1_mux_s = 0
|
| 602 |
|
|
|
| 603 |
|
|
reg_addr = 0
|
| 604 |
|
|
reg_wen = 0
|
| 605 |
|
|
|
| 606 |
|
|
fcs_add = False
|
| 607 |
|
|
fcs_clr = False
|
| 608 |
|
|
|
| 609 |
|
|
sr1_in_en = False
|
| 610 |
|
|
sr2_in_en = False
|
| 611 |
|
|
sr1_out_en = False
|
| 612 |
|
|
sr2_out_en = False
|
| 613 |
|
|
|
| 614 |
|
|
flag_reg_en = False
|
| 615 |
|
|
|
| 616 |
|
|
comp_mode = 0
|
| 617 |
|
|
|
| 618 |
|
|
alu_op = 0
|
| 619 |
|
|
|
| 620 |
|
|
const_byte = 0
|
| 621 |
|
|
const_word = 0
|
| 622 |
|
|
|
| 623 |
|
|
loc = ""
|
| 624 |
|
|
|
| 625 |
|
|
def __init__(self, loc):
|
| 626 |
|
|
self.loc = loc
|
| 627 |
|
|
|
| 628 |
|
|
def __str__(self):
|
| 629 |
|
|
ret = "\t\t%03d:\t\t\tcode <= {" % pc
|
| 630 |
|
|
ret += "2'b%1d%1d, " % (self.jump, self.reset)
|
| 631 |
|
|
ret += "4'b%1d%1d%1d%1d, " % (self.input_rdy, self.output_rdy, self.sof_out, self.eof_out)
|
| 632 |
|
|
ret += "2'd%1d, " % self.pred_mode
|
| 633 |
|
|
ret += "6'b%1d%1d%1d%1d%1d%1d, " % (self.pred_fcs, self.pred_eof, self.pred_sof, self.pred_cmp, self.pred_dst, self.pred_src)
|
| 634 |
|
|
ret += "1'b%1d, " % self.highbyte_reg_en
|
| 635 |
|
|
ret += "1'd%1d, " % self.output_byte_s
|
| 636 |
|
|
ret += "2'b%1d%1d, " % (self.outport_reg_en, self.inport_reg_en)
|
| 637 |
|
|
ret += "3'd%1d, " % self.data_mux_s
|
| 638 |
|
|
ret += "2'd%1d, " % self.op0_mux_s
|
| 639 |
|
|
ret += "1'd%1d, " % self.op1_mux_s
|
| 640 |
|
|
ret += "4'd%02d, " % self.reg_addr
|
| 641 |
|
|
ret += "2'd%1d, " % self.reg_wen
|
| 642 |
|
|
ret += "2'b%1d%1d, " % (self.fcs_add, self.fcs_clr)
|
| 643 |
|
|
ret += "4'b%1d%1d%1d%1d, " % (self.sr1_in_en, self.sr2_in_en, self.sr1_out_en, self.sr2_out_en)
|
| 644 |
|
|
ret += "1'b%1d, " % self.flag_reg_en
|
| 645 |
|
|
ret += "3'd%1d, " % self.comp_mode
|
| 646 |
|
|
ret += "2'd%1d, " % self.alu_op
|
| 647 |
|
|
ret += "9'd%03d, " % self.const_byte
|
| 648 |
|
|
ret += "16'd%05d" % self.const_word
|
| 649 |
|
|
ret += "}; // %s" % self.loc
|
| 650 |
|
|
|
| 651 |
|
|
return ret
|
| 652 |
|
|
|
| 653 |
|
|
def processCond(inst, cond):
|
| 654 |
|
|
if (cond != None):
|
| 655 |
|
|
if (cond.preds == None): preds = []
|
| 656 |
|
|
elif not isinstance(cond.preds, list): preds = [cond.preds]
|
| 657 |
|
|
else: preds = cond.preds
|
| 658 |
|
|
for pred in preds:
|
| 659 |
|
|
if (isinstance(pred, EOF)):
|
| 660 |
|
|
inst.pred_eof = True
|
| 661 |
|
|
elif (isinstance(pred, SOF)):
|
| 662 |
|
|
inst.pred_sof = True
|
| 663 |
|
|
elif (isinstance(pred, EQU)):
|
| 664 |
|
|
inst.pred_cmp = True
|
| 665 |
|
|
inst.alu_op = 1
|
| 666 |
|
|
if (pred.bytewide):
|
| 667 |
|
|
inst.comp_mode += 4
|
| 668 |
|
|
if (isinstance(pred.op0,C)):
|
| 669 |
|
|
inst.op0_mux_s = 0
|
| 670 |
|
|
inst.const_word = pred.op0.value
|
| 671 |
|
|
elif (isinstance(pred.op0,P)):
|
| 672 |
|
|
inst.op0_mux_s = 1
|
| 673 |
|
|
elif (isinstance(pred.op0,FR)):
|
| 674 |
|
|
inst.op0_mux_s = 2
|
| 675 |
|
|
elif (isinstance(pred.op0,R)):
|
| 676 |
|
|
inst.op0_mux_s = 3
|
| 677 |
|
|
inst.reg_addr = pred.op0.address
|
| 678 |
|
|
if (isinstance(pred.op1,C)):
|
| 679 |
|
|
inst.op1_mux_s = 0
|
| 680 |
|
|
inst.const_word = pred.op1.value
|
| 681 |
|
|
elif (isinstance(pred.op1,R)):
|
| 682 |
|
|
inst.op1_mux_s = 1
|
| 683 |
|
|
inst.reg_addr = pred.op1.address
|
| 684 |
|
|
elif (isinstance(pred, NEQ)):
|
| 685 |
|
|
inst.pred_cmp = True
|
| 686 |
|
|
inst.alu_op = 1
|
| 687 |
|
|
inst.comp_mode = 3
|
| 688 |
|
|
if (pred.bytewide):
|
| 689 |
|
|
inst.comp_mode += 4
|
| 690 |
|
|
if (isinstance(pred.op0,C)):
|
| 691 |
|
|
inst.op0_mux_s = 0
|
| 692 |
|
|
inst.const_word = pred.op0.value
|
| 693 |
|
|
elif (isinstance(pred.op0,P)):
|
| 694 |
|
|
inst.op0_mux_s = 1
|
| 695 |
|
|
elif (isinstance(pred.op0,FR)):
|
| 696 |
|
|
inst.op0_mux_s = 2
|
| 697 |
|
|
elif (isinstance(pred.op0,R)):
|
| 698 |
|
|
inst.op0_mux_s = 3
|
| 699 |
|
|
inst.reg_addr = pred.op0.address
|
| 700 |
|
|
if (isinstance(pred.op1,C)):
|
| 701 |
|
|
inst.op1_mux_s = 0
|
| 702 |
|
|
inst.const_word = pred.op1.value
|
| 703 |
|
|
elif (isinstance(pred.op1,R)):
|
| 704 |
|
|
inst.op1_mux_s = 1
|
| 705 |
|
|
inst.reg_addr = pred.op1.address
|
| 706 |
|
|
elif (isinstance(pred, DST)):
|
| 707 |
|
|
inst.pred_dst = True
|
| 708 |
|
|
elif (isinstance(pred, SRC)):
|
| 709 |
|
|
inst.pred_src = True
|
| 710 |
|
|
elif (isinstance(pred, FCS)):
|
| 711 |
|
|
inst.pred_fcs = True
|
| 712 |
|
|
|
| 713 |
|
|
def processFlags(self, flags):
|
| 714 |
|
|
if (flags != None and len(flags) > 0):
|
| 715 |
|
|
for flag in flags:
|
| 716 |
|
|
if (isinstance(flag, AEOF)):
|
| 717 |
|
|
self.eof_out = True
|
| 718 |
|
|
elif (isinstance(flag, ASOF)):
|
| 719 |
|
|
self.sof_out = True
|
