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[/] [funbase_ip_library/] [trunk/] [Altera/] [ip.hwp.storage/] [up_avalon_sram/] [UP_IP_Generator.tcl] - Blame information for rev 187

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1 187 lanttu
# +----------------------------------------------------------------------------+
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# | License Agreement                                                          |
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# |                                                                            |
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# | Copyright (c) 1991-2009 Altera Corporation, San Jose, California, USA.     |
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# | All rights reserved.                                                       |
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# |                                                                            |
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# | Any megafunction design, and related net list (encrypted or decrypted),    |
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# |  support information, device programming or simulation file, and any other |
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# |  associated documentation or information provided by Altera or a partner   |
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# |  under Altera's Megafunction Partnership Program may be used only to       |
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# |  program PLD devices (but not masked PLD devices) from Altera.  Any other  |
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# |  use of such megafunction design, net list, support information, device    |
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# |  programming or simulation file, or any other related documentation or     |
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# |  information is prohibited for any other purpose, including, but not       |
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# |  limited to modification, reverse engineering, de-compiling, or use with   |
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# |  any other silicon devices, unless such use is explicitly licensed under   |
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# |  a separate agreement with Altera or a megafunction partner.  Title to     |
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# |  the intellectual property, including patents, copyrights, trademarks,     |
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# |  trade secrets, or maskworks, embodied in any such megafunction design,    |
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# |  net list, support information, device programming or simulation file, or  |
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# |  any other related documentation or information provided by Altera or a    |
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# |  megafunction partner, remains with Altera, the megafunction partner, or   |
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# |  their respective licensors.  No other licenses, including any licenses    |
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# |  needed under any third party's intellectual property, are provided herein.|
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# |  Copying or modifying any file, or portion thereof, to which this notice   |
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# |  is attached violates this copyright.                                      |
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# |                                                                            |
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# | THIS FILE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR    |
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# | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,   |
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# | FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL    |
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# | THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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# | LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING    |
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# | FROM, OUT OF OR IN CONNECTION WITH THIS FILE OR THE USE OR OTHER DEALINGS  |
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# | IN THIS FILE.                                                              |
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# |                                                                            |
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# | This agreement shall be governed in all respects by the laws of the State  |
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# |  of California and by the laws of the United States of America.            |
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# |                                                                            |
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# +----------------------------------------------------------------------------+
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# +----------------------------------------------------------------------------+
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# | Created by the Altera University Program                                   |
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# |  for use with the Altera University Program IP Cores                       |
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# |                                                                            |
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# | Version: 1.0                                                               |
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# |                                                                            |
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# +----------------------------------------------------------------------------+
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proc up_generate {dest_path src_path new_module_name params_str sections_str} {
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#       send_message info "Starting UP Generation from $src_path to $dest_path"
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        set src_file [ open "$src_path" "r" ]
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        set dest_file [ open "$dest_path" "w" ]
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        set src_module [ read $src_file ]
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        set dest_module [ up_modify_sections $src_module $sections_str ]
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        set dest_module [ up_modify_module_name $dest_module $new_module_name ]
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        set dest_module [ up_modify_params $dest_module $params_str ]
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        set dest_module [ string trim $dest_module ]
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        set dest_module "$dest_module\n"
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        puts $dest_file $dest_module
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        close $dest_file
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        close $src_file
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}
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proc up_modify_module_name {module_str new_module_name} {
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        set module_list [ split $module_str "\n" ]
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        foreach line $module_list {
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                if { [ string match "module*" $line ] } {
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                        append dest_module "\n" "module $new_module_name ("
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                } else {
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                        append dest_module "\n" $line
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                }
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        }
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        return $dest_module
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}
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proc up_modify_params {module_str params_str} {
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        set params_list [ split $params_str ":;" ]
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        set module_list [ split $module_str "\n" ]
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        foreach line $module_list {
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                if { [ string match "parameter*" $line ] } {
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                        set param [ split $line "=;" ]
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                        set param_name [ string trim [ join [ split [ lindex $param 0 ] "parameter" ] "" ] ]
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                        append dest_module "\n" [ lindex $param 0 ]
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                        if { [ string match "*$param_name:*" $params_str ] } {
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                                append dest_module "= " [ string map $params_list $param_name ]
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                        } else {
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                                append dest_module "=" [ lindex $param 1 ]
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                        }
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                        append dest_module ";" [ lindex $param 2 ]
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                } else {
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                        append dest_module "\n" $line
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                }
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        }
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        return $dest_module
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}
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proc up_modify_sections {module_str sections_str} {
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        set sections_list [ split $sections_str ":;" ]
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        set module_list [ split $module_str "\n" ]
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#       send_message info "Starting UP Modify Sections with $sections_list"
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        set recursive_ifs "0:1:1"
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        set in_ifdef 0
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        set allow_lines 1
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        set valid_lines 1
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        set line_num 0
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        foreach line $module_list {
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                set line_num [ expr $line_num + 1 ]
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                if { [ string match "`if*" $line ] } {
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                        lappend recursive_ifs "$in_ifdef:$allow_lines:$valid_lines"
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#                       send_message info "In ifdef |$recursive_ifs| at $line_num"
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                        set in_ifdef 1
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                        set allow_lines [ expr ($valid_lines && $allow_lines) ]
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                        if { [ string match "`ifdef*" $line ] } {
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                                set section_name [ string trim [ join [ split $line "`ifdef" ] "" ] ]
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                                set valid_lines [ expr ([ string match "*$section_name:*" $sections_str ] && [ string map $sections_list $section_name ]) ]
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                        } else {
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                                set section_name [ string trim [ join [ split $line "`ifndef" ] "" ] ]
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                                set valid_lines [ expr ([ string match "*$section_name:*" $sections_str ] && (!([ string map $sections_list $section_name ])) ]
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                        }
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                        set valid_lines [ expr ($valid_lines && $allow_lines) ]
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#                       if { $valid_lines } {
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#                               send_message info "$section_name is a valid section $in_ifdef:$allow_lines:$valid_lines"
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#                       } else {
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#                               send_message info "$section_name is NOT a valid section $in_ifdef:$allow_lines:$valid_lines"
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#                       }
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                } elseif { [ string match "`elsif*" $line ] } {
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                        if { !($in_ifdef) } {
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                                send_message error "Unexpected `elsif statement at line $line_num"
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                        }
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                        set allow_lines [ expr (!($valid_lines) & $allow_lines) ]
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                        set section_name [ string trim [ join [ split $line "`elsif" ] "" ] ]
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                        set valid_lines [ expr ([ string match "*$section_name:*" $sections_str ] && [ string map $sections_list $section_name ]) ]
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                        set valid_lines [ expr ($valid_lines && $allow_lines) ]
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                } elseif { [ string match "`else*" $line ] } {
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                        if { !($in_ifdef) } {
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                                send_message error "Unexpected `else statement at line $line_num"
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                        }
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                        set allow_lines [ expr (!($valid_lines) & $allow_lines) ]
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                        set valid_lines $allow_lines
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                } elseif { [ string match "`endif*" $line ] } {
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                        if { !($in_ifdef) } {
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                                send_message error "Unexpected `endif statement at line $line_num"
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                        }
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                        set old_if [ split [ lindex $recursive_ifs end ] ":" ]
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#                       send_message info "New data |$recursive_ifs| |$old_if| at $line_num"
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                        set in_ifdef [ lindex $old_if 0 ]
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                        set allow_lines [ lindex $old_if 1 ]
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                        set valid_lines [ lindex $old_if 2 ]
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                        set recursive_ifs [ lrange $recursive_ifs 0 end-1 ]
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#                       send_message info "New data $in_ifdef $valid_lines $allow_lines at $line_num"
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                } elseif { $valid_lines } {
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                        append dest_module "\n" $line
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                }
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        }
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        return $dest_module
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}
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