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Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [hibi_udp/] [1.0/] [hibi_udp.1.0.xml] - Blame information for rev 160

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        TUT
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        ip.hwp.interface
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        hibi_udp
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        1.0
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                        clk_udp
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                        false
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                                                CLK
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                                                clk_udp
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                        little
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                        hibi_master
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                        false
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                                                AV
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                                                RE
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                                                AV
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                                                DATA
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                        false
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                                                CLK
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                        false
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                                                        15
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                                                        0
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                                                        0
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                        8
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                        false
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                                        in
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                                                0
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                        in
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                        out
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                                                4
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                                                0
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                                                        std_logic_vector
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                        out
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                                                31
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                                                0
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                                                        std_logic_vector
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                                        structural_vhd
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                                hibi_re_out
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                                                0
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                                                0
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                                                        std_logic
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                hibi_we_out
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                                        out
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                                                0
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                                                        std_logic
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                        in
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                                                0
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                                                0
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                                                        std_logic
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                                        structural_vhd
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                                hibi_comm_in
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                                        in
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                                                4
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                                                0
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                                                        std_logic_vector
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                                        structural_vhd
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                                hibi_data_in
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                                        in
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                                                31
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                                                0
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                                                        std_logic_vector
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                                        structural_vhd
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                                hibi_empty_in
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                                        in
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                                                0
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                                                0
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                                                        std_logic
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural_vhd
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                                hibi_full_in
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                                        in
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                                                0
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                                                0
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                                                        std_logic
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                                                        IEEE.std_logic_1164.all
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                                                        rtl
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                                                        structural
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                                                        structural_vhd
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                                eth_chip_sel_out
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                                        out
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                                        out
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                                        out
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                                        inout
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                                        in
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                                                0
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                                        out
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                                                0
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                                        in
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                        structural_vhdlSource
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                        sourceFiles
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                                vhd/hibi_udp.vhd
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                                vhdlSource
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                                true
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                                work
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                                        vcom
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                                        -quiet -check_synthesis -work work
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                                        true
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                                vhdlSource
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                                vcom
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                                -quiet -check_synthesis -work work
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                                true
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                                vhdlSource-87
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                                vcom
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                                -quiet -check_synthesis -work work
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                                true
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                                vhdlSource-93
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                                vcom
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                                -quiet -check_synthesis -work work
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                                true
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                                IP
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                                HW
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                                Parameterizable
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