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URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [ip.hwp.interface/] [udp_ip/] [1.0/] [ip-xact/] [udp_ip_dm9000a.1.0.xml] - Blame information for rev 160

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Line No. Rev Author Line
1 145 lanttu
2
3
4
5
6
7 
        TUT
8 
        ip.hwp.interface
9 
        udp_ip_dm9000a
10 
        1.0
11 
        DM9000A controller and UDP/IP.
12
13
14 
                        DM9000A
15 
                        DM9000A
16 
                        Connection to the DM9000A chip via IO pins.
17
18
19
20 
                        false
21
22
23
24 
                                                eth_chip_sel_out
25
26 
                                                        0
27 
                                                        0
28
29
30
31 
                                                eth_chip_sel_out
32
33 
                                                        0
34 
                                                        0
35
36
37
38
39
40 
                                                eth_clk_out
41
42 
                                                        0
43 
                                                        0
44
45
46
47 
                                                eth_clk_out
48
49 
                                                        0
50 
                                                        0
51
52
53
54
55
56 
                                                eth_cmd_out
57
58 
                                                        0
59 
                                                        0
60
61
62
63 
                                                eth_cmd_out
64
65 
                                                        0
66 
                                                        0
67
68
69
70
71
72 
                                                eth_data_inout
73
74 
                                                        15
75 
                                                        0
76
77
78
79 
                                                eth_data_inout
80
81 
                                                        15
82 
                                                        0
83
84
85
86
87
88 
                                                eth_interrupt_in
89
90 
                                                        0
91 
                                                        0
92
93
94
95 
                                                eth_interrupt_in
96
97 
                                                        0
98 
                                                        0
99
100
101
102
103
104 
                                                eth_read_out
105
106 
                                                        0
107 
                                                        0
108
109
110
111 
                                                eth_read_out
112
113 
                                                        0
114 
                                                        0
115
116
117
118
119
120 
                                                eth_reset_out
121
122 
                                                        0
123 
                                                        0
124
125
126
127 
                                                eth_reset_out
128
129 
                                                        0
130 
                                                        0
131
132
133
134
135
136 
                                                eth_write_out
137
138 
                                                        0
139 
                                                        0
140
141
142
143 
                                                eth_write_out
144
145 
                                                        0
146 
                                                        0
147
148
149
150
151 
                        8
152 
                        little
153
154
155 
                        app_rx
156 
                        app_rx
157 
                        Application receive operations
158
159
160
161 
                        false
162
163
164
165 
                                                new_rx_out
166
167 
                                                        0
168 
                                                        0
169
170
171
172 
                                                new_rx_out
173
174 
                                                        0
175 
                                                        0
176
177
178
179
180
181 
                                                rx_data_valid_out
182
183 
                                                        0
184 
                                                        0
185
186
187
188 
                                                rx_data_valid_out
189
190 
                                                        0
191 
                                                        0
192
193
194
195
196
197 
                                                rx_re_in
198
199 
                                                        0
200 
                                                        0
201
202
203
204 
                                                rx_re_in
205
206 
                                                        0
207 
                                                        0
208
209
210
211
212
213 
                                                rx_erroneous_out
214
215 
                                                        0
216 
                                                        0
217
218
219
220 
                                                rx_erroneous_out
221
222 
                                                        0
223 
                                                        0
224
225
226
227
228
229 
                                                source_addr_out
230
231 
                                                        31
232 
                                                        0
233
234
235
236 
                                                source_addr_out
237
238 
                                                        31
239 
                                                        0
240
241
242
243
244
245 
                                                source_port_out
246
247 
                                                        15
248 
                                                        0
249
250
251
252 
                                                source_port_out
253
254 
                                                        15
255 
                                                        0
256
257
258
259
260
261 
                                                dest_port_out
262
263 
                                                        15
264 
                                                        0
265
266
267
268 
                                                dest_port_out
269
270 
                                                        15
271 
                                                        0
272
273
274
275
276
277 
                                                rx_len_out
278
279 
                                                        10
280 
                                                        0
281
282
283
284 
                                                rx_len_out
285
286 
                                                        10
287 
                                                        0
288
289
290
291
292
293 
                                                rx_data_out
294
295 
                                                        15
296 
                                                        0
297
298
299
300 
                                                rx_data_out
301
302 
                                                        15
303 
                                                        0
304
305
306
307
308
309 
                                                fatal_error_out
310
311 
                                                        0
312 
                                                        0
313
314
315
316 
                                                fatal_error_out
317
318 
                                                        0
319 
                                                        0
320
321
322
323
324
325 
                                                link_up_out
326
327 
                                                        0
328 
                                                        0
329
330
331
332 
                                                link_up_out
333
334 
                                                        0
335 
                                                        0
336
337
338
339
340
341 
                                                rx_error_out
342
343 
                                                        0
344 
                                                        0
345
346
347
348 
                                                rx_error_out
349
350 
                                                        0
351 
                                                        0
352
353
354
355
356 
                        8
357 
                        little
358
359
360 
                        app_tx
361 
                        app_tx
362 
                        Application transmit operations
363
364
365
366 
                        false
367
368
369
370 
                                                new_tx_in
371
372 
                                                        0
373 
                                                        0
374
375
376
377 
                                                new_tx_in
378
379 
                                                        0
380 
                                                        0
381
382
383
384
385
386 
                                                tx_len_in
387
388 
                                                        10
389 
                                                        0
390
391
392
393 
                                                tx_len_in
394
395 
                                                        10
396 
                                                        0
397
398
399
400
401
402 
                                                target_addr_in
403
404 
                                                        31
405 
                                                        0
406
407
408
409 
                                                target_addr_in
410
411 
                                                        31
412 
                                                        0
413
414
415
416
417
418 
                                                target_port_in
419
420 
                                                        15
421 
                                                        0
422
423
424
425 
                                                target_port_in
426
427 
                                                        15
428 
                                                        0
429
430
431
432
433
434 
                                                source_port_in
435
436 
                                                        15
437 
                                                        0
438
439
440
441 
                                                source_port_in
442
443 
                                                        15
444 
                                                        0
445
446
447
448
449
450 
                                                tx_data_in
451
452 
                                                        15
453 
                                                        0
454
455
456
457 
                                                tx_data_in
458
459 
                                                        15
460 
                                                        0
461
462
463
464
465
466 
                                                tx_data_valid_in
467
468 
                                                        0
469 
                                                        0
470
471
472
473 
                                                tx_data_valid_in
474
475 
                                                        0
476 
                                                        0
477
478
479
480
481
482 
                                                tx_re_out
483
484 
                                                        0
485 
                                                        0
486
487
488
489 
                                                tx_re_out
490
491 
                                                        0
492 
                                                        0
493
494
495
496
497
498 
                                                no_arp_target_MAC_in
499
500 
                                                        47
501 
                                                        0
502
503
504
505 
                                                no_arp_target_MAC_in
506
507 
                                                        47
508 
                                                        0
509
510
511
512
513
514 
                                                fatal_error_out
515
516 
                                                        0
517 
                                                        0
518
519
520
521 
                                                fatal_error_out
522
523 
                                                        0
524 
                                                        0
525
526
527
528
529
530 
                                                link_up_out
531
532 
                                                        0
533 
                                                        0
534
535
536
537 
                                                link_up_out
538
539 
                                                        0
540 
                                                        0
541
542
543
544
545 
                        8
546 
                        little
547
548
549 
                        clk
550 
                        clk
551 
                        Clock 25 MHz in.
552
553
554
555 
                        false
556
557
558
559 
                                                CLK
560
561 
                                                        0
562 
                                                        0
563
564
565
566 
                                                clk
567
568 
                                                        0
569 
                                                        0
570
571
572
573
574 
                        8
575 
                        little
576
577
578 
                        rst_n
579 
                        rst_n
580 
                        Asynchronous reset active-low.
581
582
583
584 
                        false
585
586
587
588 
                                                RESETn
589
590 
                                                        0
591 
                                                        0
592
593
594
595 
                                                rst_n
596
597 
                                                        0
598 
                                                        0
599
600
601
602
603 
                        8
604 
                        little
605
606
607
608
609
610 
                                clk
611
612 
                                        in
613
614 
                                                0
615 
                                                0
616
617
618
619
620
621 
                                dest_port_out
622
623 
                                        out
624
625 
                                                15
626 
                                                0
627
628
629
630
631
632 
                                eth_chip_sel_out
633
634 
                                        out
635
636 
                                                0
637 
                                                0
638
639
640
641
642
643 
                                eth_clk_out
644
645 
                                        out
646
647 
                                                0
648 
                                                0
649
650
651
652
653
654 
                                eth_cmd_out
655
656 
                                        out
657
658 
                                                0
659 
                                                0
660
661
662
663
664
665 
                                eth_data_inout
666
667 
                                        inout
668
669 
                                                15
670 
                                                0
671
672
673
674
675
676 
                                eth_interrupt_in
677
678 
                                        in
679
680 
                                                0
681 
                                                0
682
683
684
685
686
687 
                                eth_read_out
688
689 
                                        out
690
691 
                                                0
692 
                                                0
693
694
695
696
697
698 
                                eth_reset_out
699
700 
                                        out
701
702 
                                                0
703 
                                                0
704
705
706
707
708
709 
                                eth_write_out
710
711 
                                        out
712
713 
                                                0
714 
                                                0
715
716
717
718
719
720 
                                fatal_error_out
721
722 
                                        out
723
724 
                                                0
725 
                                                0
726
727
728
729
730
731 
                                link_up_out
732
733 
                                        out
734
735 
                                                0
736 
                                                0
737
738
739
740
741
742 
                                new_rx_out
743
744 
                                        out
745
746 
                                                0
747 
                                                0
748
749
750
751
752
753 
                                new_tx_in
754
755 
                                        in
756
757 
                                                0
758 
                                                0
759
760
761
762
763
764 
                                no_arp_target_MAC_in
765
766 
                                        in
767
768 
                                                47
769 
                                                0
770
771
772
773
774
775 
                                rst_n
776
777 
                                        in
778
779 
                                                0
780 
                                                0
781
782
783
784
785
786 
                                rx_data_out
787
788 
                                        out
789
790 
                                                15
791 
                                                0
792
793
794
795
796
797 
                                rx_data_valid_out
798
799 
                                        out
800
801 
                                                0
802 
                                                0
803
804
805
806
807
808 
                                rx_erroneous_out
809
810 
                                        out
811
812 
                                                0
813 
                                                0
814
815
816
817
818
819 
                                rx_error_out
820
821 
                                        out
822
823
824
825
826 
                                rx_len_out
827
828 
                                        out
829
830 
                                                10
831 
                                                0
832
833
834
835
836
837 
                                rx_re_in
838
839 
                                        in
840
841 
                                                0
842 
                                                0
843
844
845
846
847
848 
                                source_addr_out
849
850 
                                        out
851
852 
                                                31
853 
                                                0
854
855
856
857
858
859 
                                source_port_in
860
861 
                                        in
862
863 
                                                15
864 
                                                0
865
866
867
868
869
870 
                                source_port_out
871
872 
                                        out
873
874 
                                                15
875 
                                                0
876
877
878
879
880
881 
                                target_addr_in
882
883 
                                        in
884
885 
                                                31
886 
                                                0
887
888
889
890
891
892 
                                target_port_in
893
894 
                                        in
895
896 
                                                15
897 
                                                0
898
899
900
901
902
903 
                                tx_data_in
904
905 
                                        in
906
907 
                                                15
908 
                                                0
909
910
911
912
913
914 
                                tx_data_valid_in
915
916 
                                        in
917
918 
                                                0
919 
                                                0
920
921
922
923
924
925 
                                tx_len_in
926
927 
                                        in
928
929 
                                                10
930 
                                                0
931
932
933
934
935
936 
                                tx_re_out
937
938 
                                        out
939
940 
                                                0
941 
                                                0
942
943
944
945
946
947
948
949 
                                disable_arp_g
950 
                                0
951
952
953 
                                disable_rx_g
954 
                                0
955
956
957
958
959
960 
                        HDLsources
961 
                        HDL sources
962 
                        HDL sources for UDP/IP functionality.
963
964 
                                ../vhd/udp_ip_pkg.vhd
965 
                                vhdlSource
966 
                                false
967 
                                work
968
969
970 
                                ../vhd/arp3.vhd
971 
                                vhdlSource
972 
                                false
973 
                                work
974
975
976 
                                ../vhd/arpsnd.vhd
977 
                                vhdlSource
978 
                                false
979 
                                work
980
981
982 
                                ../vhd/ip_checksum.vhd
983 
                                vhdlSource
984 
                                false
985 
                                work
986
987
988 
                                ../vhd/udp.vhd
989 
                                vhdlSource
990 
                                false
991 
                                work
992
993
994 
                                ../vhd/udp_arp_data_mux.vhd
995 
                                vhdlSource
996 
                                false
997 
                                work
998
999
1000 
                                ../vhd/udp_ip.vhd
1001 
                                vhdlSource
1002 
                                false
1003 
                                work
1004
1005
1006 
                                ../vhd/udp_ip_dm9000a.vhd
1007 
                                vhdlSource
1008 
                                false
1009 
                                work
1010
1011
1012 
                                vhdlSource
1013 
                                vcom
1014 
                                -work work -check_synthesis -quiet
1015 
                                false
1016
1017
1018
1019 
                        doc
1020
1021 
                                ../doc/ethernet_conns_reference.pdf
1022 
                                pdf
1023 
                                false
1024
1025
1026 
                                ../../../eth_dm9000a_ctrl/1.0/doc/DM9kA_controller.pdf
1027 
                                pdf
1028 
                                false
1029
1030
1031 
                                ../doc/udp_ip_datasheet.pdf
1032 
                                pdf
1033 
                                false
1034
1035
1036
1037 
                        eth_ctrl_vhd
1038 
                        Controller unit for DM9000A Ethernet PHY chip. Such a chip is used e.g. in Altera/Terasic DE2 FPGA board.
1039
1040 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_ctrl_pkg.vhd
1041 
                                vhdlSource
1042 
                                false
1043 
                                work
1044 
                                Constants needed for handling DM9000A chip.
1045
1046
1047 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_comm_module.vhd
1048 
                                vhdlSource
1049 
                                false
1050 
                                work
1051 
                                Handles communication with DM9000A chip and arbitrates
1052 
between init, interrupt handler, read, and send modules.
1053
1054
1055 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_init_module.vhd
1056 
                                vhdlSource
1057 
                                false
1058 
                                work
1059 
                                Initializes DM9kA. Includes two state machines.
1060
1061
1062 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_interrupt_handler.vhd
1063 
                                vhdlSource
1064 
                                false
1065 
                                work
1066 
                                Activates with interrupt signal and finds out the source of it:
1067 
tx completion or new rx packet received.
1068
1069
1070 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_send_module.vhd
1071 
                                vhdlSource
1072 
                                false
1073 
                                work
1074 
                                Handles sending procedures application -> eth.
1075 
Includes a state machine where two states (init and done) include their own
1076 
sub-state machines.
1077
1078
1079 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_read_module.vhd
1080 
                                vhdlSource
1081 
                                false
1082 
                                work
1083 
                                Handles the reading of rx data DM9kA -> application
1084
1085
1086 
                                ../../../eth_dm9000a_ctrl/1.0/vhd/DM9kA_controller.vhd
1087 
                                vhdlSource
1088 
                                false
1089 
                                work
1090 
                                Top level of controller unit. Used withDM9000A Ethernet PHY chip, which
1091 
is used e.g. in Altera/Terasic DE2 FPGA board.
1092 
Contains 4 or 5 sub-modules (rx can be disabled=nonexisting).
1093
1094
1095 
                                vhdlSource
1096 
                                vcom
1097 
                                -work work -check_synthesis -quiet
1098 
                                false
1099
1100
1101
1102
1103
1104
1105 
                                Global
1106 
                                Mutable
1107
1108
1109
1110

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