URL https://opencores.org/ocsvn/funbase_ip_library/funbase_ip_library/trunk

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [soc/] [mjpeg_de2_soc/] [1.0/] [mjpeg_de2_soc.1.0.xml] - Blame information for rev 147

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        TUT
        soc
        mjpeg_de2_soc
        1.0
        Altera de2 template soc

        
                
                        sdram_if
                        
                        
                        
                        false
                        
                                
                                        
                                                sdram_address_out
                                                
                                                        11
                                                        0
                                                
                                        
                                        
                                                DRAM_ADDR
                                                
                                                        11
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_ba_out
                                                
                                                        1
                                                        0
                                                
                                        
                                        
                                                DRAM_BA
                                                
                                                        1
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_cas_n_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_CAS_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_cke_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_CKE
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_cs_n_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_CS_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_data_inout
                                                
                                                        15
                                                        0
                                                
                                        
                                        
                                                DRAM_DQ
                                                
                                                        15
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_dqm_out
                                                
                                                        1
                                                        0
                                                
                                        
                                        
                                                DRAM_DQM
                                                
                                                        1
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_ras_n_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_RAS_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                sdram_we_n_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_WE_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        sdram_clk
                        
                        
                        
                        false
                        
                                
                                        
                                                CLK
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                DRAM_CLK
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        rst_n
                        
                        
                        
                        false
                        
                                
                                        
                                                RESETn
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SW_17
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        clk_in
                        
                        
                        
                        false
                        
                                
                                        
                                                CLK
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                CLOCK_50
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        DM9000A
                        
                        
                        
                        false
                        
                                
                                        
                                                eth_clk_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_CLK
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_chip_sel_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_CS_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_cmd_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_CMD
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_data_inout
                                                
                                                        15
                                                        0
                                                
                                        
                                        
                                                ENET_DATA
                                                
                                                        15
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_interrupt_in
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_INT
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_read_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_RD_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_reset_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_RST_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                eth_write_out
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                ENET_WR_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
                
                        sram_if
                        
                        
                        
                        false
                        
                                
                                        
                                                SRAM_ADDR_FROM_SRAM
                                                
                                                        17
                                                        0
                                                
                                        
                                        
                                                SRAM_ADDR
                                                
                                                        17
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_CE_N_FROM_SRAM
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SRAM_CE_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_DQ_TO_AND_FROM_SRAM
                                                
                                                        15
                                                        0
                                                
                                        
                                        
                                                SRAM_DQ
                                                
                                                        15
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_LB_N_FROM_SRAM
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SRAM_LB_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_OE_N_FROM_SRAM
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SRAM_OE_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_UB_N_FROM_SRAM
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SRAM_UB_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                                
                                        
                                                SRAM_WE_N_FROM_SRAM
                                                
                                                        0
                                                        0
                                                
                                        
                                        
                                                SRAM_WE_N
                                                
                                                        0
                                                        0
                                                
                                        
                                
                        
                        8
                        little
                
        
        
                
                        
                                rtl
                                ::
                        
                        
                                structural
                                
                                
                        
                        
                                acc_only
                                
                                
                        
                
                
                        
                                CLOCK_50
                                
                                        in
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_ADDR
                                
                                        out
                                        
                                                11
                                                0
                                        
                                
                                
                        
                        
                                DRAM_BA
                                
                                        out
                                        
                                                1
                                                0
                                        
                                
                                
                        
                        
                                DRAM_CAS_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_CKE
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_CLK
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_CS_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_DQ
                                
                                        inout
                                        
                                                15
                                                0
                                        
                                
                                
                        
                        
                                DRAM_DQM
                                
                                        out
                                        
                                                1
                                                0
                                        
                                
                                
                        
                        
                                DRAM_RAS_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                DRAM_WE_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SRAM_ADDR
                                
                                        out
                                        
                                                17
                                                0
                                        
                                
                                
                        
                        
                                SRAM_CE_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SRAM_DQ
                                
                                        inout
                                        
                                                15
                                                0
                                        
                                
                                
                        
                        
                                SRAM_LB_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SRAM_OE_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SRAM_UB_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SRAM_WE_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                SW_17
                                
                                        in
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_CLK
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_CMD
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_CS_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_DATA
                                
                                        inout
                                        
                                                15
                                                0
                                        
                                
                                
                        
                        
                                ENET_INT
                                
                                        in
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_RD_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_RST_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                        
                                ENET_WR_N
                                
                                        out
                                        
                                                0
                                                0
                                        
                                
                                
                        
                
        
        
                
                        quartusSettings
                        
                                pin_mappings/de2.qsf
                                quartusPinmap
                                false
                        
                
        
        
                
                        
                                SoC
                                HW
                                Template
                        
                
        


Browse

Tools

Subversion Repositories funbase_ip_library

[/] [funbase_ip_library/] [trunk/] [TUT/] [soc/] [mjpeg_de2_soc/] [1.0/] [mjpeg_de2_soc.1.0.xml] - Blame information for rev 147

Line No.	Rev	Author	Line
1	145	lanttu
2
3
4	147	lanttu
5
6	145	lanttu
7			`TUT`
8			`soc`
9			`mjpeg_de2_soc`
10			`1.0`
11			`Altera de2 template soc`
12
13
14
15	147	lanttu	`sdram_if`
16
17
18	145	lanttu
19			`false`
20
21
22
23	147	lanttu	`sdram_address_out`
24	145	lanttu
25	147	lanttu	`11`
26	145	lanttu	`0`
27
28
29
30	147	lanttu	`DRAM_ADDR`
31	145	lanttu
32	147	lanttu	`11`
33	145	lanttu	`0`
34
35
36
37
38
39	147	lanttu	`sdram_ba_out`
40	145	lanttu
41	147	lanttu	`1`
42	145	lanttu	`0`
43
44
45
46	147	lanttu	`DRAM_BA`
47	145	lanttu
48	147	lanttu	`1`
49	145	lanttu	`0`
50
51
52
53
54
55	147	lanttu	`sdram_cas_n_out`
56	145	lanttu
57			`0`
58			`0`
59
60
61
62	147	lanttu	`DRAM_CAS_N`
63	145	lanttu
64			`0`
65			`0`
66
67
68
69
70
71	147	lanttu	`sdram_cke_out`
72	145	lanttu
73	147	lanttu	`0`
74	145	lanttu	`0`
75
76
77
78	147	lanttu	`DRAM_CKE`
79	145	lanttu
80	147	lanttu	`0`
81	145	lanttu	`0`
82
83
84
85
86
87	147	lanttu	`sdram_cs_n_out`
88	145	lanttu
89			`0`
90			`0`
91
92
93
94	147	lanttu	`DRAM_CS_N`
95	145	lanttu
96			`0`
97			`0`
98
99
100
101
102
103	147	lanttu	`sdram_data_inout`
104	145	lanttu
105	147	lanttu	`15`
106	145	lanttu	`0`
107
108
109
110	147	lanttu	`DRAM_DQ`
111	145	lanttu
112	147	lanttu	`15`
113	145	lanttu	`0`
114
115
116
117
118
119	147	lanttu	`sdram_dqm_out`
120	145	lanttu
121	147	lanttu	`1`
122			`0`
123
124
125
126			`DRAM_DQM`
127
128			`1`
129			`0`
130
131
132
133
134
135			`sdram_ras_n_out`
136
137	145	lanttu	`0`
138			`0`
139
140
141
142	147	lanttu	`DRAM_RAS_N`
143	145	lanttu
144			`0`
145			`0`
146
147
148
149
150
151	147	lanttu	`sdram_we_n_out`
152	145	lanttu
153			`0`
154			`0`
155
156
157
158	147	lanttu	`DRAM_WE_N`
159	145	lanttu
160			`0`
161			`0`
162
163
164
165
166			`8`
167			`little`
168
169
170	147	lanttu	`sdram_clk`
171	145	lanttu
172
173	147	lanttu
174	145	lanttu	`false`
175
176
177
178			`CLK`
179
180			`0`
181			`0`
182
183
184
185	147	lanttu	`DRAM_CLK`
186	145	lanttu
187			`0`
188			`0`
189
190
191
192
193			`8`
194			`little`
195
196
197			`rst_n`
198
199
200
201			`false`
202
203
204
205			`RESETn`
206
207			`0`
208			`0`
209
210
211
212			`SW_17`
213
214			`0`
215			`0`
216
217
218
219
220			`8`
221			`little`
222
223
224	147	lanttu	`clk_in`
225	145	lanttu
226
227	147	lanttu
228	145	lanttu	`false`
229
230
231
232			`CLK`
233
234			`0`
235			`0`
236
237
238
239	147	lanttu	`CLOCK_50`
240	145	lanttu
241			`0`
242			`0`
243
244
245
246
247			`8`
248			`little`
249
250
251	147	lanttu	`DM9000A`
252
253
254	145	lanttu
255			`false`
256
257
258
259	147	lanttu	`eth_clk_out`
260	145	lanttu
261	147	lanttu	`0`
262	145	lanttu	`0`
263
264
265
266	147	lanttu	`ENET_CLK`
267	145	lanttu
268	147	lanttu	`0`
269	145	lanttu	`0`
270
271
272
273
274
275	147	lanttu	`eth_chip_sel_out`
276	145	lanttu
277	147	lanttu	`0`
278	145	lanttu	`0`
279
280
281
282	147	lanttu	`ENET_CS_N`
283	145	lanttu
284	147	lanttu	`0`
285	145	lanttu	`0`
286
287
288
289
290
291	147	lanttu	`eth_cmd_out`
292	145	lanttu
293			`0`
294			`0`
295
296
297
298	147	lanttu	`ENET_CMD`
299	145	lanttu
300			`0`
301			`0`
302
303
304
305
306
307	147	lanttu	`eth_data_inout`
308	145	lanttu
309	147	lanttu	`15`
310	145	lanttu	`0`
311
312
313
314	147	lanttu	`ENET_DATA`
315	145	lanttu
316	147	lanttu	`15`
317	145	lanttu	`0`
318
319
320
321
322
323	147	lanttu	`eth_interrupt_in`
324	145	lanttu
325			`0`
326			`0`
327
328
329
330	147	lanttu	`ENET_INT`
331	145	lanttu
332			`0`
333			`0`
334
335
336
337
338
339	147	lanttu	`eth_read_out`
340	145	lanttu
341	147	lanttu	`0`
342	145	lanttu	`0`
343
344
345
346	147	lanttu	`ENET_RD_N`
347	145	lanttu
348	147	lanttu	`0`
349	145	lanttu	`0`
350
351
352
353
354
355	147	lanttu	`eth_reset_out`
356	145	lanttu
357			`0`
358			`0`
359
360
361
362	147	lanttu	`ENET_RST_N`
363	145	lanttu
364			`0`
365			`0`
366
367
368
369
370
371	147	lanttu	`eth_write_out`
372	145	lanttu
373			`0`
374			`0`
375
376
377
378	147	lanttu	`ENET_WR_N`
379	145	lanttu
380			`0`
381			`0`
382
383
384
385
386			`8`
387			`little`
388
389
390			`sram_if`
391
392
393
394			`false`
395
396
397
398			`SRAM_ADDR_FROM_SRAM`
399
400			`17`
401			`0`
402
403
404
405			`SRAM_ADDR`
406
407			`17`
408			`0`
409
410
411
412
413
414			`SRAM_CE_N_FROM_SRAM`
415
416			`0`
417			`0`
418
419
420
421			`SRAM_CE_N`
422
423			`0`
424			`0`
425
426
427
428
429
430			`SRAM_DQ_TO_AND_FROM_SRAM`
431
432			`15`
433			`0`
434
435
436
437			`SRAM_DQ`
438
439			`15`
440			`0`
441
442
443
444
445
446			`SRAM_LB_N_FROM_SRAM`
447
448			`0`
449			`0`
450
451
452
453			`SRAM_LB_N`
454
455			`0`
456			`0`
457
458
459
460
461
462			`SRAM_OE_N_FROM_SRAM`
463
464			`0`
465			`0`
466
467
468
469			`SRAM_OE_N`
470
471			`0`
472			`0`
473
474
475
476
477
478			`SRAM_UB_N_FROM_SRAM`
479
480			`0`
481			`0`
482
483
484
485			`SRAM_UB_N`
486
487			`0`
488			`0`
489
490
491
492
493
494			`SRAM_WE_N_FROM_SRAM`
495
496			`0`
497			`0`
498
499
500
501			`SRAM_WE_N`
502
503			`0`
504			`0`
505
506
507
508
509			`8`
510			`little`
511
512
513
514
515
516			`rtl`
517			`::`
518
519
520			`structural`
521
522
523
524
525			`acc_only`
526
527
528
529
530
531
532			`CLOCK_50`
533
534			`in`
535
536			`0`
537			`0`
538
539
540
541
542
543			`DRAM_ADDR`
544
545			`out`
546
547			`11`
548			`0`
549
550
551
552
553
554			`DRAM_BA`
555
556			`out`
557
558			`1`
559			`0`
560
561
562
563
564
565			`DRAM_CAS_N`
566
567			`out`
568
569			`0`
570			`0`
571
572
573
574
575
576			`DRAM_CKE`
577
578			`out`
579
580			`0`
581			`0`
582
583
584
585
586
587			`DRAM_CLK`
588
589			`out`
590
591			`0`
592			`0`
593
594
595
596
597
598			`DRAM_CS_N`
599
600			`out`
601
602			`0`
603			`0`
604
605
606
607
608
609			`DRAM_DQ`
610
611			`inout`
612
613			`15`
614			`0`
615
616
617
618
619
620			`DRAM_DQM`
621
622			`out`
623
624			`1`
625			`0`
626
627
628
629
630
631			`DRAM_RAS_N`
632
633			`out`
634
635			`0`
636			`0`
637
638
639
640
641
642			`DRAM_WE_N`
643
644			`out`
645
646			`0`
647			`0`
648
649
650
651
652
653			`SRAM_ADDR`
654
655			`out`
656
657			`17`
658			`0`
659
660
661
662
663
664			`SRAM_CE_N`
665
666			`out`
667
668			`0`
669			`0`
670
671
672
673
674
675			`SRAM_DQ`
676
677			`inout`
678
679			`15`
680			`0`
681
682
683
684
685
686			`SRAM_LB_N`
687
688			`out`
689
690			`0`
691			`0`
692
693
694
695
696
697			`SRAM_OE_N`
698
699			`out`
700
701			`0`
702			`0`
703
704
705
706
707
708			`SRAM_UB_N`
709
710			`out`
711
712			`0`
713			`0`
714
715
716
717
718
719			`SRAM_WE_N`
720
721			`out`
722
723			`0`
724			`0`
725
726
727
728
729
730			`SW_17`
731
732			`in`
733
734			`0`
735			`0`
736
737
738
739
740
741			`ENET_CLK`
742
743			`out`
744
745			`0`
746			`0`
747
748
749
750
751
752			`ENET_CMD`
753
754			`out`
755
756			`0`
757			`0`
758
759
760
761
762
763			`ENET_CS_N`
764
765			`out`
766
767			`0`
768			`0`
769
770
771
772
773
774			`ENET_DATA`
775
776			`inout`
777
778			`15`
779			`0`
780
781
782
783
784
785			`ENET_INT`
786
787			`in`
788
789			`0`
790			`0`
791
792
793
794
795
796			`ENET_RD_N`
797
798			`out`
799
800			`0`
801			`0`
802
803
804
805
806
807			`ENET_RST_N`
808
809			`out`
810
811			`0`
812			`0`
813
814
815
816
817
818			`ENET_WR_N`
819
820			`out`
821
822			`0`
823			`0`
824
825
826
827
828
829
830
831
832			`quartusSettings`
833
834			`pin_mappings/de2.qsf`
835			`quartusPinmap`
836			`false`
837
838
839
840
841
842
843			`SoC`
844			`HW`
845			`Template`
846
847
848
849