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[/] [fwrisc/] [trunk/] [ve/] [fwrisc/] [tests/] [riscv-compliance/] [riscv-test-suite/] [rv32i/] [src/] [I-CSRRS-01.S] - Blame information for rev 2

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1 2 mballance
# RISC-V Compliance Test I-CSRRS-01
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#
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# Copyright (c) 2017, Codasip Ltd.
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# Copyright (c) 2018, Imperas Software Ltd. Additions
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#      * Redistributions of source code must retain the above copyright
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#        notice, this list of conditions and the following disclaimer.
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#      * Redistributions in binary form must reproduce the above copyright
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#        notice, this list of conditions and the following disclaimer in the
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#        documentation and/or other materials provided with the distribution.
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#      * Neither the name of the Codasip Ltd., Imperas Software Ltd. nor the
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#        names of its contributors may be used to endorse or promote products
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#        derived from this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL Codasip Ltd., Imperas Software Ltd.
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# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Specification: RV32I Base Integer Instruction Set, Version 2.0
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# Description: Testing instruction CSRRS.
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#include "compliance_test.h"
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#include "compliance_io.h"
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#include "test_macros.h"
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# Test Virtual Machine (TVM) used by program.
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RV_COMPLIANCE_RV32M
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# Test code region.
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RV_COMPLIANCE_CODE_BEGIN
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    RVTEST_IO_INIT
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    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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    RVTEST_IO_WRITE_STR("# Test Begin Reserved regs ra(x1) a0(x10) t0(x5)\n")
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part A1 - general test of CSRRS\n");
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    # Address for test results
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    la      x15, test_A1_res
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    # Register initialization
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    li      x1, 1
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    li      x2, 0
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    li      x3, 0x7FF0FFFF
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    li      x4, 0x80000000
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    li      x5, -1
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    csrrw   x0, mscratch, x0
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    # Test
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    csrrs   x1, mscratch, x1
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    csrrw   x1, mscratch, x0
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    csrrs   x2, mscratch, x2
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    csrrw   x2, mscratch, x0
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    csrrs   x3, mscratch, x3
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    csrrw   x3, mscratch, x0
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    csrrs   x4, mscratch, x4
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    csrrw   x4, mscratch, x0
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    csrrs   x5, mscratch, x5
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    csrrw   x5, mscratch, x0
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    # Store results
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    sw      x0, 0(x15)
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    sw      x1, 4(x15)
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    sw      x2, 8(x15)
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    sw      x3, 12(x15)
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    sw      x4, 16(x15)
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    sw      x5, 20(x15)
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    //
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    // Assert
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    //
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    RVTEST_IO_CHECK()
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    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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    #RVTEST_IO_ASSERT_GPR_EQ(x1, 0x80000324)
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    RVTEST_IO_ASSERT_GPR_EQ(x2, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x3, 0x7FF0FFFF)
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    RVTEST_IO_ASSERT_GPR_EQ(x4, 0x80000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
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    RVTEST_IO_WRITE_STR("# Test part A1  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part A2 - general test of CSRRS\n");
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    # Address for test results
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    la      x5, test_A2_res
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    # Register initialization
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    li      x11, 1
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    li      x12, 0
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    li      x13, 0x7FF0FFFF
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    li      x14, 0x80000000
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    li      x15, -1
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    csrrw   x0, mscratch, x0
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    # Test
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    csrrs   x11, mscratch, x11
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    csrrs   x12, mscratch, x12
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    csrrs   x13, mscratch, x13
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    csrrs   x14, mscratch, x14
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    csrrs   x15, mscratch, x15
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    csrrs   x16, mscratch, x0
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    # Store results
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    sw      x11, 0(x5)
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    sw      x12, 4(x5)
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    sw      x13, 8(x5)
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    sw      x14, 12(x5)
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    sw      x15, 16(x5)
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    sw      x16, 20(x5)
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    RVTEST_IO_ASSERT_GPR_EQ(x11, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x12, 0x00000001)
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    RVTEST_IO_ASSERT_GPR_EQ(x13, 0x00000001)
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    RVTEST_IO_ASSERT_GPR_EQ(x14, 0x7FF0FFFF)
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    RVTEST_IO_ASSERT_GPR_EQ(x15, 0xFFF0FFFF)
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    RVTEST_IO_ASSERT_GPR_EQ(x16, 0xFFFFFFFF)
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    RVTEST_IO_WRITE_STR("# Test part A2  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part B - testing forwarding between instructions\n");
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    # Address for test results
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    la      x26, test_B_res
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    # Register initialization
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    li      x21, 0x12345678
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    csrrw   x0, mscratch, x0
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    # Test
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    csrrs   x22, mscratch, x21
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    csrrs   x23, mscratch, x22
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    csrrw   x23, mscratch, x0
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    csrrs   x24, mscratch, x23
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    csrrs   x25, mscratch, x0
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    # store results
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    sw      x21, 0(x26)
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    sw      x22, 4(x26)
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    sw      x23, 8(x26)
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    sw      x24, 12(x26)
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    sw      x25, 16(x26)
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    RVTEST_IO_ASSERT_GPR_EQ(x21, 0x12345678)
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    RVTEST_IO_ASSERT_GPR_EQ(x22, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x23, 0x12345678)
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    RVTEST_IO_ASSERT_GPR_EQ(x24, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x25, 0x12345678)
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    RVTEST_IO_WRITE_STR("# Test part A3  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part C - testing writing to x0 and reading from x0\n");
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    # Address for test results
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    la      x1, test_C_res
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    # Register initialization
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    li      x30, 0x42726E6F
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    csrrw   x0, mscratch, x30
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    # Test
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    csrrs   x0, mscratch, x30
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    # store results
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    sw      x0, 0(x1)
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    sw      x30, 4(x1)
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    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x30, 0x42726E6F)
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    RVTEST_IO_WRITE_STR("# Test part A4  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part D - testing forwarding throught x0\n");
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    # Address for test results
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    la      x2, test_D_res
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    # Register initialization
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    li      x31, 0xF7FF8818
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    csrrw   x0, mscratch, x31
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    # Test
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    csrrs   x0, mscratch, x0
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    csrrs   x0, mscratch, x0
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    csrrs   x31, mscratch, x0
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    # store results
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    sw      x0, 0(x2)
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    sw      x31, 4(x2)
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    RVTEST_IO_ASSERT_GPR_EQ(x0, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x31, 0xF7FF8818)
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    RVTEST_IO_WRITE_STR("# Test part A5  - Complete\n");
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    # ---------------------------------------------------------------------------------------------
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    RVTEST_IO_WRITE_STR("# Test part E - testing csrrs with same dst and src registers\n");
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    # Address for test results
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    la      x2, test_E_res
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    # Register initialization
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    li      x7, 0x32165498
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    li      x5, 0x96385274
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    csrrw   x0, mscratch, x0
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    # Test
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    csrrs   x5, mscratch, x5
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    csrrs   x7, mscratch, x7
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    csrrs   x8, mscratch, x8
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    # Store results
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    sw      x5, 0(x2)
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    sw      x7, 4(x2)
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    sw      x8, 8(x2)
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    RVTEST_IO_ASSERT_GPR_EQ(x5, 0x00000000)
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    RVTEST_IO_ASSERT_GPR_EQ(x7, 0x96385274)
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    RVTEST_IO_ASSERT_GPR_EQ(x8, 0xB63E56FC)
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    RVTEST_IO_WRITE_STR("# Test part B  - Complete\n");
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    RVTEST_IO_WRITE_STR("# Test End\n")
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 # ---------------------------------------------------------------------------------------------
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    # HALT
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    RV_COMPLIANCE_HALT
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RV_COMPLIANCE_CODE_END
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# Input data section.
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    .data
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    .align 4
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# Output data section.
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RV_COMPLIANCE_DATA_BEGIN
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    .align 4
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test_A1_res:
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    .fill 6, 4, -1
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test_A2_res:
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    .fill 6, 4, -1
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test_B_res:
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    .fill 5, 4, -1
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test_C_res:
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    .fill 2, 4, -1
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test_D_res:
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    .fill 2, 4, -1
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test_E_res:
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    .fill 3, 4, -1
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RV_COMPLIANCE_DATA_END     # End of test output data region.

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